Home
last modified time | relevance | path

Searched full:kbc (Results 1 – 25 of 106) sorted by relevance

12345

/openbmc/linux/drivers/input/keyboard/
H A Dtegra-kbc.c26 /* Maximum row/column supported by Tegra KBC yet is 16x8 */
28 /* Maximum keys supported by Tegra KBC yet is 16 x 8*/
33 /* KBC row scan time and delay for beginning the row scan. */
37 /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
40 /* KBC Registers */
42 /* KBC Control Register */
50 /* KBC Interrupt Register */
72 /* Tegra KBC hw support */
143 static void tegra_kbc_report_keys(struct tegra_kbc *kbc) in tegra_kbc_report_keys() argument
156 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i); in tegra_kbc_report_keys()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/input/
H A Dnvidia,tegra20-kbc.txt7 - compatible: "nvidia,tegra20-kbc"
8 - reg: Register base address of KBC.
9 - interrupts: Interrupt number for the KBC.
10 - nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an
12 - nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an
21 - kbc
38 compatible = "nvidia,tegra20-kbc";
43 reset-names = "kbc";
46 nvidia,kbc-row-pins = <0 1 2>; /* pin 0, 1, 2 as rows */
47 nvidia,kbc-col-pins = <11 12 13>; /* pin 11, 12, 13 as columns */
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dpinmux.c204 PIN(KB_ROW0_PR0, KBC, RSVD2, RSVD3, RSVD4),
205 PIN(KB_ROW1_PR1, KBC, RSVD2, RSVD3, RSVD4),
206 PIN(KB_ROW2_PR2, KBC, RSVD2, RSVD3, RSVD4),
207 PIN(KB_ROW3_PR3, KBC, DISPLAYA, SYS, DISPLAYB),
208 PIN(KB_ROW4_PR4, KBC, DISPLAYA, RSVD3, DISPLAYB),
209 PIN(KB_ROW5_PR5, KBC, DISPLAYA, RSVD3, DISPLAYB),
210 PIN(KB_ROW6_PR6, KBC, DISPLAYA, DISPLAYA_ALT, DISPLAYB),
211 PIN(KB_ROW7_PR7, KBC, RSVD2, CLDVFS, UARTA),
212 PIN(KB_ROW8_PS0, KBC, RSVD2, CLDVFS, UARTA),
213 PIN(KB_ROW9_PS1, KBC, RSVD2, RSVD3, UARTA),
[all …]
/openbmc/u-boot/drivers/input/
H A Dtegra-kbc.c14 #include <tegra-kbc.h>
46 struct kbc_tegra *kbc; /* tegra keyboard controller */ member
79 kp_ent = readl(&priv->kbc->kp_ent[i / 4]); in tegra_kbc_find_keys()
144 fifo_cnt = (readl(&priv->kbc->interrupt) >> 4) & 0xf; in check_for_keys()
193 static void config_kbc_gpio(struct tegra_kbd_priv *priv, struct kbc_tegra *kbc) in config_kbc_gpio() argument
206 row_cfg = readl(&kbc->row_cfg[r_offs]); in config_kbc_gpio()
207 col_cfg = readl(&kbc->col_cfg[c_offs]); in config_kbc_gpio()
219 writel(row_cfg, &kbc->row_cfg[r_offs]); in config_kbc_gpio()
220 writel(col_cfg, &kbc->col_cfg[c_offs]); in config_kbc_gpio()
229 struct kbc_tegra *kbc = priv->kbc; in tegra_kbc_open() local
[all …]
H A DMakefile14 obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
/openbmc/u-boot/board/nvidia/cardhu/
H A Dpinmux-config-cardhu.h219 /* KBC keys */
220 DEFAULT_PINMUX(KB_ROW0_PR0, KBC, UP, NORMAL, INPUT),
221 DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT),
222 DEFAULT_PINMUX(KB_ROW2_PR2, KBC, UP, NORMAL, INPUT),
223 DEFAULT_PINMUX(KB_ROW3_PR3, KBC, UP, NORMAL, INPUT),
224 DEFAULT_PINMUX(KB_ROW4_PR4, KBC, UP, NORMAL, INPUT),
225 DEFAULT_PINMUX(KB_ROW5_PR5, KBC, UP, NORMAL, INPUT),
226 DEFAULT_PINMUX(KB_ROW6_PR6, KBC, UP, NORMAL, INPUT),
227 DEFAULT_PINMUX(KB_ROW7_PR7, KBC, UP, NORMAL, INPUT),
228 DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT),
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra30/
H A Dpinmux.c200 PIN(KB_ROW0_PR0, KBC, NAND, RSVD3, RSVD4),
201 PIN(KB_ROW1_PR1, KBC, NAND, RSVD3, RSVD4),
202 PIN(KB_ROW2_PR2, KBC, NAND, RSVD3, RSVD4),
203 PIN(KB_ROW3_PR3, KBC, NAND, RSVD3, INVALID),
204 PIN(KB_ROW4_PR4, KBC, NAND, TRACE, RSVD4),
205 PIN(KB_ROW5_PR5, KBC, NAND, TRACE, OWR),
206 PIN(KB_ROW6_PR6, KBC, NAND, SDMMC2, MIO),
207 PIN(KB_ROW7_PR7, KBC, NAND, SDMMC2, MIO),
208 PIN(KB_ROW8_PS0, KBC, NAND, SDMMC2, MIO),
209 PIN(KB_ROW9_PS1, KBC, NAND, SDMMC2, MIO),
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra114/
H A Dpinmux.c204 PIN(KB_ROW0_PR0, KBC, RSVD2, RSVD3, RSVD4),
205 PIN(KB_ROW1_PR1, KBC, RSVD2, RSVD3, RSVD4),
206 PIN(KB_ROW2_PR2, KBC, RSVD2, RSVD3, RSVD4),
207 PIN(KB_ROW3_PR3, KBC, DISPLAYA, RSVD3, DISPLAYB),
208 PIN(KB_ROW4_PR4, KBC, DISPLAYA, SPI2, DISPLAYB),
209 PIN(KB_ROW5_PR5, KBC, DISPLAYA, SPI2, DISPLAYB),
210 PIN(KB_ROW6_PR6, KBC, DISPLAYA, DISPLAYA_ALT, DISPLAYB),
211 PIN(KB_ROW7_PR7, KBC, RSVD2, CLDVFS, UARTA),
212 PIN(KB_ROW8_PS0, KBC, RSVD2, CLDVFS, UARTA),
213 PIN(KB_ROW9_PS1, KBC, RSVD2, RSVD3, UARTA),
[all …]
/openbmc/u-boot/board/avionic-design/common/
H A Dpinmux-config-tamonten-ng.h323 /* KBC keys - NC */
324 DEFAULT_PINMUX(KB_ROW0_PR0, KBC, UP, NORMAL, INPUT),
325 DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT),
326 DEFAULT_PINMUX(KB_ROW2_PR2, KBC, UP, NORMAL, INPUT),
327 DEFAULT_PINMUX(KB_ROW3_PR3, KBC, UP, NORMAL, INPUT),
328 DEFAULT_PINMUX(KB_ROW4_PR4, KBC, UP, NORMAL, INPUT),
329 DEFAULT_PINMUX(KB_ROW5_PR5, KBC, UP, NORMAL, INPUT),
330 DEFAULT_PINMUX(KB_ROW6_PR6, KBC, UP, NORMAL, INPUT),
331 DEFAULT_PINMUX(KB_ROW7_PR7, KBC, UP, NORMAL, INPUT),
332 DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT),
[all …]
/openbmc/u-boot/board/nvidia/dalmore/
H A Dpinmux-config-dalmore.h197 /* KBC pinmux */
198 DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT),
199 DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT),
200 DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT),
201 DEFAULT_PINMUX(KB_ROW0_PR0, KBC, UP, NORMAL, INPUT),
202 DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT),
203 DEFAULT_PINMUX(KB_ROW2_PR2, KBC, UP, NORMAL, INPUT),
331 DEFAULT_PINMUX(KB_COL3_PQ3, KBC, UP, NORMAL, OUTPUT),
333 DEFAULT_PINMUX(KB_COL5_PQ5, KBC, UP, NORMAL, INPUT),
334 DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, OUTPUT),
[all …]
/openbmc/u-boot/board/toradex/colibri_t30/
H A Dpinmux-config-colibri_t30.h224 /* KBC keys */
230 DEFAULT_PINMUX(KB_ROW5_PR5, KBC, NORMAL, TRISTATE, INPUT),
231 DEFAULT_PINMUX(KB_ROW6_PR6, KBC, NORMAL, TRISTATE, INPUT),
232 DEFAULT_PINMUX(KB_ROW7_PR7, KBC, NORMAL, TRISTATE, INPUT),
233 DEFAULT_PINMUX(KB_ROW8_PS0, KBC, NORMAL, TRISTATE, INPUT),
234 DEFAULT_PINMUX(KB_ROW9_PS1, KBC, NORMAL, TRISTATE, INPUT),
244 DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT),
245 DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT),
246 DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT),
247 DEFAULT_PINMUX(KB_COL3_PQ3, KBC, UP, NORMAL, INPUT),
[all …]
/openbmc/u-boot/board/toradex/apalis_t30/
H A Dpinmux-config-apalis_t30.h239 DEFAULT_PINMUX(KB_ROW5_PR5, KBC, NORMAL, TRISTATE, INPUT),
240 DEFAULT_PINMUX(KB_ROW6_PR6, KBC, NORMAL, TRISTATE, INPUT),
241 DEFAULT_PINMUX(KB_ROW7_PR7, KBC, NORMAL, TRISTATE, INPUT),
242 DEFAULT_PINMUX(KB_ROW8_PS0, KBC, NORMAL, TRISTATE, INPUT),
243 DEFAULT_PINMUX(KB_ROW9_PS1, KBC, NORMAL, TRISTATE, INPUT),
253 DEFAULT_PINMUX(KB_COL0_PQ0, KBC, NORMAL, NORMAL, INPUT),
254 DEFAULT_PINMUX(KB_COL1_PQ1, KBC, NORMAL, NORMAL, INPUT),
255 DEFAULT_PINMUX(KB_COL2_PQ2, KBC, NORMAL, NORMAL, INPUT),
256 DEFAULT_PINMUX(KB_COL3_PQ3, KBC, NORMAL, NORMAL, INPUT),
257 DEFAULT_PINMUX(KB_COL4_PQ4, KBC, NORMAL, NORMAL, INPUT),
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-nexus7-grouper.dtsi62 nvidia,function = "kbc";
83 nvidia,function = "kbc";
90 nvidia,function = "kbc";
97 nvidia,function = "kbc";
H A Dtegra30-asus-nexus7-tilapia.dtsi115 nvidia,function = "kbc";
136 nvidia,function = "kbc";
151 nvidia,function = "kbc";
158 nvidia,function = "kbc";
H A Dtegra30-beaver.dts930 nvidia,function = "kbc";
937 nvidia,function = "kbc";
944 nvidia,function = "kbc";
951 nvidia,function = "kbc";
958 nvidia,function = "kbc";
965 nvidia,function = "kbc";
972 nvidia,function = "kbc";
979 nvidia,function = "kbc";
986 nvidia,function = "kbc";
993 nvidia,function = "kbc";
[all …]
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra124.c1653 FUNCTION(kbc),
1917 …PINGROUP(kb_row0_pr0, KBC, RSVD2, RSVD3, RSVD4, 0x32bc, N, N…
1918 …PINGROUP(kb_row1_pr1, KBC, RSVD2, RSVD3, RSVD4, 0x32c0, N, N…
1919 …PINGROUP(kb_row2_pr2, KBC, RSVD2, RSVD3, RSVD4, 0x32c4, N, N…
1920 …PINGROUP(kb_row3_pr3, KBC, DISPLAYA, SYS, DISPLAYB, 0x32c8, N, N…
1921 …PINGROUP(kb_row4_pr4, KBC, DISPLAYA, RSVD3, DISPLAYB, 0x32cc, N, N…
1922 …PINGROUP(kb_row5_pr5, KBC, DISPLAYA, RSVD3, DISPLAYB, 0x32d0, N, N…
1923 …PINGROUP(kb_row6_pr6, KBC, DISPLAYA, DISPLAYA_ALT, DISPLAYB, 0x32d4, N, N…
1924 …PINGROUP(kb_row7_pr7, KBC, RSVD2, CLDVFS, UARTA, 0x32d8, N, N…
1925 …PINGROUP(kb_row8_ps0, KBC, RSVD2, CLDVFS, UARTA, 0x32dc, N, N…
[all …]
H A Dpinctrl-tegra114.c1491 FUNCTION(kbc),
1724 …PINGROUP(kb_row0_pr0, KBC, RSVD2, RSVD3, RSVD4, 0x32bc, N, N…
1725 …PINGROUP(kb_row1_pr1, KBC, RSVD2, RSVD3, RSVD4, 0x32c0, N, N…
1726 …PINGROUP(kb_row2_pr2, KBC, RSVD2, RSVD3, RSVD4, 0x32c4, N, N…
1727 …PINGROUP(kb_row3_pr3, KBC, DISPLAYA, RSVD3, DISPLAYB, 0x32c8, N, N…
1728 …PINGROUP(kb_row4_pr4, KBC, DISPLAYA, SPI2, DISPLAYB, 0x32cc, N, N…
1729 …PINGROUP(kb_row5_pr5, KBC, DISPLAYA, SPI2, DISPLAYB, 0x32d0, N, N…
1730 …PINGROUP(kb_row6_pr6, KBC, DISPLAYA, DISPLAYA_ALT, DISPLAYB, 0x32d4, N, N…
1731 …PINGROUP(kb_row7_pr7, KBC, RSVD2, CLDVFS, UARTA, 0x32d8, N, N…
1732 …PINGROUP(kb_row8_ps0, KBC, RSVD2, CLDVFS, UARTA, 0x32dc, N, N…
[all …]
H A Dpinctrl-tegra30.c2049 FUNCTION(kbc),
2299 …PINGROUP(kb_col0_pq0, KBC, NAND, TRACE, TEST, 0x32fc, N, …
2300 …PINGROUP(kb_col1_pq1, KBC, NAND, TRACE, TEST, 0x3300, N, …
2301 …PINGROUP(kb_col2_pq2, KBC, NAND, TRACE, RSVD4, 0x3304, N, …
2302 …PINGROUP(kb_col3_pq3, KBC, NAND, TRACE, RSVD4, 0x3308, N, …
2303 …PINGROUP(kb_col4_pq4, KBC, NAND, TRACE, RSVD4, 0x330c, N, …
2304 …PINGROUP(kb_col5_pq5, KBC, NAND, TRACE, RSVD4, 0x3310, N, …
2305 …PINGROUP(kb_col6_pq6, KBC, NAND, TRACE, MIO, 0x3314, N, …
2306 …PINGROUP(kb_col7_pq7, KBC, NAND, TRACE, MIO, 0x3318, N, …
2307 …PINGROUP(kb_row0_pr0, KBC, NAND, RSVD3, RSVD4, 0x32bc, N, …
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dpinmux.c308 PIN(KBCB, KBC, NAND, SDIO2, MIO),
309 PIN(KBCA, KBC, NAND, SDIO2, EMC_TEST0_DLL),
314 PIN(KBCE, KBC, NAND, OWR, RSVD4),
315 PIN(KBCF, KBC, NAND, TRACE, MIO),
350 PIN(KBCC, KBC, NAND, TRACE, EMC_TEST1_DLL),
406 PIN(KBCD, KBC, NAND, SDIO2, MIO),
/openbmc/u-boot/include/
H A Dns87308.h101 #define DBASE_HIGH 0x60 /* SIO KBC data base address, 15:8 */
102 #define DBASE_LOW 0x61 /* SIO KBC data base address, 7:0 */
103 #define CBASE_HIGH 0x62 /* SIO KBC command base addr, 15:8 */
104 #define CBASE_LOW 0x63 /* SIO KBC command base addr, 7:0 */
/openbmc/u-boot/cmd/
H A Dcros_ec.c127 debug("%s: Could not read KBC ID\n", __func__); in do_cros_ec()
135 debug("%s: Could not read KBC info\n", __func__); in do_cros_ec()
144 debug("%s: Could not read KBC image\n", __func__); in do_cros_ec()
153 debug("%s: Could not read KBC hash\n", __func__); in do_cros_ec()
186 debug("%s: Could not reboot KBC\n", __func__); in do_cros_ec()
/openbmc/linux/arch/x86/boot/
H A Da20.c32 return -1; /* Assume no KBC present */ in empty_8042()
83 is useful when dealing with the KBC or other slow external circuitry. */
/openbmc/u-boot/drivers/misc/
H A Dali512x.c215 * CIO14 P21 KBC P21 fucntion
216 * CIO15 P20 KBC P21 fucntion
234 * CIO37 ALT_KBC Alternative KBC select
/openbmc/qemu/include/hw/isa/
H A Dsuperio.h33 ISADevice *kbc; member
/openbmc/u-boot/board/toradex/apalis-tk1/
H A Dpinmux-config-apalis-tk1.h155 PINCFG(KB_COL3_PQ3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
156 PINCFG(KB_COL4_PQ4, KBC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
163 PINCFG(KB_ROW3_PR3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
166 PINCFG(KB_ROW6_PR6, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),

12345