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/openbmc/linux/Documentation/devicetree/bindings/i3c/
H A Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c-master@[0-9a-f]+$"
22 "#address-cells":
25 Each I2C device connected to the bus should be described in a subnode.
35 this I3C device has a static I2C address and we want to assign it a
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H A Dcdns,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Boris Brezillon <bbrezillon@kernel.org>
13 - $ref: i3c.yaml#
17 const: cdns,i3c-master
25 clock-names:
27 - const: pclk
28 - const: sysclk
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/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c.txt1 Generic device tree bindings for I2C busses
4 This document describes generic bindings which can be used to describe I2C
8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
17 The cells properties above define that an address of children of an I2C bus
21 -----------------------------
26 - clock-frequency
27 frequency of bus clock in Hz.
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H A Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
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H A Di2c-rk3x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
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H A Drenesas,rcar-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/renesas,rcar-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car I2C Controller
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
15 - items:
16 - enum:
17 - renesas,i2c-r8a7778 # R-Car M1A
18 - renesas,i2c-r8a7779 # R-Car H1
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H A Dsnps,designware-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
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H A Di2c-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek I2C controller
10 This driver interfaces with the native I2C controller present in
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Qii Wang <qii.wang@mediatek.com>
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
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H A Dsamsung,s3c2410-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC I2C Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - samsung,s3c2410-i2c
16 - samsung,s3c2440-i2c
17 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
18 - samsung,s3c2440-hdmiphy-i2c
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/openbmc/linux/drivers/i2c/busses/
H A Di2c-acorn.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ARM IOC/IOMD i2c driver.
7 * On Acorn machines, the following i2c devices are on the bus:
8 * - PCF8583 real time clock & static RAM
11 #include <linux/i2c.h>
12 #include <linux/i2c-algo-bit.h>
19 #define SCL 0x02 macro
23 * We must preserve all non-i2c output bits in IOC_CONTROL.
24 * Note also that we need to preserve the value of SCL and
32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
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H A Di2c-versatile.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-versatile.c
10 #include <linux/i2c.h>
11 #include <linux/i2c-algo-bit.h>
20 #define SCL (1 << 0) macro
31 struct i2c_versatile *i2c = data; in i2c_versatile_setsda() local
33 writel(SDA, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setsda()
38 struct i2c_versatile *i2c = data; in i2c_versatile_setscl() local
40 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setscl()
45 struct i2c_versatile *i2c = data; in i2c_versatile_getsda() local
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H A Di2c-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Bitbanging I2C bus driver using the GPIO API
11 #include <linux/i2c-algo-bit.h>
12 #include <linux/i2c.h>
16 #include <linux/platform_data/i2c-gpio.h>
23 struct gpio_desc *scl; member
44 gpiod_set_value_cansleep(priv->sda, state); in i2c_gpio_setsda_val()
48 * Toggle SCL by changing the output value of the pin. This is used
49 * for pins that are configured as open drain and for output-only
50 * pins. The latter case will break the i2c protocol, but it will
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H A Di2c-stm32f7.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics STM32F7 I2C controller
5 * This I2C controller is described in the STM32F75xxx and STM32F74xxx Soc
14 * This driver is based on i2c-stm32f4.c
20 #include <linux/i2c.h>
21 #include <linux/i2c-smbus.h>
38 #include "i2c-stm32.h"
40 /* STM32F7 I2C registers */
52 /* STM32F7 I2C control 1 */
83 /* STM32F7 I2C control 2 */
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H A Di2c-pxa.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * I2C adapter for the PXA I2C bus access.
8 * Copyright (C) 2004-2005 Deep Blue Solutions Ltd.
13 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
14 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
24 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-pxa.h>
37 /* I2C register field definitions */
58 #define ICR_A3700_FM (1 << 16) /* fast mode for armada-3700 */
59 #define ICR_A3700_HS (1 << 17) /* high speed mode for armada-3700 */
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H A Di2c-omap.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * TI OMAP I2C master mode driver
7 * Copyright (C) 2004 - 2007 Texas Instruments.
20 #include <linux/i2c.h>
30 #include <linux/platform_data/i2c-omap.h>
34 /* I2C controller revisions */
37 /* I2C controller revisions present on specific hardware */
80 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
89 /* I2C Status Register (OMAP_I2C_STAT): */
103 /* I2C WE wakeup enable register */
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H A Di2c-qcom-geni.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
7 #include <linux/dma-mapping.h>
8 #include <linux/dma/qcom-gpi-dma.h>
10 #include <linux/i2c.h>
17 #include <linux/soc/qcom/geni-se.h>
28 /* M_CMD OP codes for I2C */
35 /* M_CMD params for I2C */
46 /* I2C SCL COUNTER fields */
76 #define ABORT_TIMEOUT HZ
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H A Di2c-designware-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Synopsys DesignWare I2C adapter driver.
5 * Based on the TI DAVINCI I2C adapter driver.
18 #include <linux/i2c.h>
29 #include "i2c-designware-core.h"
59 "incorrect slave-transmitter mode configuration",
66 *val = readl(dev->base + reg); in dw_reg_read()
75 writel(val, dev->base + reg); in dw_reg_write()
84 *val = swab32(readl(dev->base + reg)); in dw_reg_read_swab()
93 writel(swab32(val), dev->base + reg); in dw_reg_write_swab()
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/openbmc/u-boot/drivers/i2c/
H A Dstm32f7_i2c.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <i2c.h>
15 /* STM32 I2C registers */
17 u32 cr1; /* I2C control register 1 */
18 u32 cr2; /* I2C control register 2 */
19 u32 oar1; /* I2C own address 1 register */
20 u32 oar2; /* I2C own address 2 register */
21 u32 timingr; /* I2C timing register */
22 u32 timeoutr; /* I2C timeout register */
23 u32 isr; /* I2C interrupt and status register */
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/openbmc/u-boot/doc/device-tree-bindings/i2c/
H A Di2c-gpio.txt1 I2C gpio device binding
5 - drivers/i2c/i2c-gpio.c
7 Software i2c device-tree node properties:
9 * #address-cells = <1>;
10 * #size-cells = <0>;
11 * compatible = "i2c-gpio";
12 * gpios = <sda ...>, <scl ...>;
15 * i2c-gpio,delay-us = <5>;
17 between gpio-toggle operations. Speed [Hz] = 1000000 / 4 * udelay[us],
22 i2c-gpio@1 {
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/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
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/openbmc/linux/drivers/iio/temperature/
H A Dmlx90614.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * mlx90614.c - Support for Melexis MLX90614/MLX90615 contactless IR temperature sensor
9 * Driver for the Melexis MLX90614/MLX90615 I2C 16-bit IR thermopile sensor
11 * MLX90614 - 17-bit ADC + MLX90302 DSP
12 * MLX90615 - 16-bit ADC + MLX90325 DSP
14 * (7-bit I2C slave address 0x5a, 100KHz bus speed only!)
16 * To wake up from sleep mode, the SDA line must be held low while SCL is high
19 * will not interfere in I2C communication. While the GPIO is driven low, the
20 * i2c adapter is locked since it cannot be used by other clients. The SCL line
21 * always has a pull-up so we do not need an extra GPIO to drive it high. If
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/openbmc/linux/drivers/media/pci/ivtv/
H A Divtv-i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 I2C functions
4 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
10 This file includes an i2c implementation that was reverse engineered
11 from the Hauppauge windows driver. Older ivtv versions used i2c-algo-bit,
13 CPU on the PVR-150 which handles IR functions (occasional inability to
14 communicate with the chip until it was reset) and also with the i2c
17 The implementation is very similar to i2c-algo-bit, but there are enough
19 employed by i2c-algo-bit is to use udelay() to implement the timing
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/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779f0.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC
8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779f0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 cluster01_opp: opp-table-0 {
18 compatible = "operating-points-v2";
19 opp-shared;
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/openbmc/linux/drivers/net/can/sja1000/
H A Dpeak_pci.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com>
8 * Copyright (C) 2001-2006 PEAK System-Technik GmbH
18 #include <linux/i2c.h>
19 #include <linux/i2c-algo-bit.h>
25 MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
26 MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");
62 #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */
63 #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */
65 #define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */
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