1aaa7cb26SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
238034518SWolfgang Grandegger /*
338034518SWolfgang Grandegger * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com>
4e6d9c80bSStephane Grosjean * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com>
538034518SWolfgang Grandegger *
638034518SWolfgang Grandegger * Derived from the PCAN project file driver/src/pcan_pci.c:
738034518SWolfgang Grandegger *
838034518SWolfgang Grandegger * Copyright (C) 2001-2006 PEAK System-Technik GmbH
938034518SWolfgang Grandegger */
1038034518SWolfgang Grandegger
1138034518SWolfgang Grandegger #include <linux/kernel.h>
1238034518SWolfgang Grandegger #include <linux/module.h>
1338034518SWolfgang Grandegger #include <linux/interrupt.h>
1438034518SWolfgang Grandegger #include <linux/netdevice.h>
1538034518SWolfgang Grandegger #include <linux/delay.h>
1638034518SWolfgang Grandegger #include <linux/pci.h>
1738034518SWolfgang Grandegger #include <linux/io.h>
18e6d9c80bSStephane Grosjean #include <linux/i2c.h>
19e6d9c80bSStephane Grosjean #include <linux/i2c-algo-bit.h>
2038034518SWolfgang Grandegger #include <linux/can.h>
2138034518SWolfgang Grandegger #include <linux/can/dev.h>
2238034518SWolfgang Grandegger
2338034518SWolfgang Grandegger #include "sja1000.h"
2438034518SWolfgang Grandegger
25fc09e367SStephane Grosjean MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
26e6d9c80bSStephane Grosjean MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");
2738034518SWolfgang Grandegger MODULE_LICENSE("GPL v2");
2838034518SWolfgang Grandegger
2938034518SWolfgang Grandegger #define DRV_NAME "peak_pci"
3038034518SWolfgang Grandegger
31805ff68cSStephane Grosjean /* FPGA cards FW version registers */
32805ff68cSStephane Grosjean #define PEAK_VER_REG1 0x40
33805ff68cSStephane Grosjean #define PEAK_VER_REG2 0x44
34805ff68cSStephane Grosjean
35e6d9c80bSStephane Grosjean struct peak_pciec_card;
3638034518SWolfgang Grandegger struct peak_pci_chan {
3738034518SWolfgang Grandegger void __iomem *cfg_base; /* Common for all channels */
3829830406SStephane Grosjean struct net_device *prev_dev; /* Chain of network devices */
3938034518SWolfgang Grandegger u16 icr_mask; /* Interrupt mask for fast ack */
40e6d9c80bSStephane Grosjean struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */
4138034518SWolfgang Grandegger };
4238034518SWolfgang Grandegger
4338034518SWolfgang Grandegger #define PEAK_PCI_CAN_CLOCK (16000000 / 2)
4438034518SWolfgang Grandegger
4538034518SWolfgang Grandegger #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
4638034518SWolfgang Grandegger #define PEAK_PCI_OCR OCR_TX0_PUSHPULL
4738034518SWolfgang Grandegger
489b69aff9SMarc Kleine-Budde /* Important PITA registers */
4938034518SWolfgang Grandegger #define PITA_ICR 0x00 /* Interrupt control register */
5038034518SWolfgang Grandegger #define PITA_GPIOICR 0x18 /* GPIO interface control register */
5138034518SWolfgang Grandegger #define PITA_MISC 0x1C /* Miscellaneous register */
5238034518SWolfgang Grandegger
5338034518SWolfgang Grandegger #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */
5438034518SWolfgang Grandegger #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */
5538034518SWolfgang Grandegger
5638034518SWolfgang Grandegger #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */
5738034518SWolfgang Grandegger #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */
58e6d9c80bSStephane Grosjean #define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */
59e6d9c80bSStephane Grosjean #define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */
60fc09e367SStephane Grosjean #define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */
61fc09e367SStephane Grosjean #define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */
62fc09e367SStephane Grosjean #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */
63fc09e367SStephane Grosjean #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */
64fc09e367SStephane Grosjean #define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */
654be0015cSOliver Hartkopp #define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */
664be0015cSOliver Hartkopp #define PEAK_PCIEC34_DEVICE_ID 0x000A /* PCAN-PCI Express 34 (one channel) */
6738034518SWolfgang Grandegger
68e6d9c80bSStephane Grosjean #define PEAK_PCI_CHAN_MAX 4
69e6d9c80bSStephane Grosjean
70e6d9c80bSStephane Grosjean static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = {
71e6d9c80bSStephane Grosjean 0x02, 0x01, 0x40, 0x80
72e6d9c80bSStephane Grosjean };
7338034518SWolfgang Grandegger
749baa3c34SBenoit Taine static const struct pci_device_id peak_pci_tbl[] = {
75805ff68cSStephane Grosjean {
76805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
77805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-PCI",
78805ff68cSStephane Grosjean }, {
79805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
80805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-PCI Express",
81805ff68cSStephane Grosjean }, {
82805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
83805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-miniPCI",
84805ff68cSStephane Grosjean }, {
85805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
86805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-miniPCIe",
87805ff68cSStephane Grosjean }, {
88805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
89805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-PC/104-Plus Quad",
90805ff68cSStephane Grosjean }, {
91805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
92805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-PCI/104-Express",
93805ff68cSStephane Grosjean }, {
94805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
95805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-cPCI",
96805ff68cSStephane Grosjean }, {
97805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_PCIE_OEM_ID, PCI_ANY_ID, PCI_ANY_ID,
98805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-Chip PCIe",
99805ff68cSStephane Grosjean },
100e6d9c80bSStephane Grosjean #ifdef CONFIG_CAN_PEAK_PCIEC
101805ff68cSStephane Grosjean {
102805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
103805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-ExpressCard",
104805ff68cSStephane Grosjean }, {
105805ff68cSStephane Grosjean PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
106805ff68cSStephane Grosjean .driver_data = (kernel_ulong_t)"PCAN-ExpressCard 34",
107805ff68cSStephane Grosjean },
108e6d9c80bSStephane Grosjean #endif
109805ff68cSStephane Grosjean { /* sentinel */ }
11038034518SWolfgang Grandegger };
11138034518SWolfgang Grandegger
11238034518SWolfgang Grandegger MODULE_DEVICE_TABLE(pci, peak_pci_tbl);
11338034518SWolfgang Grandegger
114e6d9c80bSStephane Grosjean #ifdef CONFIG_CAN_PEAK_PCIEC
1159b69aff9SMarc Kleine-Budde /* PCAN-ExpressCard needs I2C bit-banging configuration option. */
116e6d9c80bSStephane Grosjean
117e6d9c80bSStephane Grosjean /* GPIOICR byte access offsets */
118e6d9c80bSStephane Grosjean #define PITA_GPOUT 0x18 /* GPx output value */
119e6d9c80bSStephane Grosjean #define PITA_GPIN 0x19 /* GPx input value */
12088bfb9a7SMarc Kleine-Budde #define PITA_GPOEN 0x1A /* configure GPx as output pin */
121e6d9c80bSStephane Grosjean
122e6d9c80bSStephane Grosjean /* I2C GP bits */
123e6d9c80bSStephane Grosjean #define PITA_GPIN_SCL 0x01 /* Serial Clock Line */
124e6d9c80bSStephane Grosjean #define PITA_GPIN_SDA 0x04 /* Serial DAta line */
125e6d9c80bSStephane Grosjean
126e6d9c80bSStephane Grosjean #define PCA9553_1_SLAVEADDR (0xC4 >> 1)
127e6d9c80bSStephane Grosjean
128e6d9c80bSStephane Grosjean /* PCA9553 LS0 fields values */
129e6d9c80bSStephane Grosjean enum {
130e6d9c80bSStephane Grosjean PCA9553_LOW,
131e6d9c80bSStephane Grosjean PCA9553_HIGHZ,
132e6d9c80bSStephane Grosjean PCA9553_PWM0,
133e6d9c80bSStephane Grosjean PCA9553_PWM1
134e6d9c80bSStephane Grosjean };
135e6d9c80bSStephane Grosjean
136e6d9c80bSStephane Grosjean /* LEDs control */
137e6d9c80bSStephane Grosjean #define PCA9553_ON PCA9553_LOW
138e6d9c80bSStephane Grosjean #define PCA9553_OFF PCA9553_HIGHZ
139e6d9c80bSStephane Grosjean #define PCA9553_SLOW PCA9553_PWM0
140e6d9c80bSStephane Grosjean #define PCA9553_FAST PCA9553_PWM1
141e6d9c80bSStephane Grosjean
142e6d9c80bSStephane Grosjean #define PCA9553_LED(c) (1 << (c))
143e6d9c80bSStephane Grosjean #define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1))
144e6d9c80bSStephane Grosjean
145e6d9c80bSStephane Grosjean #define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c)
146e6d9c80bSStephane Grosjean #define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c)
147e6d9c80bSStephane Grosjean #define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c)
148e6d9c80bSStephane Grosjean #define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c)
149e6d9c80bSStephane Grosjean #define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c)
150e6d9c80bSStephane Grosjean
151e6d9c80bSStephane Grosjean #define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1))
152e6d9c80bSStephane Grosjean
153e6d9c80bSStephane Grosjean #define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */
154e6d9c80bSStephane Grosjean
155e6d9c80bSStephane Grosjean struct peak_pciec_chan {
156e6d9c80bSStephane Grosjean struct net_device *netdev;
157e6d9c80bSStephane Grosjean unsigned long prev_rx_bytes;
158e6d9c80bSStephane Grosjean unsigned long prev_tx_bytes;
159e6d9c80bSStephane Grosjean };
160e6d9c80bSStephane Grosjean
161e6d9c80bSStephane Grosjean struct peak_pciec_card {
162e6d9c80bSStephane Grosjean void __iomem *cfg_base; /* Common for all channels */
163e6d9c80bSStephane Grosjean void __iomem *reg_base; /* first channel base address */
164e6d9c80bSStephane Grosjean u8 led_cache; /* leds state cache */
165e6d9c80bSStephane Grosjean
166e6d9c80bSStephane Grosjean /* PCIExpressCard i2c data */
167e6d9c80bSStephane Grosjean struct i2c_algo_bit_data i2c_bit;
168e6d9c80bSStephane Grosjean struct i2c_adapter led_chip;
169e6d9c80bSStephane Grosjean struct delayed_work led_work; /* led delayed work */
170e6d9c80bSStephane Grosjean int chan_count;
171e6d9c80bSStephane Grosjean struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX];
172e6d9c80bSStephane Grosjean };
173e6d9c80bSStephane Grosjean
174e6d9c80bSStephane Grosjean /* "normal" pci register write callback is overloaded for leds control */
175e6d9c80bSStephane Grosjean static void peak_pci_write_reg(const struct sja1000_priv *priv,
176e6d9c80bSStephane Grosjean int port, u8 val);
177e6d9c80bSStephane Grosjean
pita_set_scl_highz(struct peak_pciec_card * card)178e6d9c80bSStephane Grosjean static inline void pita_set_scl_highz(struct peak_pciec_card *card)
179e6d9c80bSStephane Grosjean {
180e6d9c80bSStephane Grosjean u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL;
181fe1fa138SMarc Kleine-Budde
182e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN);
183e6d9c80bSStephane Grosjean }
184e6d9c80bSStephane Grosjean
pita_set_sda_highz(struct peak_pciec_card * card)185e6d9c80bSStephane Grosjean static inline void pita_set_sda_highz(struct peak_pciec_card *card)
186e6d9c80bSStephane Grosjean {
187e6d9c80bSStephane Grosjean u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA;
188fe1fa138SMarc Kleine-Budde
189e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN);
190e6d9c80bSStephane Grosjean }
191e6d9c80bSStephane Grosjean
peak_pciec_init_pita_gpio(struct peak_pciec_card * card)192e6d9c80bSStephane Grosjean static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card)
193e6d9c80bSStephane Grosjean {
194e6d9c80bSStephane Grosjean /* raise SCL & SDA GPIOs to high-Z */
195e6d9c80bSStephane Grosjean pita_set_scl_highz(card);
196e6d9c80bSStephane Grosjean pita_set_sda_highz(card);
197e6d9c80bSStephane Grosjean }
198e6d9c80bSStephane Grosjean
pita_setsda(void * data,int state)199e6d9c80bSStephane Grosjean static void pita_setsda(void *data, int state)
200e6d9c80bSStephane Grosjean {
201e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data;
202e6d9c80bSStephane Grosjean u8 gp_out, gp_outen;
203e6d9c80bSStephane Grosjean
204e6d9c80bSStephane Grosjean /* set output sda always to 0 */
205e6d9c80bSStephane Grosjean gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA;
206e6d9c80bSStephane Grosjean writeb(gp_out, card->cfg_base + PITA_GPOUT);
207e6d9c80bSStephane Grosjean
208e6d9c80bSStephane Grosjean /* control output sda with GPOEN */
209e6d9c80bSStephane Grosjean gp_outen = readb(card->cfg_base + PITA_GPOEN);
210e6d9c80bSStephane Grosjean if (state)
211e6d9c80bSStephane Grosjean gp_outen &= ~PITA_GPIN_SDA;
212e6d9c80bSStephane Grosjean else
213e6d9c80bSStephane Grosjean gp_outen |= PITA_GPIN_SDA;
214e6d9c80bSStephane Grosjean
215e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN);
216e6d9c80bSStephane Grosjean }
217e6d9c80bSStephane Grosjean
pita_setscl(void * data,int state)218e6d9c80bSStephane Grosjean static void pita_setscl(void *data, int state)
219e6d9c80bSStephane Grosjean {
220e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data;
221e6d9c80bSStephane Grosjean u8 gp_out, gp_outen;
222e6d9c80bSStephane Grosjean
223e6d9c80bSStephane Grosjean /* set output scl always to 0 */
224e6d9c80bSStephane Grosjean gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL;
225e6d9c80bSStephane Grosjean writeb(gp_out, card->cfg_base + PITA_GPOUT);
226e6d9c80bSStephane Grosjean
227e6d9c80bSStephane Grosjean /* control output scl with GPOEN */
228e6d9c80bSStephane Grosjean gp_outen = readb(card->cfg_base + PITA_GPOEN);
229e6d9c80bSStephane Grosjean if (state)
230e6d9c80bSStephane Grosjean gp_outen &= ~PITA_GPIN_SCL;
231e6d9c80bSStephane Grosjean else
232e6d9c80bSStephane Grosjean gp_outen |= PITA_GPIN_SCL;
233e6d9c80bSStephane Grosjean
234e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN);
235e6d9c80bSStephane Grosjean }
236e6d9c80bSStephane Grosjean
pita_getsda(void * data)237e6d9c80bSStephane Grosjean static int pita_getsda(void *data)
238e6d9c80bSStephane Grosjean {
239e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data;
240e6d9c80bSStephane Grosjean
241e6d9c80bSStephane Grosjean /* set tristate */
242e6d9c80bSStephane Grosjean pita_set_sda_highz(card);
243e6d9c80bSStephane Grosjean
244e6d9c80bSStephane Grosjean return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0;
245e6d9c80bSStephane Grosjean }
246e6d9c80bSStephane Grosjean
pita_getscl(void * data)247e6d9c80bSStephane Grosjean static int pita_getscl(void *data)
248e6d9c80bSStephane Grosjean {
249e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data;
250e6d9c80bSStephane Grosjean
251e6d9c80bSStephane Grosjean /* set tristate */
252e6d9c80bSStephane Grosjean pita_set_scl_highz(card);
253e6d9c80bSStephane Grosjean
254e6d9c80bSStephane Grosjean return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0;
255e6d9c80bSStephane Grosjean }
256e6d9c80bSStephane Grosjean
2579b69aff9SMarc Kleine-Budde /* write commands to the LED chip though the I2C-bus of the PCAN-PCIeC */
peak_pciec_write_pca9553(struct peak_pciec_card * card,u8 offset,u8 data)258e6d9c80bSStephane Grosjean static int peak_pciec_write_pca9553(struct peak_pciec_card *card,
259e6d9c80bSStephane Grosjean u8 offset, u8 data)
260e6d9c80bSStephane Grosjean {
261e6d9c80bSStephane Grosjean u8 buffer[2] = {
262e6d9c80bSStephane Grosjean offset,
263e6d9c80bSStephane Grosjean data
264e6d9c80bSStephane Grosjean };
265e6d9c80bSStephane Grosjean struct i2c_msg msg = {
266e6d9c80bSStephane Grosjean .addr = PCA9553_1_SLAVEADDR,
267e6d9c80bSStephane Grosjean .len = 2,
268e6d9c80bSStephane Grosjean .buf = buffer,
269e6d9c80bSStephane Grosjean };
270e6d9c80bSStephane Grosjean int ret;
271e6d9c80bSStephane Grosjean
272e6d9c80bSStephane Grosjean /* cache led mask */
273fe1fa138SMarc Kleine-Budde if (offset == 5 && data == card->led_cache)
274e6d9c80bSStephane Grosjean return 0;
275e6d9c80bSStephane Grosjean
276e6d9c80bSStephane Grosjean ret = i2c_transfer(&card->led_chip, &msg, 1);
277e6d9c80bSStephane Grosjean if (ret < 0)
278e6d9c80bSStephane Grosjean return ret;
279e6d9c80bSStephane Grosjean
280e6d9c80bSStephane Grosjean if (offset == 5)
281e6d9c80bSStephane Grosjean card->led_cache = data;
282e6d9c80bSStephane Grosjean
283e6d9c80bSStephane Grosjean return 0;
284e6d9c80bSStephane Grosjean }
285e6d9c80bSStephane Grosjean
2869b69aff9SMarc Kleine-Budde /* delayed work callback used to control the LEDs */
peak_pciec_led_work(struct work_struct * work)287e6d9c80bSStephane Grosjean static void peak_pciec_led_work(struct work_struct *work)
288e6d9c80bSStephane Grosjean {
289e6d9c80bSStephane Grosjean struct peak_pciec_card *card =
290e6d9c80bSStephane Grosjean container_of(work, struct peak_pciec_card, led_work.work);
291e6d9c80bSStephane Grosjean struct net_device *netdev;
292e6d9c80bSStephane Grosjean u8 new_led = card->led_cache;
293e6d9c80bSStephane Grosjean int i, up_count = 0;
294e6d9c80bSStephane Grosjean
295e6d9c80bSStephane Grosjean /* first check what is to do */
296e6d9c80bSStephane Grosjean for (i = 0; i < card->chan_count; i++) {
297e6d9c80bSStephane Grosjean /* default is: not configured */
298e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i);
299e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_ON(i);
300e6d9c80bSStephane Grosjean
301e6d9c80bSStephane Grosjean netdev = card->channel[i].netdev;
302e6d9c80bSStephane Grosjean if (!netdev || !(netdev->flags & IFF_UP))
303e6d9c80bSStephane Grosjean continue;
304e6d9c80bSStephane Grosjean
305e6d9c80bSStephane Grosjean up_count++;
306e6d9c80bSStephane Grosjean
307e6d9c80bSStephane Grosjean /* no activity (but configured) */
308e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i);
309e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_SLOW(i);
310e6d9c80bSStephane Grosjean
311e6d9c80bSStephane Grosjean /* if bytes counters changed, set fast blinking led */
312e6d9c80bSStephane Grosjean if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) {
313e6d9c80bSStephane Grosjean card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes;
314e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i);
315e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_FAST(i);
316e6d9c80bSStephane Grosjean }
317e6d9c80bSStephane Grosjean if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) {
318e6d9c80bSStephane Grosjean card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes;
319e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i);
320e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_FAST(i);
321e6d9c80bSStephane Grosjean }
322e6d9c80bSStephane Grosjean }
323e6d9c80bSStephane Grosjean
324e6d9c80bSStephane Grosjean /* check if LS0 settings changed, only update i2c if so */
325e6d9c80bSStephane Grosjean peak_pciec_write_pca9553(card, 5, new_led);
326e6d9c80bSStephane Grosjean
327e6d9c80bSStephane Grosjean /* restart timer (except if no more configured channels) */
328e6d9c80bSStephane Grosjean if (up_count)
329e6d9c80bSStephane Grosjean schedule_delayed_work(&card->led_work, HZ);
330e6d9c80bSStephane Grosjean }
331e6d9c80bSStephane Grosjean
3329b69aff9SMarc Kleine-Budde /* set LEDs blinking state */
peak_pciec_set_leds(struct peak_pciec_card * card,u8 led_mask,u8 s)333e6d9c80bSStephane Grosjean static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s)
334e6d9c80bSStephane Grosjean {
335e6d9c80bSStephane Grosjean u8 new_led = card->led_cache;
336e6d9c80bSStephane Grosjean int i;
337e6d9c80bSStephane Grosjean
338e6d9c80bSStephane Grosjean /* first check what is to do */
339e6d9c80bSStephane Grosjean for (i = 0; i < card->chan_count; i++)
340e6d9c80bSStephane Grosjean if (led_mask & PCA9553_LED(i)) {
341e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i);
342e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_STATE(s, i);
343e6d9c80bSStephane Grosjean }
344e6d9c80bSStephane Grosjean
345e6d9c80bSStephane Grosjean /* check if LS0 settings changed, only update i2c if so */
346e6d9c80bSStephane Grosjean peak_pciec_write_pca9553(card, 5, new_led);
347e6d9c80bSStephane Grosjean }
348e6d9c80bSStephane Grosjean
3499b69aff9SMarc Kleine-Budde /* start one second delayed work to control LEDs */
peak_pciec_start_led_work(struct peak_pciec_card * card)350e6d9c80bSStephane Grosjean static void peak_pciec_start_led_work(struct peak_pciec_card *card)
351e6d9c80bSStephane Grosjean {
352e6d9c80bSStephane Grosjean schedule_delayed_work(&card->led_work, HZ);
353e6d9c80bSStephane Grosjean }
354e6d9c80bSStephane Grosjean
3559b69aff9SMarc Kleine-Budde /* stop LEDs delayed work */
peak_pciec_stop_led_work(struct peak_pciec_card * card)356e6d9c80bSStephane Grosjean static void peak_pciec_stop_led_work(struct peak_pciec_card *card)
357e6d9c80bSStephane Grosjean {
358e6d9c80bSStephane Grosjean cancel_delayed_work_sync(&card->led_work);
359e6d9c80bSStephane Grosjean }
360e6d9c80bSStephane Grosjean
3619b69aff9SMarc Kleine-Budde /* initialize the PCA9553 4-bit I2C-bus LED chip */
peak_pciec_init_leds(struct peak_pciec_card * card)362e6d9c80bSStephane Grosjean static int peak_pciec_init_leds(struct peak_pciec_card *card)
363e6d9c80bSStephane Grosjean {
364e6d9c80bSStephane Grosjean int err;
365e6d9c80bSStephane Grosjean
366e6d9c80bSStephane Grosjean /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */
367e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 1, 44 / 1);
368e6d9c80bSStephane Grosjean if (err)
369e6d9c80bSStephane Grosjean return err;
370e6d9c80bSStephane Grosjean
371e6d9c80bSStephane Grosjean /* duty cycle 0: 50% */
372e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 2, 0x80);
373e6d9c80bSStephane Grosjean if (err)
374e6d9c80bSStephane Grosjean return err;
375e6d9c80bSStephane Grosjean
376e6d9c80bSStephane Grosjean /* prescaler for frequency 1: "FAST" = 5 Hz */
377e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 3, 44 / 5);
378e6d9c80bSStephane Grosjean if (err)
379e6d9c80bSStephane Grosjean return err;
380e6d9c80bSStephane Grosjean
381e6d9c80bSStephane Grosjean /* duty cycle 1: 50% */
382e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 4, 0x80);
383e6d9c80bSStephane Grosjean if (err)
384e6d9c80bSStephane Grosjean return err;
385e6d9c80bSStephane Grosjean
386e6d9c80bSStephane Grosjean /* switch LEDs to initial state */
387e6d9c80bSStephane Grosjean return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT);
388e6d9c80bSStephane Grosjean }
389e6d9c80bSStephane Grosjean
3909b69aff9SMarc Kleine-Budde /* restore LEDs state to off peak_pciec_leds_exit */
peak_pciec_leds_exit(struct peak_pciec_card * card)391e6d9c80bSStephane Grosjean static void peak_pciec_leds_exit(struct peak_pciec_card *card)
392e6d9c80bSStephane Grosjean {
393e6d9c80bSStephane Grosjean /* switch LEDs to off */
394e6d9c80bSStephane Grosjean peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL);
395e6d9c80bSStephane Grosjean }
396e6d9c80bSStephane Grosjean
3979b69aff9SMarc Kleine-Budde /* normal write sja1000 register method overloaded to catch when controller
398e6d9c80bSStephane Grosjean * is started or stopped, to control leds
399e6d9c80bSStephane Grosjean */
peak_pciec_write_reg(const struct sja1000_priv * priv,int port,u8 val)400e6d9c80bSStephane Grosjean static void peak_pciec_write_reg(const struct sja1000_priv *priv,
401e6d9c80bSStephane Grosjean int port, u8 val)
402e6d9c80bSStephane Grosjean {
403e6d9c80bSStephane Grosjean struct peak_pci_chan *chan = priv->priv;
404e6d9c80bSStephane Grosjean struct peak_pciec_card *card = chan->pciec_card;
405e6d9c80bSStephane Grosjean int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE;
406e6d9c80bSStephane Grosjean
407e6d9c80bSStephane Grosjean /* sja1000 register changes control the leds state */
40806e1d1d7SOliver Hartkopp if (port == SJA1000_MOD)
409e6d9c80bSStephane Grosjean switch (val) {
410e6d9c80bSStephane Grosjean case MOD_RM:
411e6d9c80bSStephane Grosjean /* Reset Mode: set led on */
412e6d9c80bSStephane Grosjean peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON);
413e6d9c80bSStephane Grosjean break;
414e6d9c80bSStephane Grosjean case 0x00:
415e6d9c80bSStephane Grosjean /* Normal Mode: led slow blinking and start led timer */
416e6d9c80bSStephane Grosjean peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW);
417e6d9c80bSStephane Grosjean peak_pciec_start_led_work(card);
418e6d9c80bSStephane Grosjean break;
419e6d9c80bSStephane Grosjean default:
420e6d9c80bSStephane Grosjean break;
421e6d9c80bSStephane Grosjean }
422e6d9c80bSStephane Grosjean
423e6d9c80bSStephane Grosjean /* call base function */
424e6d9c80bSStephane Grosjean peak_pci_write_reg(priv, port, val);
425e6d9c80bSStephane Grosjean }
426e6d9c80bSStephane Grosjean
4271f0dee39SNishka Dasgupta static const struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = {
428e6d9c80bSStephane Grosjean .setsda = pita_setsda,
429e6d9c80bSStephane Grosjean .setscl = pita_setscl,
430e6d9c80bSStephane Grosjean .getsda = pita_getsda,
431e6d9c80bSStephane Grosjean .getscl = pita_getscl,
432e6d9c80bSStephane Grosjean .udelay = 10,
433e6d9c80bSStephane Grosjean .timeout = HZ,
434e6d9c80bSStephane Grosjean };
435e6d9c80bSStephane Grosjean
peak_pciec_probe(struct pci_dev * pdev,struct net_device * dev)436e6d9c80bSStephane Grosjean static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
437e6d9c80bSStephane Grosjean {
438e6d9c80bSStephane Grosjean struct sja1000_priv *priv = netdev_priv(dev);
439e6d9c80bSStephane Grosjean struct peak_pci_chan *chan = priv->priv;
440e6d9c80bSStephane Grosjean struct peak_pciec_card *card;
441e6d9c80bSStephane Grosjean int err;
442e6d9c80bSStephane Grosjean
443e6d9c80bSStephane Grosjean /* copy i2c object address from 1st channel */
444e6d9c80bSStephane Grosjean if (chan->prev_dev) {
445e6d9c80bSStephane Grosjean struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev);
446e6d9c80bSStephane Grosjean struct peak_pci_chan *prev_chan = prev_priv->priv;
447e6d9c80bSStephane Grosjean
448e6d9c80bSStephane Grosjean card = prev_chan->pciec_card;
449e6d9c80bSStephane Grosjean if (!card)
450e6d9c80bSStephane Grosjean return -ENODEV;
451e6d9c80bSStephane Grosjean
452e6d9c80bSStephane Grosjean /* channel is the first one: do the init part */
453e6d9c80bSStephane Grosjean } else {
454e6d9c80bSStephane Grosjean /* create the bit banging I2C adapter structure */
455fe1fa138SMarc Kleine-Budde card = kzalloc(sizeof(*card), GFP_KERNEL);
45609da6c5fSJoe Perches if (!card)
457e6d9c80bSStephane Grosjean return -ENOMEM;
458e6d9c80bSStephane Grosjean
459e6d9c80bSStephane Grosjean card->cfg_base = chan->cfg_base;
460e6d9c80bSStephane Grosjean card->reg_base = priv->reg_base;
461e6d9c80bSStephane Grosjean
462e6d9c80bSStephane Grosjean card->led_chip.owner = THIS_MODULE;
463e6d9c80bSStephane Grosjean card->led_chip.dev.parent = &pdev->dev;
464e6d9c80bSStephane Grosjean card->led_chip.algo_data = &card->i2c_bit;
465e6d9c80bSStephane Grosjean strncpy(card->led_chip.name, "peak_i2c",
466e6d9c80bSStephane Grosjean sizeof(card->led_chip.name));
467e6d9c80bSStephane Grosjean
468e6d9c80bSStephane Grosjean card->i2c_bit = peak_pciec_i2c_bit_ops;
469e6d9c80bSStephane Grosjean card->i2c_bit.udelay = 10;
470e6d9c80bSStephane Grosjean card->i2c_bit.timeout = HZ;
471e6d9c80bSStephane Grosjean card->i2c_bit.data = card;
472e6d9c80bSStephane Grosjean
473e6d9c80bSStephane Grosjean peak_pciec_init_pita_gpio(card);
474e6d9c80bSStephane Grosjean
475e6d9c80bSStephane Grosjean err = i2c_bit_add_bus(&card->led_chip);
476e6d9c80bSStephane Grosjean if (err) {
477e6d9c80bSStephane Grosjean dev_err(&pdev->dev, "i2c init failed\n");
478e6d9c80bSStephane Grosjean goto pciec_init_err_1;
479e6d9c80bSStephane Grosjean }
480e6d9c80bSStephane Grosjean
481e6d9c80bSStephane Grosjean err = peak_pciec_init_leds(card);
482e6d9c80bSStephane Grosjean if (err) {
483e6d9c80bSStephane Grosjean dev_err(&pdev->dev, "leds hardware init failed\n");
484e6d9c80bSStephane Grosjean goto pciec_init_err_2;
485e6d9c80bSStephane Grosjean }
486e6d9c80bSStephane Grosjean
487e6d9c80bSStephane Grosjean INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work);
488e6d9c80bSStephane Grosjean /* PCAN-ExpressCard needs its own callback for leds */
489e6d9c80bSStephane Grosjean priv->write_reg = peak_pciec_write_reg;
490e6d9c80bSStephane Grosjean }
491e6d9c80bSStephane Grosjean
492e6d9c80bSStephane Grosjean chan->pciec_card = card;
493e6d9c80bSStephane Grosjean card->channel[card->chan_count++].netdev = dev;
494e6d9c80bSStephane Grosjean
495e6d9c80bSStephane Grosjean return 0;
496e6d9c80bSStephane Grosjean
497e6d9c80bSStephane Grosjean pciec_init_err_2:
498e6d9c80bSStephane Grosjean i2c_del_adapter(&card->led_chip);
499e6d9c80bSStephane Grosjean
500e6d9c80bSStephane Grosjean pciec_init_err_1:
501e6d9c80bSStephane Grosjean peak_pciec_init_pita_gpio(card);
502e6d9c80bSStephane Grosjean kfree(card);
503e6d9c80bSStephane Grosjean
504e6d9c80bSStephane Grosjean return err;
505e6d9c80bSStephane Grosjean }
506e6d9c80bSStephane Grosjean
peak_pciec_remove(struct peak_pciec_card * card)507e6d9c80bSStephane Grosjean static void peak_pciec_remove(struct peak_pciec_card *card)
508e6d9c80bSStephane Grosjean {
509e6d9c80bSStephane Grosjean peak_pciec_stop_led_work(card);
510e6d9c80bSStephane Grosjean peak_pciec_leds_exit(card);
511e6d9c80bSStephane Grosjean i2c_del_adapter(&card->led_chip);
512e6d9c80bSStephane Grosjean peak_pciec_init_pita_gpio(card);
513e6d9c80bSStephane Grosjean kfree(card);
514e6d9c80bSStephane Grosjean }
515e6d9c80bSStephane Grosjean
516e6d9c80bSStephane Grosjean #else /* CONFIG_CAN_PEAK_PCIEC */
517e6d9c80bSStephane Grosjean
5189b69aff9SMarc Kleine-Budde /* Placebo functions when PCAN-ExpressCard support is not selected */
peak_pciec_probe(struct pci_dev * pdev,struct net_device * dev)519e6d9c80bSStephane Grosjean static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
520e6d9c80bSStephane Grosjean {
521e6d9c80bSStephane Grosjean return -ENODEV;
522e6d9c80bSStephane Grosjean }
523e6d9c80bSStephane Grosjean
peak_pciec_remove(struct peak_pciec_card * card)524e6d9c80bSStephane Grosjean static inline void peak_pciec_remove(struct peak_pciec_card *card)
525e6d9c80bSStephane Grosjean {
526e6d9c80bSStephane Grosjean }
527e6d9c80bSStephane Grosjean #endif /* CONFIG_CAN_PEAK_PCIEC */
528e6d9c80bSStephane Grosjean
peak_pci_read_reg(const struct sja1000_priv * priv,int port)52938034518SWolfgang Grandegger static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port)
53038034518SWolfgang Grandegger {
53138034518SWolfgang Grandegger return readb(priv->reg_base + (port << 2));
53238034518SWolfgang Grandegger }
53338034518SWolfgang Grandegger
peak_pci_write_reg(const struct sja1000_priv * priv,int port,u8 val)53438034518SWolfgang Grandegger static void peak_pci_write_reg(const struct sja1000_priv *priv,
53538034518SWolfgang Grandegger int port, u8 val)
53638034518SWolfgang Grandegger {
53738034518SWolfgang Grandegger writeb(val, priv->reg_base + (port << 2));
53838034518SWolfgang Grandegger }
53938034518SWolfgang Grandegger
peak_pci_post_irq(const struct sja1000_priv * priv)54038034518SWolfgang Grandegger static void peak_pci_post_irq(const struct sja1000_priv *priv)
54138034518SWolfgang Grandegger {
54238034518SWolfgang Grandegger struct peak_pci_chan *chan = priv->priv;
54338034518SWolfgang Grandegger u16 icr;
54438034518SWolfgang Grandegger
54538034518SWolfgang Grandegger /* Select and clear in PITA stored interrupt */
54638034518SWolfgang Grandegger icr = readw(chan->cfg_base + PITA_ICR);
54738034518SWolfgang Grandegger if (icr & chan->icr_mask)
54838034518SWolfgang Grandegger writew(chan->icr_mask, chan->cfg_base + PITA_ICR);
54938034518SWolfgang Grandegger }
55038034518SWolfgang Grandegger
peak_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)5511dd06ae8SGreg Kroah-Hartman static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
55238034518SWolfgang Grandegger {
55338034518SWolfgang Grandegger struct sja1000_priv *priv;
55438034518SWolfgang Grandegger struct peak_pci_chan *chan;
5550b5a958cSStephane Grosjean struct net_device *dev, *prev_dev;
55638034518SWolfgang Grandegger void __iomem *cfg_base, *reg_base;
55738034518SWolfgang Grandegger u16 sub_sys_id, icr;
55838034518SWolfgang Grandegger int i, err, channels;
559805ff68cSStephane Grosjean char fw_str[14] = "";
56038034518SWolfgang Grandegger
56138034518SWolfgang Grandegger err = pci_enable_device(pdev);
56238034518SWolfgang Grandegger if (err)
56338034518SWolfgang Grandegger return err;
56438034518SWolfgang Grandegger
56538034518SWolfgang Grandegger err = pci_request_regions(pdev, DRV_NAME);
56638034518SWolfgang Grandegger if (err)
56738034518SWolfgang Grandegger goto failure_disable_pci;
56838034518SWolfgang Grandegger
56938034518SWolfgang Grandegger err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);
57038034518SWolfgang Grandegger if (err)
57138034518SWolfgang Grandegger goto failure_release_regions;
57238034518SWolfgang Grandegger
57338034518SWolfgang Grandegger dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n",
57438034518SWolfgang Grandegger pdev->vendor, pdev->device, sub_sys_id);
57538034518SWolfgang Grandegger
57638034518SWolfgang Grandegger err = pci_write_config_word(pdev, 0x44, 0);
57738034518SWolfgang Grandegger if (err)
57838034518SWolfgang Grandegger goto failure_release_regions;
57938034518SWolfgang Grandegger
58038034518SWolfgang Grandegger if (sub_sys_id >= 12)
58138034518SWolfgang Grandegger channels = 4;
58238034518SWolfgang Grandegger else if (sub_sys_id >= 10)
58338034518SWolfgang Grandegger channels = 3;
58438034518SWolfgang Grandegger else if (sub_sys_id >= 4)
58538034518SWolfgang Grandegger channels = 2;
58638034518SWolfgang Grandegger else
58738034518SWolfgang Grandegger channels = 1;
58838034518SWolfgang Grandegger
58938034518SWolfgang Grandegger cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE);
59038034518SWolfgang Grandegger if (!cfg_base) {
59138034518SWolfgang Grandegger dev_err(&pdev->dev, "failed to map PCI resource #0\n");
5924a4bfdcdSPeter Senna Tschudin err = -ENOMEM;
59338034518SWolfgang Grandegger goto failure_release_regions;
59438034518SWolfgang Grandegger }
59538034518SWolfgang Grandegger
59638034518SWolfgang Grandegger reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels);
59738034518SWolfgang Grandegger if (!reg_base) {
59838034518SWolfgang Grandegger dev_err(&pdev->dev, "failed to map PCI resource #1\n");
5994a4bfdcdSPeter Senna Tschudin err = -ENOMEM;
60038034518SWolfgang Grandegger goto failure_unmap_cfg_base;
60138034518SWolfgang Grandegger }
60238034518SWolfgang Grandegger
60338034518SWolfgang Grandegger /* Set GPIO control register */
60438034518SWolfgang Grandegger writew(0x0005, cfg_base + PITA_GPIOICR + 2);
60538034518SWolfgang Grandegger /* Enable all channels of this card */
60638034518SWolfgang Grandegger writeb(0x00, cfg_base + PITA_GPIOICR);
60738034518SWolfgang Grandegger /* Toggle reset */
60838034518SWolfgang Grandegger writeb(0x05, cfg_base + PITA_MISC + 3);
609276b7361SJia-Ju Bai usleep_range(5000, 6000);
61038034518SWolfgang Grandegger /* Leave parport mux mode */
61138034518SWolfgang Grandegger writeb(0x04, cfg_base + PITA_MISC + 3);
61238034518SWolfgang Grandegger
613805ff68cSStephane Grosjean /* FPGA equipped card if not 0 */
614805ff68cSStephane Grosjean if (readl(cfg_base + PEAK_VER_REG1)) {
615805ff68cSStephane Grosjean /* FPGA card: display version of the running firmware */
616805ff68cSStephane Grosjean u32 fw_ver = readl(cfg_base + PEAK_VER_REG2);
617805ff68cSStephane Grosjean
618805ff68cSStephane Grosjean snprintf(fw_str, sizeof(fw_str), " FW v%u.%u.%u",
619805ff68cSStephane Grosjean (fw_ver >> 12) & 0xf,
620805ff68cSStephane Grosjean (fw_ver >> 8) & 0xf,
621805ff68cSStephane Grosjean (fw_ver >> 4) & 0xf);
622805ff68cSStephane Grosjean }
623805ff68cSStephane Grosjean
624805ff68cSStephane Grosjean /* Display commercial name (and, eventually, FW version) of the card */
625805ff68cSStephane Grosjean dev_info(&pdev->dev, "%ux CAN %s%s\n",
626805ff68cSStephane Grosjean channels, (const char *)ent->driver_data, fw_str);
627805ff68cSStephane Grosjean
62838034518SWolfgang Grandegger icr = readw(cfg_base + PITA_ICR + 2);
62938034518SWolfgang Grandegger
63038034518SWolfgang Grandegger for (i = 0; i < channels; i++) {
63138034518SWolfgang Grandegger dev = alloc_sja1000dev(sizeof(struct peak_pci_chan));
63238034518SWolfgang Grandegger if (!dev) {
63338034518SWolfgang Grandegger err = -ENOMEM;
63438034518SWolfgang Grandegger goto failure_remove_channels;
63538034518SWolfgang Grandegger }
63638034518SWolfgang Grandegger
63738034518SWolfgang Grandegger priv = netdev_priv(dev);
63838034518SWolfgang Grandegger chan = priv->priv;
63938034518SWolfgang Grandegger
64038034518SWolfgang Grandegger chan->cfg_base = cfg_base;
64138034518SWolfgang Grandegger priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE;
64238034518SWolfgang Grandegger
64338034518SWolfgang Grandegger priv->read_reg = peak_pci_read_reg;
64438034518SWolfgang Grandegger priv->write_reg = peak_pci_write_reg;
64538034518SWolfgang Grandegger priv->post_irq = peak_pci_post_irq;
64638034518SWolfgang Grandegger
64738034518SWolfgang Grandegger priv->can.clock.freq = PEAK_PCI_CAN_CLOCK;
64838034518SWolfgang Grandegger priv->ocr = PEAK_PCI_OCR;
64938034518SWolfgang Grandegger priv->cdr = PEAK_PCI_CDR;
65038034518SWolfgang Grandegger /* Neither a slave nor a single device distributes the clock */
65138034518SWolfgang Grandegger if (channels == 1 || i > 0)
65238034518SWolfgang Grandegger priv->cdr |= CDR_CLK_OFF;
65338034518SWolfgang Grandegger
65438034518SWolfgang Grandegger /* Setup interrupt handling */
65538034518SWolfgang Grandegger priv->irq_flags = IRQF_SHARED;
65638034518SWolfgang Grandegger dev->irq = pdev->irq;
65738034518SWolfgang Grandegger
65838034518SWolfgang Grandegger chan->icr_mask = peak_pci_icr_masks[i];
65938034518SWolfgang Grandegger icr |= chan->icr_mask;
66038034518SWolfgang Grandegger
66138034518SWolfgang Grandegger SET_NETDEV_DEV(dev, &pdev->dev);
6623e66d013SChristopher R. Baker dev->dev_id = i;
66338034518SWolfgang Grandegger
66438034518SWolfgang Grandegger /* Create chain of SJA1000 devices */
66529830406SStephane Grosjean chan->prev_dev = pci_get_drvdata(pdev);
66629830406SStephane Grosjean pci_set_drvdata(pdev, dev);
66738034518SWolfgang Grandegger
6689b69aff9SMarc Kleine-Budde /* PCAN-ExpressCard needs some additional i2c init.
669e6d9c80bSStephane Grosjean * This must be done *before* register_sja1000dev() but
670e6d9c80bSStephane Grosjean * *after* devices linkage
671e6d9c80bSStephane Grosjean */
6724be0015cSOliver Hartkopp if (pdev->device == PEAK_PCIEC_DEVICE_ID ||
6734be0015cSOliver Hartkopp pdev->device == PEAK_PCIEC34_DEVICE_ID) {
674e6d9c80bSStephane Grosjean err = peak_pciec_probe(pdev, dev);
675e6d9c80bSStephane Grosjean if (err) {
676e6d9c80bSStephane Grosjean dev_err(&pdev->dev,
677e6d9c80bSStephane Grosjean "failed to probe device (err %d)\n",
678e6d9c80bSStephane Grosjean err);
679e6d9c80bSStephane Grosjean goto failure_free_dev;
680e6d9c80bSStephane Grosjean }
681e6d9c80bSStephane Grosjean }
682e6d9c80bSStephane Grosjean
683e6d9c80bSStephane Grosjean err = register_sja1000dev(dev);
684e6d9c80bSStephane Grosjean if (err) {
685e6d9c80bSStephane Grosjean dev_err(&pdev->dev, "failed to register device\n");
686e6d9c80bSStephane Grosjean goto failure_free_dev;
687e6d9c80bSStephane Grosjean }
688e6d9c80bSStephane Grosjean
68938034518SWolfgang Grandegger dev_info(&pdev->dev,
69038034518SWolfgang Grandegger "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n",
69138034518SWolfgang Grandegger dev->name, priv->reg_base, chan->cfg_base, dev->irq);
69238034518SWolfgang Grandegger }
69338034518SWolfgang Grandegger
69438034518SWolfgang Grandegger /* Enable interrupts */
69538034518SWolfgang Grandegger writew(icr, cfg_base + PITA_ICR + 2);
69638034518SWolfgang Grandegger
69738034518SWolfgang Grandegger return 0;
69838034518SWolfgang Grandegger
699e6d9c80bSStephane Grosjean failure_free_dev:
700e6d9c80bSStephane Grosjean pci_set_drvdata(pdev, chan->prev_dev);
701e6d9c80bSStephane Grosjean free_sja1000dev(dev);
702e6d9c80bSStephane Grosjean
70338034518SWolfgang Grandegger failure_remove_channels:
70438034518SWolfgang Grandegger /* Disable interrupts */
70538034518SWolfgang Grandegger writew(0x0, cfg_base + PITA_ICR + 2);
70638034518SWolfgang Grandegger
707e6d9c80bSStephane Grosjean chan = NULL;
7080b5a958cSStephane Grosjean for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) {
70938034518SWolfgang Grandegger priv = netdev_priv(dev);
71038034518SWolfgang Grandegger chan = priv->priv;
7110b5a958cSStephane Grosjean prev_dev = chan->prev_dev;
7120b5a958cSStephane Grosjean
7130b5a958cSStephane Grosjean unregister_sja1000dev(dev);
7140b5a958cSStephane Grosjean free_sja1000dev(dev);
71538034518SWolfgang Grandegger }
71638034518SWolfgang Grandegger
717e6d9c80bSStephane Grosjean /* free any PCIeC resources too */
718e6d9c80bSStephane Grosjean if (chan && chan->pciec_card)
719e6d9c80bSStephane Grosjean peak_pciec_remove(chan->pciec_card);
720e6d9c80bSStephane Grosjean
72138034518SWolfgang Grandegger pci_iounmap(pdev, reg_base);
72238034518SWolfgang Grandegger
72338034518SWolfgang Grandegger failure_unmap_cfg_base:
72438034518SWolfgang Grandegger pci_iounmap(pdev, cfg_base);
72538034518SWolfgang Grandegger
72638034518SWolfgang Grandegger failure_release_regions:
72738034518SWolfgang Grandegger pci_release_regions(pdev);
72838034518SWolfgang Grandegger
72938034518SWolfgang Grandegger failure_disable_pci:
73038034518SWolfgang Grandegger pci_disable_device(pdev);
73138034518SWolfgang Grandegger
7325c2cb02eSStephane Grosjean /* pci_xxx_config_word() return positive PCIBIOS_xxx error codes while
7335c2cb02eSStephane Grosjean * the probe() function must return a negative errno in case of failure
7349b69aff9SMarc Kleine-Budde * (err is unchanged if negative)
7359b69aff9SMarc Kleine-Budde */
7365c2cb02eSStephane Grosjean return pcibios_err_to_errno(err);
73738034518SWolfgang Grandegger }
73838034518SWolfgang Grandegger
peak_pci_remove(struct pci_dev * pdev)7393c8ac0f2SBill Pemberton static void peak_pci_remove(struct pci_dev *pdev)
74038034518SWolfgang Grandegger {
74129830406SStephane Grosjean struct net_device *dev = pci_get_drvdata(pdev); /* Last device */
74238034518SWolfgang Grandegger struct sja1000_priv *priv = netdev_priv(dev);
74338034518SWolfgang Grandegger struct peak_pci_chan *chan = priv->priv;
74438034518SWolfgang Grandegger void __iomem *cfg_base = chan->cfg_base;
74538034518SWolfgang Grandegger void __iomem *reg_base = priv->reg_base;
74638034518SWolfgang Grandegger
74738034518SWolfgang Grandegger /* Disable interrupts */
74838034518SWolfgang Grandegger writew(0x0, cfg_base + PITA_ICR + 2);
74938034518SWolfgang Grandegger
75038034518SWolfgang Grandegger /* Loop over all registered devices */
75138034518SWolfgang Grandegger while (1) {
7520b5a958cSStephane Grosjean struct net_device *prev_dev = chan->prev_dev;
7530b5a958cSStephane Grosjean
75438034518SWolfgang Grandegger dev_info(&pdev->dev, "removing device %s\n", dev->name);
755*949fe9b3SZheyu Ma /* do that only for first channel */
756*949fe9b3SZheyu Ma if (!prev_dev && chan->pciec_card)
757*949fe9b3SZheyu Ma peak_pciec_remove(chan->pciec_card);
75838034518SWolfgang Grandegger unregister_sja1000dev(dev);
75938034518SWolfgang Grandegger free_sja1000dev(dev);
7600b5a958cSStephane Grosjean dev = prev_dev;
761e6d9c80bSStephane Grosjean
762*949fe9b3SZheyu Ma if (!dev)
76338034518SWolfgang Grandegger break;
76438034518SWolfgang Grandegger priv = netdev_priv(dev);
76538034518SWolfgang Grandegger chan = priv->priv;
76638034518SWolfgang Grandegger }
76738034518SWolfgang Grandegger
76838034518SWolfgang Grandegger pci_iounmap(pdev, reg_base);
76938034518SWolfgang Grandegger pci_iounmap(pdev, cfg_base);
77038034518SWolfgang Grandegger pci_release_regions(pdev);
77138034518SWolfgang Grandegger pci_disable_device(pdev);
77238034518SWolfgang Grandegger }
77338034518SWolfgang Grandegger
77438034518SWolfgang Grandegger static struct pci_driver peak_pci_driver = {
77538034518SWolfgang Grandegger .name = DRV_NAME,
77638034518SWolfgang Grandegger .id_table = peak_pci_tbl,
77738034518SWolfgang Grandegger .probe = peak_pci_probe,
7783c8ac0f2SBill Pemberton .remove = peak_pci_remove,
77938034518SWolfgang Grandegger };
78038034518SWolfgang Grandegger
781fb7944b3SAxel Lin module_pci_driver(peak_pci_driver);
782