Home
last modified time | relevance | path

Searched +full:i2c +full:- +full:fast +full:- +full:mode (Results 1 – 25 of 334) sorted by relevance

12345678910>>...14

/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-pxa.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP I2C controller
10 - Rob Herring <robh+dt@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
17 - mrvl,i2c-polling
20 - interrupts
[all …]
H A Dnvidia,tegra20-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
11 title: NVIDIA Tegra I2C controller driver
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
18 only support master mode of I2C communication. Driver of I2C
[all …]
H A Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
[all …]
H A Di2c-exynos5.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung's High Speed I2C controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The Samsung's High Speed I2C controller is used to interface with I2C devices
18 define USI node in device tree file, choosing "i2c" configuration. Please see
19 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
24 - enum:
[all …]
H A Di2c-rk3x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
[all …]
/openbmc/linux/drivers/i2c/busses/
H A Di2c-synquacer.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/i2c.h>
25 /* I2C register address definitions */
35 /* I2C register bit definitions */
56 #define SYNQUACER_I2C_CCR_FM BIT(6) // Speed Mode Select
68 /* STANDARD MODE frequency */
70 DIV_ROUND_UP(DIV_ROUND_UP((rate), I2C_MAX_STANDARD_MODE_FREQ) - 2, 2)
71 /* FAST MODE frequency */
73 DIV_ROUND_UP((DIV_ROUND_UP((rate), I2C_MAX_FAST_MODE_FREQ) - 2) * 2, 3)
76 /* calculate the value of CS bits in CCR register on standard mode */
[all …]
H A Di2c-designware-master.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Synopsys DesignWare I2C adapter driver (master only).
5 * Based on the TI DAVINCI I2C adapter driver.
16 #include <linux/i2c.h>
25 #include "i2c-designware-core.h"
34 regmap_write(dev->map, DW_IC_TX_TL, dev->tx_fifo_depth / 2); in i2c_dw_configure_fifo_master()
35 regmap_write(dev->map, DW_IC_RX_TL, 0); in i2c_dw_configure_fifo_master()
37 /* Configure the I2C master */ in i2c_dw_configure_fifo_master()
38 regmap_write(dev->map, DW_IC_CON, dev->master_cfg); in i2c_dw_configure_fifo_master()
45 struct i2c_timings *t = &dev->timings; in i2c_dw_set_timings_master()
[all …]
H A Di2c-stm32f4.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics STM32 I2C controller
5 * This I2C controller is described in the STM32F429/439 Soc reference manual.
13 * This driver is based on i2c-st.c
20 #include <linux/i2c.h>
31 #include "i2c-stm32.h"
33 /* STM32F4 I2C offset registers */
43 /* STM32F4 I2C control 1*/
50 /* STM32F4 I2C control 2 */
60 /* STM32F4 I2C Status 1 */
[all …]
H A Di2c-designware-core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Synopsys DesignWare I2C adapter driver.
5 * Based on the TI DAVINCI I2C adapter driver.
17 #include <linux/i2c.h>
193 * struct dw_i2c_dev - private i2c-designware data
203 * @slave: represent an I2C slave device
215 * @status: i2c master status, one of STATUS_*
217 * @irq: interrupt number for the i2c master
219 * @adapter: i2c subsystem adapter node
225 * @rx_outstanding: current master-rx elements in tx fifo
[all …]
H A Di2c-nomadik.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2009 ST-Ericsson SA
6 * I2C master mode controller driver, used in Nomadik 8815
17 #include <linux/i2c.h>
25 #define DRIVER_NAME "nmk-i2c"
27 /* I2C Controller register offsets */
46 #define I2C_CR_OM (0x3 << 1) /* Operating mode */
47 #define I2C_CR_SAM (0x1 << 3) /* Slave addressing mode */
48 #define I2C_CR_SM (0x3 << 4) /* Speed mode */
49 #define I2C_CR_SGCM (0x1 << 6) /* Slave general call mode */
[all …]
H A Di2c-tegra.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/i2c/busses/i2c-tegra.c
14 #include <linux/dma-mapping.h>
16 #include <linux/i2c.h>
51 #define I2C_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 5)
52 #define I2C_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 2)
130 #define I2C_MST_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 4)
131 #define I2C_MST_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 16)
144 * I2C Controller will use PIO mode for transfers up to 32 bytes in order to
154 * @MSG_END_REPEAT_START: Send repeat-start.
[all …]
H A Di2c-rk3x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for I2C adapter in Rockchip RK3xxx SoC
11 #include <linux/i2c.h>
83 * struct i2c_spec_values - I2C specification values for various modes
87 * @min_setup_start_ns: min set-up time for a repeated START conditio
89 * @min_data_setup_ns: min data set-up time
90 * @min_setup_stop_ns: min set-up time for STOP condition
139 * struct rk3x_i2c_calced_timings - calculated V1 timings
162 * struct rk3x_i2c_soc_data - SOC-specific data
163 * @grf_offset: offset inside the grf regmap for setting the i2c type
[all …]
H A Di2c-designware-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Synopsys DesignWare I2C adapter driver.
5 * Based on the TI DAVINCI I2C adapter driver.
18 #include <linux/i2c.h>
29 #include "i2c-designware-core.h"
33 "slave address not acknowledged (7bit mode)",
35 "first address byte not acknowledged (10bit mode)",
37 "second address byte not acknowledged (10bit mode)",
49 "trying to read when restart is disabled (10bit mode)",
59 "incorrect slave-transmitter mode configuration",
[all …]
/openbmc/u-boot/drivers/i2c/
H A DKconfig2 # I2C subsystem configuration
5 menu "I2C support"
8 bool "Enable Driver Model for I2C drivers"
11 Enable driver model for I2C. The I2C uclass interface: probe, read,
15 is defined in include/i2c.h. When i2c bus driver supports the i2c
20 bool "Enable I2C compatibility layer"
23 Enable old-style I2C functions for compatibility with existing code.
29 tristate "Chrome OS EC tunnel I2C bus"
32 This provides an I2C bus that will tunnel i2c commands through to
33 the other side of the Chrome OS EC to the I2C bus connected there.
[all …]
H A Domap24xx_i2c.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2004-2010
9 /* I2C masks */
11 /* I2C Interrupt Enable Register (I2C_IE): */
19 /* I2C Status Register (I2C_STAT): */
33 /* I2C Interrupt Code Register (I2C_INTCODE): */
43 /* I2C Buffer Configuration Register (I2C_BUF): */
48 /* I2C Configuration Register (I2C_CON): */
50 #define I2C_CON_EN (1 << 15) /* I2C module enable */
51 #define I2C_CON_BE (1 << 14) /* Big endian mode */
[all …]
H A Daspeed_i2c_global.c1 // SPDX-License-Identifier: GPL-2.0+
29 * I2CG10[31:24] base clk4 for i2c auto recovery timeout counter (0xC6)
30 * I2CG10[23:16] base clk3 for Standard-mode (100Khz) min tBuf 4.7us
36 * I2CG10[15:8] base clk2 for Fast-mode (400Khz) min tBuf 1.3us
38 * I2CG10[7:0] base clk1 for Fast-mode Plus (1Mhz) min tBuf 0.5us
47 i2c_global->regs = devfdt_get_addr_ptr(dev); in aspeed_i2c_global_probe()
48 if (IS_ERR(i2c_global->regs)) in aspeed_i2c_global_probe()
49 return PTR_ERR(i2c_global->regs); in aspeed_i2c_global_probe()
53 ret = reset_get_by_index(dev, 0, &i2c_global->reset); in aspeed_i2c_global_probe()
59 i2c_global->version = dev_get_driver_data(dev); in aspeed_i2c_global_probe()
[all …]
H A Dimx_lpi2c.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/imx-regs.h>
15 #include <i2c.h>
34 status = readl(&regs->msr); in imx_lpci2c_check_busy_bus()
47 status = readl(&regs->msr); in imx_lpci2c_check_clear_error()
63 writel(0x7f00, &regs->msr); in imx_lpci2c_check_clear_error()
65 val = readl(&regs->mcr); in imx_lpci2c_check_clear_error()
67 writel(val, &regs->mcr); in imx_lpci2c_check_clear_error()
80 txcount = LPI2C_MFSR_TXCOUNT(readl(&regs->mfsr)); in bus_i2c_wait_for_tx_ready()
81 txcount = LPI2C_FIFO_SIZE - txcount; in bus_i2c_wait_for_tx_ready()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/supply/
H A Drichtek,rt5033-charger.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/supply/richtek,rt5033-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jakob Hauser <jahau@rocketmail.com>
14 under sub-node named "charger" using the following format.
18 const: richtek,rt5033-charger
20 monitored-battery:
26 precharge-current-microamp:
27 Current of pre-charge mode. The pre-charge current levels are 350 mA
[all …]
/openbmc/linux/include/linux/
H A Di2c-algo-pca.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #define I2C_PCA_OSC_PER 3 /* e10-8s */
34 #define I2C_PCA_ICOUNT 0x00 /* Byte Count for buffered mode */
40 #define I2C_PCA_IMODE 0x06 /* I2C Bus mode */
42 /* PCA9665 I2C bus mode */
43 #define I2C_PCA_MODE_STD 0x00 /* Standard mode */
44 #define I2C_PCA_MODE_FAST 0x01 /* Fast mode */
45 #define I2C_PCA_MODE_FASTP 0x02 /* Fast Plus mode */
46 #define I2C_PCA_MODE_TURBO 0x03 /* Turbo mode */
57 * struct pca_i2c_bus_settings - The configured PCA i2c bus settings
[all …]
H A Di2c-algo-bit.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * i2c-algo-bit.h: i2c driver algorithms for bit-shift adapters
5 * Copyright (C) 1995-99 Simon G. Vogl
13 #include <linux/i2c.h>
15 /* --- Defines for bit-adapters --------------------------------------- */
17 * This struct contains the hw-dependent functions of bit-style adapters to
18 * manipulate the line states, and to init any hw-specific features. This is
19 * only used if you have more than one hw-type of adapter running.
32 minimum 2 us for fast-mode I2C,
33 minimum 5 us for standard-mode I2C and SMBus,
/openbmc/u-boot/doc/device-tree-bindings/i2c/
H A Di2c-stm32.txt1 * I2C controller embedded in STMicroelectronis STM32 platforms
4 - compatible : Must be "st,stm32f7-i2c"
5 - reg : Offset and length of the register set for the device
6 - resets: Must contain the phandle to the reset controller
7 - clocks: Must contain the input clock of the I2C instance
8 - A pinctrl state named "default" must be defined to set pins in mode of
9 operation for I2C transfer
10 - #address-cells = <1>;
11 - #size-cells = <0>;
14 - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-inventec-starscream.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include "aspeed-g6-pinctrl.dtsi"
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/gpio/aspeed-gpio.h>
13 compatible = "inventec,starscream-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
28 reserved-memory {
29 #address-cells = <1>;
[all …]
/openbmc/linux/drivers/media/dvb-frontends/drx39xyj/
H A Ddrx_dap_fasi.h2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
36 * Data access protocol: Fast Access Sequential Interface (fasi)
37 * Fast access, because of short addressing format (16 instead of 32 bits addr)
38 * Sequential, because of I2C.
48 /*-------- compilation control switches --------------------------------------*/
53 /*-------- Required includes -------------------------------------------------*/
57 /*-------- Defines, configuring the API --------------------------------------*/
98 #error At least one of short- or long-addressing format must be allowed.
112 * + single master mode means no use of repeated starts
113 * + multi master mode means use of repeated starts
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dlm4857.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright 2011 Lars-Peter Clausen <lars@metafoo.de>
13 #include <linux/i2c.h>
59 SOC_DAPM_ENUM("Mode", lm4857_mode_enum);
64 SND_SOC_DAPM_DEMUX("Mode", SND_SOC_NOPM, 0, 0, &lm4857_mode_ctrl),
71 static const DECLARE_TLV_DB_SCALE(stereo_tlv, -4050, 150, 0);
72 static const DECLARE_TLV_DB_SCALE(mono_tlv, -3450, 150, 0);
83 SOC_SINGLE("Fast Wakeup Playback Switch", LM4857_CTRL,
90 { "Mode", NULL, "IN" },
91 { "LS", "Loudspeaker", "Mode" },
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-uDPU.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "armada-3720-uDPU.dtsi"
11 sfp_eth0: sfp-eth0 {
13 i2c-bus = <&i2c0>;
14 los-gpios = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
15 mod-def0-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
16 tx-disable-gpios = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
17 tx-fault-gpios = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
18 maximum-power-milliwatt = <3000>;
[all …]

12345678910>>...14