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/openbmc/linux/Documentation/devicetree/bindings/soc/ti/
H A Dwkup-m3-ipc.yaml137 * On the AM437x-GP-EVM board, gpio5_7 is wired to enable pin of the DDR VTT
138 * regulator. The 'ddr_vtt_toggle_default' pinmux node configures gpio5_7
/openbmc/u-boot/board/ti/am43xx/
H A Dmux.c72 {OFFSET(spi0_cs0), (MODE(7) | PULLUP_EN)}, /* GPIO5_7 */
H A Dboard.c531 /* enable output for GPIO5_7 */ in enable_vtt_regulator()
/openbmc/u-boot/board/ti/dra7xx/
H A Dmux_data.h116 {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */
327 {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */
649 {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */
837 {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */
/openbmc/u-boot/board/ti/am57xx/
H A Dmux_data.h151 {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */
430 {MCASP1_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp1_axr5.gpio5_7 */
650 {MCASP1_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp1_axr5.gpio5_7 */
837 {MCASP1_AXR5, (M14 | PIN_INPUT)}, /* mcasp1_axr5.gpio5_7 */
/openbmc/linux/arch/arm/mach-davinci/
H A Dda830.c176 MUX_CFG(DA830, GPIO5_7, 8, 8, 0xf, 8, false)
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam437x-gp-evm.dts158 …C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */