xref: /openbmc/u-boot/board/ti/dra7xx/mux_data.h (revision eae8291913e5561695e62a7b7b82e97157313ac3)
183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2687054a7SLokesh Vutla /*
3687054a7SLokesh Vutla  * (C) Copyright 2013
4687054a7SLokesh Vutla  * Texas Instruments Incorporated, <www.ti.com>
5687054a7SLokesh Vutla  *
6687054a7SLokesh Vutla  * Sricharan R	<r.sricharan@ti.com>
7687054a7SLokesh Vutla  * Nishant Kamat <nskamat@ti.com>
8687054a7SLokesh Vutla  */
9687054a7SLokesh Vutla #ifndef _MUX_DATA_DRA7XX_H_
10687054a7SLokesh Vutla #define _MUX_DATA_DRA7XX_H_
11687054a7SLokesh Vutla 
12687054a7SLokesh Vutla #include <asm/arch/mux_dra7xx.h>
13687054a7SLokesh Vutla 
148cac1471SNishanth Menon const struct pad_conf_entry dra72x_core_padconf_array_common[] = {
1526eccf31SLokesh Vutla 	{GPMC_AD0, (M3 | PIN_INPUT)},	/* gpmc_ad0.vout3_d0 */
1626eccf31SLokesh Vutla 	{GPMC_AD1, (M3 | PIN_INPUT)},	/* gpmc_ad1.vout3_d1 */
1726eccf31SLokesh Vutla 	{GPMC_AD2, (M3 | PIN_INPUT)},	/* gpmc_ad2.vout3_d2 */
1826eccf31SLokesh Vutla 	{GPMC_AD3, (M3 | PIN_INPUT)},	/* gpmc_ad3.vout3_d3 */
1926eccf31SLokesh Vutla 	{GPMC_AD4, (M3 | PIN_INPUT)},	/* gpmc_ad4.vout3_d4 */
2026eccf31SLokesh Vutla 	{GPMC_AD5, (M3 | PIN_INPUT)},	/* gpmc_ad5.vout3_d5 */
2126eccf31SLokesh Vutla 	{GPMC_AD6, (M3 | PIN_INPUT)},	/* gpmc_ad6.vout3_d6 */
2226eccf31SLokesh Vutla 	{GPMC_AD7, (M3 | PIN_INPUT)},	/* gpmc_ad7.vout3_d7 */
2326eccf31SLokesh Vutla 	{GPMC_AD8, (M3 | PIN_INPUT)},	/* gpmc_ad8.vout3_d8 */
2426eccf31SLokesh Vutla 	{GPMC_AD9, (M3 | PIN_INPUT)},	/* gpmc_ad9.vout3_d9 */
2526eccf31SLokesh Vutla 	{GPMC_AD10, (M3 | PIN_INPUT)},	/* gpmc_ad10.vout3_d10 */
2626eccf31SLokesh Vutla 	{GPMC_AD11, (M3 | PIN_INPUT)},	/* gpmc_ad11.vout3_d11 */
2726eccf31SLokesh Vutla 	{GPMC_AD12, (M3 | PIN_INPUT)},	/* gpmc_ad12.vout3_d12 */
2826eccf31SLokesh Vutla 	{GPMC_AD13, (M3 | PIN_INPUT)},	/* gpmc_ad13.vout3_d13 */
2926eccf31SLokesh Vutla 	{GPMC_AD14, (M3 | PIN_INPUT)},	/* gpmc_ad14.vout3_d14 */
3026eccf31SLokesh Vutla 	{GPMC_AD15, (M3 | PIN_INPUT)},	/* gpmc_ad15.vout3_d15 */
3126eccf31SLokesh Vutla 	{GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a0.vout3_d16 */
3226eccf31SLokesh Vutla 	{GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a1.vout3_d17 */
3326eccf31SLokesh Vutla 	{GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a2.vout3_d18 */
3426eccf31SLokesh Vutla 	{GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a3.vout3_d19 */
3526eccf31SLokesh Vutla 	{GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a4.vout3_d20 */
3626eccf31SLokesh Vutla 	{GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a5.vout3_d21 */
3726eccf31SLokesh Vutla 	{GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a6.vout3_d22 */
3826eccf31SLokesh Vutla 	{GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a7.vout3_d23 */
3926eccf31SLokesh Vutla 	{GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a8.vout3_hsync */
4026eccf31SLokesh Vutla 	{GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a9.vout3_vsync */
4126eccf31SLokesh Vutla 	{GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a10.vout3_de */
4226eccf31SLokesh Vutla 	{GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_a11.gpio2_1 */
4326eccf31SLokesh Vutla 	{GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */
4426eccf31SLokesh Vutla 	{GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */
4526eccf31SLokesh Vutla 	{GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */
4626eccf31SLokesh Vutla 	{GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */
4726eccf31SLokesh Vutla 	{GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */
4826eccf31SLokesh Vutla 	{GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */
4926eccf31SLokesh Vutla 	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
5026eccf31SLokesh Vutla 	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
5126eccf31SLokesh Vutla 	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
5226eccf31SLokesh Vutla 	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
5326eccf31SLokesh Vutla 	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
5426eccf31SLokesh Vutla 	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
5526eccf31SLokesh Vutla 	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
5626eccf31SLokesh Vutla 	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
5726eccf31SLokesh Vutla 	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
5826eccf31SLokesh Vutla 	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
5926eccf31SLokesh Vutla 	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */
6026eccf31SLokesh Vutla 	{GPMC_CS3, (M3 | PIN_INPUT_PULLUP)},	/* gpmc_cs3.vout3_clk */
6126eccf31SLokesh Vutla 	{VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},	/* vin2a_clk0.vin2a_clk0 */
6226eccf31SLokesh Vutla 	{VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_hsync0.vin2a_hsync0 */
6326eccf31SLokesh Vutla 	{VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},	/* vin2a_vsync0.vin2a_vsync0 */
6426eccf31SLokesh Vutla 	{VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d0.vin2a_d0 */
6526eccf31SLokesh Vutla 	{VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d1.vin2a_d1 */
6626eccf31SLokesh Vutla 	{VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d2.vin2a_d2 */
6726eccf31SLokesh Vutla 	{VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d3.vin2a_d3 */
6826eccf31SLokesh Vutla 	{VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d4.vin2a_d4 */
6926eccf31SLokesh Vutla 	{VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d5.vin2a_d5 */
7026eccf31SLokesh Vutla 	{VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_d6.vin2a_d6 */
7126eccf31SLokesh Vutla 	{VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_d7.vin2a_d7 */
7226eccf31SLokesh Vutla 	{VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},	/* vin2a_d8.vin2a_d8 */
7326eccf31SLokesh Vutla 	{VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},	/* vin2a_d9.vin2a_d9 */
7426eccf31SLokesh Vutla 	{VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)},	/* vin2a_d10.vin2a_d10 */
7526eccf31SLokesh Vutla 	{VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)},	/* vin2a_d11.vin2a_d11 */
7626eccf31SLokesh Vutla 	{VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_clk.vout1_clk */
7726eccf31SLokesh Vutla 	{VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_de.vout1_de */
7826eccf31SLokesh Vutla 	{VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_hsync.vout1_hsync */
7926eccf31SLokesh Vutla 	{VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_vsync.vout1_vsync */
8026eccf31SLokesh Vutla 	{VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d0.vout1_d0 */
8126eccf31SLokesh Vutla 	{VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d1.vout1_d1 */
8226eccf31SLokesh Vutla 	{VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d2.vout1_d2 */
8326eccf31SLokesh Vutla 	{VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d3.vout1_d3 */
8426eccf31SLokesh Vutla 	{VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d4.vout1_d4 */
8526eccf31SLokesh Vutla 	{VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d5.vout1_d5 */
8626eccf31SLokesh Vutla 	{VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d6.vout1_d6 */
8726eccf31SLokesh Vutla 	{VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d7.vout1_d7 */
8826eccf31SLokesh Vutla 	{VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d8.vout1_d8 */
8926eccf31SLokesh Vutla 	{VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d9.vout1_d9 */
9026eccf31SLokesh Vutla 	{VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d10.vout1_d10 */
9126eccf31SLokesh Vutla 	{VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d11.vout1_d11 */
9226eccf31SLokesh Vutla 	{VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d12.vout1_d12 */
9326eccf31SLokesh Vutla 	{VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d13.vout1_d13 */
9426eccf31SLokesh Vutla 	{VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d14.vout1_d14 */
9526eccf31SLokesh Vutla 	{VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d15.vout1_d15 */
9626eccf31SLokesh Vutla 	{VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d16.vout1_d16 */
9726eccf31SLokesh Vutla 	{VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d17.vout1_d17 */
9826eccf31SLokesh Vutla 	{VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d18.vout1_d18 */
9926eccf31SLokesh Vutla 	{VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d19.vout1_d19 */
10026eccf31SLokesh Vutla 	{VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d20.vout1_d20 */
10126eccf31SLokesh Vutla 	{VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d21.vout1_d21 */
10226eccf31SLokesh Vutla 	{VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d22.vout1_d22 */
10326eccf31SLokesh Vutla 	{VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d23.vout1_d23 */
10426eccf31SLokesh Vutla 	{MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
10526eccf31SLokesh Vutla 	{MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_d.mdio_d */
10626eccf31SLokesh Vutla 	{USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb1_drvvbus.usb1_drvvbus */
10726eccf31SLokesh Vutla 	{USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb2_drvvbus.usb2_drvvbus */
10826eccf31SLokesh Vutla 	{GPIO6_14, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_14.i2c3_sda */
10926eccf31SLokesh Vutla 	{GPIO6_15, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_15.i2c3_scl */
11026eccf31SLokesh Vutla 	{GPIO6_16, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
11126eccf31SLokesh Vutla 	{MCASP1_AXR0, (M10 | PIN_INPUT_SLEW)},	/* mcasp1_axr0.i2c5_sda */
11226eccf31SLokesh Vutla 	{MCASP1_AXR1, (M10 | PIN_INPUT_SLEW)},	/* mcasp1_axr1.i2c5_scl */
11326eccf31SLokesh Vutla 	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
11426eccf31SLokesh Vutla 	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr3.gpio5_5 */
11526eccf31SLokesh Vutla 	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
11626eccf31SLokesh Vutla 	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
11726eccf31SLokesh Vutla 	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr6.gpio5_8 */
11826eccf31SLokesh Vutla 	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr7.gpio5_9 */
11926eccf31SLokesh Vutla 	{MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr12.mcasp7_axr0 */
12026eccf31SLokesh Vutla 	{MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},	/* mcasp1_axr13.mcasp7_axr1 */
12126eccf31SLokesh Vutla 	{MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr14.mcasp7_aclkx */
12226eccf31SLokesh Vutla 	{MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr15.mcasp7_fsx */
12326eccf31SLokesh Vutla 	{MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkr.mcasp2_aclkr */
12426eccf31SLokesh Vutla 	{MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.mcasp3_aclkx */
12526eccf31SLokesh Vutla 	{MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.mcasp3_fsx */
12626eccf31SLokesh Vutla 	{MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_axr0.mcasp3_axr0 */
12726eccf31SLokesh Vutla 	{MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},	/* mcasp3_axr1.mcasp3_axr1 */
12826eccf31SLokesh Vutla 	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
12926eccf31SLokesh Vutla 	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
13026eccf31SLokesh Vutla 	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
13126eccf31SLokesh Vutla 	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
13226eccf31SLokesh Vutla 	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
13326eccf31SLokesh Vutla 	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
13426eccf31SLokesh Vutla 	{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)},	/* mmc1_sdcd.gpio6_27 */
13526eccf31SLokesh Vutla 	{MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},	/* mmc1_sdwp.gpio6_28 */
13626eccf31SLokesh Vutla 	{SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.spi1_sclk */
13726eccf31SLokesh Vutla 	{SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.spi1_d1 */
13826eccf31SLokesh Vutla 	{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.spi1_d0 */
13926eccf31SLokesh Vutla 	{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},	/* spi1_cs0.spi1_cs0 */
14026eccf31SLokesh Vutla 	{SPI1_CS1, (M14 | PIN_OUTPUT)},	/* spi1_cs1.gpio7_11 */
14126eccf31SLokesh Vutla 	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
14232651e4fSTomi Valkeinen 	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
14326eccf31SLokesh Vutla 	{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.uart3_rxd */
14426eccf31SLokesh Vutla 	{SPI2_D1, (M1 | PIN_INPUT_SLEW)},	/* spi2_d1.uart3_txd */
14526eccf31SLokesh Vutla 	{SPI2_D0, (M1 | PIN_INPUT_SLEW)},	/* spi2_d0.uart3_ctsn */
14626eccf31SLokesh Vutla 	{SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.uart3_rtsn */
14726eccf31SLokesh Vutla 	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
14826eccf31SLokesh Vutla 	{DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_rx.gpio1_15 */
14926eccf31SLokesh Vutla 	{UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.uart1_rxd */
15026eccf31SLokesh Vutla 	{UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_txd.uart1_txd */
15126eccf31SLokesh Vutla 	{UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_ctsn.mmc4_clk */
15226eccf31SLokesh Vutla 	{UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_rtsn.mmc4_cmd */
15326eccf31SLokesh Vutla 	{UART2_RXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rxd.mmc4_dat0 */
15426eccf31SLokesh Vutla 	{UART2_TXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_txd.mmc4_dat1 */
15526eccf31SLokesh Vutla 	{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.mmc4_dat2 */
15626eccf31SLokesh Vutla 	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.mmc4_dat3 */
15726eccf31SLokesh Vutla 	{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_sda.hdmi1_ddc_scl */
15826eccf31SLokesh Vutla 	{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_scl.hdmi1_ddc_sda */
15926eccf31SLokesh Vutla 	{WAKEUP0, (M15 | PULL_UP)},	/* Wakeup0.safe for dcan1_rx */
16026eccf31SLokesh Vutla 	{WAKEUP3, (M1 | PULL_ENA | PULL_UP)},	/* Wakeup3.sys_nirq1 */
161687054a7SLokesh Vutla };
16227d170afSNishanth Menon 
1638cac1471SNishanth Menon const struct pad_conf_entry dra72x_rgmii_padconf_array_revb[] = {
1648cac1471SNishanth Menon 	{GPIO6_11, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_11.gpio6_11 */
1658cac1471SNishanth Menon 	{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
1668cac1471SNishanth Menon 	{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
1678cac1471SNishanth Menon 	{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
1688cac1471SNishanth Menon 	{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
1698cac1471SNishanth Menon 	{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
1708cac1471SNishanth Menon 	{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
1718cac1471SNishanth Menon 	{RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
1728cac1471SNishanth Menon 	{RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
1738cac1471SNishanth Menon 	{RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
1748cac1471SNishanth Menon 	{RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
1758cac1471SNishanth Menon 	{RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
1768cac1471SNishanth Menon 	{RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
1778cac1471SNishanth Menon 	{VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d0.rgmii1_txc */
1788cac1471SNishanth Menon 	{VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d1.rgmii1_txctl */
1798cac1471SNishanth Menon 	{VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d2.rgmii1_txd3 */
1808cac1471SNishanth Menon 	{VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d3.rgmii1_txd2 */
1818cac1471SNishanth Menon 	{VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d4.rgmii1_txd1 */
1828cac1471SNishanth Menon 	{VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d5.rgmii1_txd0 */
1838cac1471SNishanth Menon 	{VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d6.rgmii1_rxc */
1848cac1471SNishanth Menon 	{VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d7.rgmii1_rxctl */
1858cac1471SNishanth Menon 	{VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d8.rgmii1_rxd3 */
1868cac1471SNishanth Menon 	{VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d9.rgmii1_rxd2 */
1878cac1471SNishanth Menon 	{VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d10.rgmii1_rxd1 */
1888cac1471SNishanth Menon 	{VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d11.rgmii1_rxd0 */
1898cac1471SNishanth Menon 	{XREF_CLK1, (M5 | PIN_OUTPUT)},	/* xref_clk1.atl_clk1 */
1908cac1471SNishanth Menon 	{XREF_CLK2, (M5 | PIN_OUTPUT)},	/* xref_clk2.atl_clk2 */
1918cac1471SNishanth Menon };
1928cac1471SNishanth Menon 
1938cac1471SNishanth Menon const struct pad_conf_entry dra72x_rgmii_padconf_array_revc[] = {
1948cac1471SNishanth Menon 	{VIN2A_FLD0, (M14 | PIN_INPUT)},	/* vin2a_fld0.gpio3_30 */
1954596cf98SNishanth Menon 	{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
1964596cf98SNishanth Menon 	{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
1974596cf98SNishanth Menon 	{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
1984596cf98SNishanth Menon 	{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
1994596cf98SNishanth Menon 	{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
2004596cf98SNishanth Menon 	{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
2014596cf98SNishanth Menon 	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
2024596cf98SNishanth Menon 	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
2034596cf98SNishanth Menon 	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
2044596cf98SNishanth Menon 	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
2054596cf98SNishanth Menon 	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
2064596cf98SNishanth Menon 	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
2074596cf98SNishanth Menon 	{VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
2084596cf98SNishanth Menon 	{VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
2094596cf98SNishanth Menon 	{VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
2104596cf98SNishanth Menon 	{VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
2114596cf98SNishanth Menon 	{VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
2124596cf98SNishanth Menon 	{VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
2134596cf98SNishanth Menon 	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
2144596cf98SNishanth Menon 	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
2154596cf98SNishanth Menon 	{VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
2164596cf98SNishanth Menon 	{VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
2174596cf98SNishanth Menon 	{VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
2184596cf98SNishanth Menon 	{VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
2198cac1471SNishanth Menon 	{XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.atl_clk2 */
2208cac1471SNishanth Menon };
2218cac1471SNishanth Menon 
2224d748048SLokesh Vutla const struct pad_conf_entry dra71x_core_padconf_array[] = {
2234d748048SLokesh Vutla 	{GPMC_AD0, (M3 | PIN_INPUT)},	/* gpmc_ad0.vout3_d0 */
2244d748048SLokesh Vutla 	{GPMC_AD1, (M3 | PIN_INPUT)},	/* gpmc_ad1.vout3_d1 */
2254d748048SLokesh Vutla 	{GPMC_AD2, (M3 | PIN_INPUT)},	/* gpmc_ad2.vout3_d2 */
2264d748048SLokesh Vutla 	{GPMC_AD3, (M3 | PIN_INPUT)},	/* gpmc_ad3.vout3_d3 */
2274d748048SLokesh Vutla 	{GPMC_AD4, (M3 | PIN_INPUT)},	/* gpmc_ad4.vout3_d4 */
2284d748048SLokesh Vutla 	{GPMC_AD5, (M3 | PIN_INPUT)},	/* gpmc_ad5.vout3_d5 */
2294d748048SLokesh Vutla 	{GPMC_AD6, (M3 | PIN_INPUT)},	/* gpmc_ad6.vout3_d6 */
2304d748048SLokesh Vutla 	{GPMC_AD7, (M3 | PIN_INPUT)},	/* gpmc_ad7.vout3_d7 */
2314d748048SLokesh Vutla 	{GPMC_AD8, (M3 | PIN_INPUT)},	/* gpmc_ad8.vout3_d8 */
2324d748048SLokesh Vutla 	{GPMC_AD9, (M3 | PIN_INPUT)},	/* gpmc_ad9.vout3_d9 */
2334d748048SLokesh Vutla 	{GPMC_AD10, (M3 | PIN_INPUT)},	/* gpmc_ad10.vout3_d10 */
2344d748048SLokesh Vutla 	{GPMC_AD11, (M3 | PIN_INPUT)},	/* gpmc_ad11.vout3_d11 */
2354d748048SLokesh Vutla 	{GPMC_AD12, (M3 | PIN_INPUT)},	/* gpmc_ad12.vout3_d12 */
2364d748048SLokesh Vutla 	{GPMC_AD13, (M3 | PIN_INPUT)},	/* gpmc_ad13.vout3_d13 */
2374d748048SLokesh Vutla 	{GPMC_AD14, (M3 | PIN_INPUT)},	/* gpmc_ad14.vout3_d14 */
2384d748048SLokesh Vutla 	{GPMC_AD15, (M3 | PIN_INPUT)},	/* gpmc_ad15.vout3_d15 */
2394d748048SLokesh Vutla 	{GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a0.vout3_d16 */
2404d748048SLokesh Vutla 	{GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a1.vout3_d17 */
2414d748048SLokesh Vutla 	{GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a2.vout3_d18 */
2424d748048SLokesh Vutla 	{GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a3.vout3_d19 */
2434d748048SLokesh Vutla 	{GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a4.vout3_d20 */
2444d748048SLokesh Vutla 	{GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a5.vout3_d21 */
2454d748048SLokesh Vutla 	{GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a6.vout3_d22 */
2464d748048SLokesh Vutla 	{GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a7.vout3_d23 */
2474d748048SLokesh Vutla 	{GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a8.vout3_hsync */
2484d748048SLokesh Vutla 	{GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a9.vout3_vsync */
2494d748048SLokesh Vutla 	{GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a10.vout3_de */
2504d748048SLokesh Vutla 	{GPMC_A11, (M14 | PIN_INPUT)},	/* gpmc_a11.gpio2_1 */
2514d748048SLokesh Vutla 	{GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
2524d748048SLokesh Vutla 	{GPMC_A14, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
2534d748048SLokesh Vutla 	{GPMC_A15, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
2544d748048SLokesh Vutla 	{GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
2554d748048SLokesh Vutla 	{GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
2564d748048SLokesh Vutla 	{GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
2574d748048SLokesh Vutla 	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
2584d748048SLokesh Vutla 	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
2594d748048SLokesh Vutla 	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
2604d748048SLokesh Vutla 	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
2614d748048SLokesh Vutla 	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
2624d748048SLokesh Vutla 	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
2634d748048SLokesh Vutla 	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
2644d748048SLokesh Vutla 	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
2654d748048SLokesh Vutla 	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
2664d748048SLokesh Vutla 	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
2674d748048SLokesh Vutla 	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
2684d748048SLokesh Vutla 	{GPMC_CS3, (M3 | PIN_INPUT_PULLUP)},	/* gpmc_cs3.vout3_clk */
2694d748048SLokesh Vutla 	{VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},	/* vin2a_clk0.vin2a_clk0 */
2704d748048SLokesh Vutla 	{VIN2A_FLD0, (M14 | PIN_INPUT)},	/* vin2a_fld0.gpio3_30 */
2714d748048SLokesh Vutla 	{VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_hsync0.vin2a_hsync0 */
2724d748048SLokesh Vutla 	{VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)},	/* vin2a_vsync0.vin2a_vsync0 */
2734d748048SLokesh Vutla 	{VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d0.vin2a_d0 */
2744d748048SLokesh Vutla 	{VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d1.vin2a_d1 */
2754d748048SLokesh Vutla 	{VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* vin2a_d2.vin2a_d2 */
2764d748048SLokesh Vutla 	{VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d3.vin2a_d3 */
2774d748048SLokesh Vutla 	{VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d4.vin2a_d4 */
2784d748048SLokesh Vutla 	{VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)},	/* vin2a_d5.vin2a_d5 */
2794d748048SLokesh Vutla 	{VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_d6.vin2a_d6 */
2804d748048SLokesh Vutla 	{VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)},	/* vin2a_d7.vin2a_d7 */
2814d748048SLokesh Vutla 	{VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},	/* vin2a_d8.vin2a_d8 */
2824d748048SLokesh Vutla 	{VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)},	/* vin2a_d9.vin2a_d9 */
2834d748048SLokesh Vutla 	{VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)},	/* vin2a_d10.vin2a_d10 */
2844d748048SLokesh Vutla 	{VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)},	/* vin2a_d11.vin2a_d11 */
2854d748048SLokesh Vutla 	{VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
2864d748048SLokesh Vutla 	{VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
2874d748048SLokesh Vutla 	{VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
2884d748048SLokesh Vutla 	{VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
2894d748048SLokesh Vutla 	{VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
2904d748048SLokesh Vutla 	{VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
2914d748048SLokesh Vutla 	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
2924d748048SLokesh Vutla 	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
2934d748048SLokesh Vutla 	{VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
2944d748048SLokesh Vutla 	{VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
2954d748048SLokesh Vutla 	{VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
2964d748048SLokesh Vutla 	{VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
2974d748048SLokesh Vutla 	{VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)},	/* N/A.N/A */
2984d748048SLokesh Vutla 	{VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)},	/* N/A.N/A */
2994d748048SLokesh Vutla 	{VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)},	/* N/A.N/A */
3004d748048SLokesh Vutla 	{MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
3014d748048SLokesh Vutla 	{MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_d.mdio_d */
3024d748048SLokesh Vutla 	{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
3034d748048SLokesh Vutla 	{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
3044d748048SLokesh Vutla 	{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
3054d748048SLokesh Vutla 	{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
3064d748048SLokesh Vutla 	{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
3074d748048SLokesh Vutla 	{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
3084d748048SLokesh Vutla 	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
3094d748048SLokesh Vutla 	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
3104d748048SLokesh Vutla 	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
3114d748048SLokesh Vutla 	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
3124d748048SLokesh Vutla 	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
3134d748048SLokesh Vutla 	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
3144d748048SLokesh Vutla 	{USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb1_drvvbus.usb1_drvvbus */
3154d748048SLokesh Vutla 	{USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb2_drvvbus.usb2_drvvbus */
3164d748048SLokesh Vutla 	{GPIO6_14, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_14.i2c3_sda */
3174d748048SLokesh Vutla 	{GPIO6_15, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_15.i2c3_scl */
3184d748048SLokesh Vutla 	{GPIO6_16, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
3194d748048SLokesh Vutla 	{XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.atl_clk2 */
3204d748048SLokesh Vutla 	{MCASP1_ACLKX, (M14 | PIN_INPUT)},	/* mcasp1_aclkx.gpio7_31 */
3214d748048SLokesh Vutla 	{MCASP1_FSX, (M14 | 0x000d0000)},	/* mcasp1_fsx.gpio7_30 */
3224d748048SLokesh Vutla 	{MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr0.i2c5_sda */
3234d748048SLokesh Vutla 	{MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr1.i2c5_scl */
3244d748048SLokesh Vutla 	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
3254d748048SLokesh Vutla 	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr3.gpio5_5 */
3264d748048SLokesh Vutla 	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
3274d748048SLokesh Vutla 	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
3284d748048SLokesh Vutla 	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr6.gpio5_8 */
3294d748048SLokesh Vutla 	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr7.gpio5_9 */
3304d748048SLokesh Vutla 	{MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr12.mcasp7_axr0 */
3314d748048SLokesh Vutla 	{MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},	/* mcasp1_axr13.mcasp7_axr1 */
3324d748048SLokesh Vutla 	{MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr14.mcasp7_aclkx */
3334d748048SLokesh Vutla 	{MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr15.mcasp7_fsx */
3344d748048SLokesh Vutla 	{MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.mcasp3_aclkx */
3354d748048SLokesh Vutla 	{MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.mcasp3_fsx */
3364d748048SLokesh Vutla 	{MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_axr0.mcasp3_axr0 */
3374d748048SLokesh Vutla 	{MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},	/* mcasp3_axr1.mcasp3_axr1 */
3384d748048SLokesh Vutla 	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
3394d748048SLokesh Vutla 	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
3404d748048SLokesh Vutla 	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
3414d748048SLokesh Vutla 	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
3424d748048SLokesh Vutla 	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
3434d748048SLokesh Vutla 	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
3444d748048SLokesh Vutla 	{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mmc1_sdcd.gpio6_27 */
3454d748048SLokesh Vutla 	{MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},	/* mmc1_sdwp.gpio6_28 */
3464d748048SLokesh Vutla 	{SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.spi1_sclk */
3474d748048SLokesh Vutla 	{SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.spi1_d1 */
3484d748048SLokesh Vutla 	{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.spi1_d0 */
3494d748048SLokesh Vutla 	{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},	/* spi1_cs0.spi1_cs0 */
3504d748048SLokesh Vutla 	{SPI1_CS1, (M14 | PIN_INPUT_PULLUP)},	/* spi1_cs1.gpio7_11 */
3514d748048SLokesh Vutla 	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
35232651e4fSTomi Valkeinen 	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
3534d748048SLokesh Vutla 	{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.uart3_rxd */
3544d748048SLokesh Vutla 	{SPI2_D1, (M1 | PIN_INPUT_SLEW)},	/* spi2_d1.uart3_txd */
3554d748048SLokesh Vutla 	{SPI2_D0, (M1 | PIN_INPUT_SLEW)},	/* spi2_d0.uart3_ctsn */
3564d748048SLokesh Vutla 	{SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.uart3_rtsn */
3574d748048SLokesh Vutla 	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
3584d748048SLokesh Vutla 	{DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_rx.gpio1_15 */
3594d748048SLokesh Vutla 	{UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.uart1_rxd */
3604d748048SLokesh Vutla 	{UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_txd.uart1_txd */
3614d748048SLokesh Vutla 	{UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_ctsn.mmc4_clk */
3624d748048SLokesh Vutla 	{UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_rtsn.mmc4_cmd */
3634d748048SLokesh Vutla 	{UART2_RXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rxd.mmc4_dat0 */
3644d748048SLokesh Vutla 	{UART2_TXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_txd.mmc4_dat1 */
3654d748048SLokesh Vutla 	{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.mmc4_dat2 */
3664d748048SLokesh Vutla 	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.mmc4_dat3 */
3674d748048SLokesh Vutla 	{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_sda.hdmi1_ddc_scl */
3684d748048SLokesh Vutla 	{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_scl.hdmi1_ddc_sda */
3694d748048SLokesh Vutla 	{WAKEUP0, (M15 | PULL_UP)},	/* Wakeup0.safe for dcan1_rx */
3704d748048SLokesh Vutla 	{WAKEUP3, (M1 | PULL_ENA | PULL_UP)},	/* Wakeup3.sys_nirq1 */
3714d748048SLokesh Vutla };
3724d748048SLokesh Vutla 
37327d170afSNishanth Menon const struct pad_conf_entry early_padconf[] = {
37427d170afSNishanth Menon 	{UART1_RXD, (PIN_INPUT_SLEW | M0)}, /* UART1_RXD */
37527d170afSNishanth Menon 	{UART1_TXD, (PIN_INPUT_SLEW | M0)}, /* UART1_TXD */
37627d170afSNishanth Menon 	{UART3_RXD, (PIN_INPUT_SLEW | M0)}, /* UART3_RXD */
37727d170afSNishanth Menon 	{UART3_TXD, (PIN_INPUT_SLEW | M0)}, /* UART3_TXD */
37827d170afSNishanth Menon 	{I2C1_SDA, (PIN_INPUT | M0)},	/* I2C1_SDA */
37927d170afSNishanth Menon 	{I2C1_SCL, (PIN_INPUT | M0)},	/* I2C1_SCL */
38027d170afSNishanth Menon };
38127d170afSNishanth Menon 
38227d170afSNishanth Menon #ifdef CONFIG_IODELAY_RECALIBRATION
3838cac1471SNishanth Menon const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revb[] = {
3840a888f58SMugunthan V N 	{0x6F0, 359, 0}, /* RGMMI0_RXC_IN */
3850a888f58SMugunthan V N 	{0x6FC, 129, 1896}, /* RGMMI0_RXCTL_IN */
3860a888f58SMugunthan V N 	{0x708, 80, 1391}, /* RGMMI0_RXD0_IN */
3870a888f58SMugunthan V N 	{0x714, 196, 1522}, /* RGMMI0_RXD1_IN */
3880a888f58SMugunthan V N 	{0x720, 40, 1860}, /* RGMMI0_RXD2_IN */
3890a888f58SMugunthan V N 	{0x72C, 0, 1956}, /* RGMMI0_RXD3_IN */
3900a888f58SMugunthan V N 	{0x740, 0, 220}, /* RGMMI0_TXC_OUT */
3910a888f58SMugunthan V N 	{0x74C, 1820, 180}, /* RGMMI0_TXCTL_OUT */
3920a888f58SMugunthan V N 	{0x758, 1740, 440}, /* RGMMI0_TXD0_OUT */
3930a888f58SMugunthan V N 	{0x764, 1740, 240}, /* RGMMI0_TXD1_OUT */
3940a888f58SMugunthan V N 	{0x770, 1680, 380}, /* RGMMI0_TXD2_OUT */
3950a888f58SMugunthan V N 	{0x77C, 1740, 440}, /* RGMMI0_TXD3_OUT */
3960a888f58SMugunthan V N 	/* These values are for using RGMII1 configuration on VIN2a_x pins. */
3970a888f58SMugunthan V N 	{0xAB0, 596, 0}, /* CFG_VIN2A_D18_IN */
3980a888f58SMugunthan V N 	{0xABC, 314, 980}, /* CFG_VIN2A_D19_IN */
3990a888f58SMugunthan V N 	{0xAD4, 241, 1536}, /* CFG_VIN2A_D20_IN */
4000a888f58SMugunthan V N 	{0xAE0, 103, 1689}, /* CFG_VIN2A_D21_IN */
4010a888f58SMugunthan V N 	{0xAEC, 161, 1563}, /* CFG_VIN2A_D22_IN */
4020a888f58SMugunthan V N 	{0xAF8, 0, 1613}, /* CFG_VIN2A_D23_IN */
4030a888f58SMugunthan V N 	{0xA70, 0, 200}, /* CFG_VIN2A_D12_OUT */
4040a888f58SMugunthan V N 	{0xA7C, 1560, 140}, /* CFG_VIN2A_D13_OUT */
4050a888f58SMugunthan V N 	{0xA88, 1700, 0}, /* CFG_VIN2A_D14_OUT */
4060a888f58SMugunthan V N 	{0xA94, 1260, 0}, /* CFG_VIN2A_D15_OUT */
4070a888f58SMugunthan V N 	{0xAA0, 1400, 0}, /* CFG_VIN2A_D16_OUT */
4080a888f58SMugunthan V N 	{0xAAC, 1290, 0}, /* CFG_VIN2A_D17_OUT */
40926eccf31SLokesh Vutla 	{0x144, 0, 0}, /* CFG_GPMC_A13_IN */
41026eccf31SLokesh Vutla 	{0x150, 2062, 2277}, /* CFG_GPMC_A14_IN */
41126eccf31SLokesh Vutla 	{0x15C, 1960, 2289}, /* CFG_GPMC_A15_IN */
41226eccf31SLokesh Vutla 	{0x168, 2058, 2386}, /* CFG_GPMC_A16_IN */
41326eccf31SLokesh Vutla 	{0x170, 0, 0 },	/* CFG_GPMC_A16_OUT */
41426eccf31SLokesh Vutla 	{0x174, 2062, 2350}, /* CFG_GPMC_A17_IN */
41526eccf31SLokesh Vutla 	{0x188, 0, 0}, /* CFG_GPMC_A18_OUT */
41626eccf31SLokesh Vutla 	{0x374, 121, 0}, /* CFG_GPMC_CS2_OUT */
41727d170afSNishanth Menon };
4188cac1471SNishanth Menon 
4198cac1471SNishanth Menon const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revc[] = {
4208cac1471SNishanth Menon 	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
4218cac1471SNishanth Menon 	{0x0150, 2247, 1186},	/* CFG_GPMC_A14_IN */
4228cac1471SNishanth Menon 	{0x015C, 2176, 1197},	/* CFG_GPMC_A15_IN */
4238cac1471SNishanth Menon 	{0x0168, 2229, 1268},	/* CFG_GPMC_A16_IN */
4248cac1471SNishanth Menon 	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
4258cac1471SNishanth Menon 	{0x0174, 2251, 1217},	/* CFG_GPMC_A17_IN */
4268cac1471SNishanth Menon 	{0x0188, 0, 0},	/* CFG_GPMC_A18_OUT */
4274596cf98SNishanth Menon 	{0x0374, 121, 0},	/* CFG_GPMC_CS2_OUT */
4284596cf98SNishanth Menon 	{0x06F0, 413, 0},	/* CFG_RGMII0_RXC_IN */
4294596cf98SNishanth Menon 	{0x06FC, 27, 2296},	/* CFG_RGMII0_RXCTL_IN */
4304596cf98SNishanth Menon 	{0x0708, 3, 1721},	/* CFG_RGMII0_RXD0_IN */
4314596cf98SNishanth Menon 	{0x0714, 134, 1786},	/* CFG_RGMII0_RXD1_IN */
4324596cf98SNishanth Menon 	{0x0720, 40, 1966},	/* CFG_RGMII0_RXD2_IN */
4334596cf98SNishanth Menon 	{0x072C, 0, 2057},	/* CFG_RGMII0_RXD3_IN */
4344596cf98SNishanth Menon 	{0x0740, 0, 60},	/* CFG_RGMII0_TXC_OUT */
4354596cf98SNishanth Menon 	{0x074C, 0, 60},	/* CFG_RGMII0_TXCTL_OUT */
4364596cf98SNishanth Menon 	{0x0758, 0, 60},	/* CFG_RGMII0_TXD0_OUT */
4374596cf98SNishanth Menon 	{0x0764, 0, 0},		/* CFG_RGMII0_TXD1_OUT */
4384596cf98SNishanth Menon 	{0x0770, 0, 60},	/* CFG_RGMII0_TXD2_OUT */
4394596cf98SNishanth Menon 	{0x077C, 0, 120},	/* CFG_RGMII0_TXD3_OUT */
4404596cf98SNishanth Menon 	{0x0A70, 0, 0},		/* CFG_VIN2A_D12_OUT */
4414596cf98SNishanth Menon 	{0x0A7C, 170, 0},	/* CFG_VIN2A_D13_OUT */
4424596cf98SNishanth Menon 	{0x0A88, 150, 0},	/* CFG_VIN2A_D14_OUT */
4434596cf98SNishanth Menon 	{0x0A94, 0, 0},		/* CFG_VIN2A_D15_OUT */
4444596cf98SNishanth Menon 	{0x0AA0, 60, 0},	/* CFG_VIN2A_D16_OUT */
4454596cf98SNishanth Menon 	{0x0AAC, 60, 0},	/* CFG_VIN2A_D17_OUT */
4464596cf98SNishanth Menon 	{0x0AB0, 530, 0},	/* CFG_VIN2A_D18_IN */
4474596cf98SNishanth Menon 	{0x0ABC, 71, 1099},	/* CFG_VIN2A_D19_IN */
4484596cf98SNishanth Menon 	{0x0AC8, 2229, 10},	/* CFG_VIN2A_D1_IN */
4494596cf98SNishanth Menon 	{0x0AD4, 142, 1337},	/* CFG_VIN2A_D20_IN */
4504596cf98SNishanth Menon 	{0x0AE0, 114, 1517},	/* CFG_VIN2A_D21_IN */
4514596cf98SNishanth Menon 	{0x0AEC, 171, 1331},	/* CFG_VIN2A_D22_IN */
4524596cf98SNishanth Menon 	{0x0AF8, 0, 1328},	/* CFG_VIN2A_D23_IN */
4538cac1471SNishanth Menon };
4548cac1471SNishanth Menon 
4554d748048SLokesh Vutla const struct iodelay_cfg_entry dra71_iodelay_cfg_array[] = {
4564d748048SLokesh Vutla 	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
4574d748048SLokesh Vutla 	{0x0150, 2247, 1186},	/* CFG_GPMC_A14_IN */
4584d748048SLokesh Vutla 	{0x015C, 2176, 1197},	/* CFG_GPMC_A15_IN */
4594d748048SLokesh Vutla 	{0x0168, 2229, 1268},	/* CFG_GPMC_A16_IN */
4604d748048SLokesh Vutla 	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
4614d748048SLokesh Vutla 	{0x0174, 2251, 1217},	/* CFG_GPMC_A17_IN */
4624d748048SLokesh Vutla 	{0x0188, 0, 0},	/* CFG_GPMC_A18_OUT */
4634d748048SLokesh Vutla 	{0x0374, 0, 0},	/* CFG_GPMC_CS2_OUT */
4644d748048SLokesh Vutla 	{0x06F0, 413, 0},	/* CFG_RGMII0_RXC_IN */
4654d748048SLokesh Vutla 	{0x06FC, 27, 2296},	/* CFG_RGMII0_RXCTL_IN */
4664d748048SLokesh Vutla 	{0x0708, 3, 1721},	/* CFG_RGMII0_RXD0_IN */
4674d748048SLokesh Vutla 	{0x0714, 134, 1786},	/* CFG_RGMII0_RXD1_IN */
4684d748048SLokesh Vutla 	{0x0720, 40, 1966},	/* CFG_RGMII0_RXD2_IN */
4694d748048SLokesh Vutla 	{0x072C, 0, 2057},	/* CFG_RGMII0_RXD3_IN */
4704d748048SLokesh Vutla 	{0x0740, 0, 60},	/* CFG_RGMII0_TXC_OUT */
4714d748048SLokesh Vutla 	{0x074C, 0, 60},	/* CFG_RGMII0_TXCTL_OUT */
4724d748048SLokesh Vutla 	{0x0758, 0, 60},	/* CFG_RGMII0_TXD0_OUT */
4734d748048SLokesh Vutla 	{0x0764, 0, 0},	/* CFG_RGMII0_TXD1_OUT */
4744d748048SLokesh Vutla 	{0x0770, 0, 60},	/* CFG_RGMII0_TXD2_OUT */
4754d748048SLokesh Vutla 	{0x077C, 0, 120},	/* CFG_RGMII0_TXD3_OUT */
4764d748048SLokesh Vutla 	{0x0A38, 0, 0},	/* CFG_VIN2A_CLK0_IN */
4774d748048SLokesh Vutla 	{0x0A44, 1936, 0},	/* CFG_VIN2A_D0_IN */
4784d748048SLokesh Vutla 	{0x0A50, 2031, 0},	/* CFG_VIN2A_D10_IN */
4794d748048SLokesh Vutla 	{0x0A5C, 1702, 0},	/* CFG_VIN2A_D11_IN */
4804d748048SLokesh Vutla 	{0x0A70, 0, 0},	/* CFG_VIN2A_D12_OUT */
4814d748048SLokesh Vutla 	{0x0A7C, 170, 0},	/* CFG_VIN2A_D13_OUT */
4824d748048SLokesh Vutla 	{0x0A88, 150, 0},	/* CFG_VIN2A_D14_OUT */
4834d748048SLokesh Vutla 	{0x0A94, 0, 0},	/* CFG_VIN2A_D15_OUT */
4844d748048SLokesh Vutla 	{0x0AA0, 60, 0},	/* CFG_VIN2A_D16_OUT */
4854d748048SLokesh Vutla 	{0x0AAC, 60, 0},	/* CFG_VIN2A_D17_OUT */
4864d748048SLokesh Vutla 	{0x0AB0, 530, 0},	/* CFG_VIN2A_D18_IN */
4874d748048SLokesh Vutla 	{0x0ABC, 71, 1099},	/* CFG_VIN2A_D19_IN */
4884d748048SLokesh Vutla 	{0x0AC8, 2229, 10},	/* CFG_VIN2A_D1_IN */
4894d748048SLokesh Vutla 	{0x0AD4, 142, 1337},	/* CFG_VIN2A_D20_IN */
4904d748048SLokesh Vutla 	{0x0AE0, 114, 1517},	/* CFG_VIN2A_D21_IN */
4914d748048SLokesh Vutla 	{0x0AEC, 171, 1331},	/* CFG_VIN2A_D22_IN */
4924d748048SLokesh Vutla 	{0x0AF8, 0, 1328},	/* CFG_VIN2A_D23_IN */
4934d748048SLokesh Vutla 	{0x0B04, 1736, 0},	/* CFG_VIN2A_D2_IN */
4944d748048SLokesh Vutla 	{0x0B10, 1943, 0},	/* CFG_VIN2A_D3_IN */
4954d748048SLokesh Vutla 	{0x0B1C, 1601, 0},	/* CFG_VIN2A_D4_IN */
4964d748048SLokesh Vutla 	{0x0B28, 2052, 0},	/* CFG_VIN2A_D5_IN */
4974d748048SLokesh Vutla 	{0x0B34, 1571, 0},	/* CFG_VIN2A_D6_IN */
4984d748048SLokesh Vutla 	{0x0B40, 1855, 0},	/* CFG_VIN2A_D7_IN */
4994d748048SLokesh Vutla 	{0x0B4C, 1224, 618},	/* CFG_VIN2A_D8_IN */
5004d748048SLokesh Vutla 	{0x0B58, 1373, 509},	/* CFG_VIN2A_D9_IN */
5014d748048SLokesh Vutla 	{0x0B7C, 1943, 0},	/* CFG_VIN2A_HSYNC0_IN */
5024d748048SLokesh Vutla 	{0x0B88, 1612, 0},	/* CFG_VIN2A_VSYNC0_IN */
5034d748048SLokesh Vutla };
50427d170afSNishanth Menon #endif
50527d170afSNishanth Menon 
50627d170afSNishanth Menon const struct pad_conf_entry dra74x_core_padconf_array[] = {
50727d170afSNishanth Menon 	{GPMC_AD0, (M3 | PIN_INPUT)},	/* gpmc_ad0.vout3_d0 */
50827d170afSNishanth Menon 	{GPMC_AD1, (M3 | PIN_INPUT)},	/* gpmc_ad1.vout3_d1 */
50927d170afSNishanth Menon 	{GPMC_AD2, (M3 | PIN_INPUT)},	/* gpmc_ad2.vout3_d2 */
51027d170afSNishanth Menon 	{GPMC_AD3, (M3 | PIN_INPUT)},	/* gpmc_ad3.vout3_d3 */
51127d170afSNishanth Menon 	{GPMC_AD4, (M3 | PIN_INPUT)},	/* gpmc_ad4.vout3_d4 */
51227d170afSNishanth Menon 	{GPMC_AD5, (M3 | PIN_INPUT)},	/* gpmc_ad5.vout3_d5 */
51327d170afSNishanth Menon 	{GPMC_AD6, (M3 | PIN_INPUT)},	/* gpmc_ad6.vout3_d6 */
51427d170afSNishanth Menon 	{GPMC_AD7, (M3 | PIN_INPUT)},	/* gpmc_ad7.vout3_d7 */
51527d170afSNishanth Menon 	{GPMC_AD8, (M3 | PIN_INPUT)},	/* gpmc_ad8.vout3_d8 */
51627d170afSNishanth Menon 	{GPMC_AD9, (M3 | PIN_INPUT)},	/* gpmc_ad9.vout3_d9 */
51727d170afSNishanth Menon 	{GPMC_AD10, (M3 | PIN_INPUT)},	/* gpmc_ad10.vout3_d10 */
51827d170afSNishanth Menon 	{GPMC_AD11, (M3 | PIN_INPUT)},	/* gpmc_ad11.vout3_d11 */
51927d170afSNishanth Menon 	{GPMC_AD12, (M3 | PIN_INPUT)},	/* gpmc_ad12.vout3_d12 */
52027d170afSNishanth Menon 	{GPMC_AD13, (M3 | PIN_INPUT)},	/* gpmc_ad13.vout3_d13 */
52127d170afSNishanth Menon 	{GPMC_AD14, (M3 | PIN_INPUT)},	/* gpmc_ad14.vout3_d14 */
52227d170afSNishanth Menon 	{GPMC_AD15, (M3 | PIN_INPUT)},	/* gpmc_ad15.vout3_d15 */
52327d170afSNishanth Menon 	{GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a0.vout3_d16 */
52427d170afSNishanth Menon 	{GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a1.vout3_d17 */
52527d170afSNishanth Menon 	{GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a2.vout3_d18 */
52627d170afSNishanth Menon 	{GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a3.vout3_d19 */
52727d170afSNishanth Menon 	{GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a4.vout3_d20 */
52827d170afSNishanth Menon 	{GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a5.vout3_d21 */
52927d170afSNishanth Menon 	{GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a6.vout3_d22 */
53027d170afSNishanth Menon 	{GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a7.vout3_d23 */
53127d170afSNishanth Menon 	{GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a8.vout3_hsync */
53227d170afSNishanth Menon 	{GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a9.vout3_vsync */
53327d170afSNishanth Menon 	{GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)},	/* gpmc_a10.vout3_de */
53427d170afSNishanth Menon 	{GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_a11.gpio2_1 */
535900e2104SVignesh R 	{GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
536900e2104SVignesh R 	{GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
537900e2104SVignesh R 	{GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
538900e2104SVignesh R 	{GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
539900e2104SVignesh R 	{GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
540900e2104SVignesh R 	{GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
54127d170afSNishanth Menon 	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
54227d170afSNishanth Menon 	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
54327d170afSNishanth Menon 	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
54427d170afSNishanth Menon 	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
54527d170afSNishanth Menon 	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
54627d170afSNishanth Menon 	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
54727d170afSNishanth Menon 	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
54827d170afSNishanth Menon 	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
54927d170afSNishanth Menon 	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
55027d170afSNishanth Menon 	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
551900e2104SVignesh R 	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
55227d170afSNishanth Menon 	{GPMC_CS3, (M3 | PIN_INPUT_PULLUP)},	/* gpmc_cs3.vout3_clk */
55327d170afSNishanth Menon 	{VIN1A_CLK0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_clk0.vin1a_clk0 */
55427d170afSNishanth Menon 	{VIN1A_DE0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_de0.vin1a_de0 */
55527d170afSNishanth Menon 	{VIN1A_FLD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_fld0.vin1a_fld0 */
55627d170afSNishanth Menon 	{VIN1A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_hsync0.vin1a_hsync0 */
55727d170afSNishanth Menon 	{VIN1A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_vsync0.vin1a_vsync0 */
55827d170afSNishanth Menon 	{VIN1A_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d0.vin1a_d0 */
55927d170afSNishanth Menon 	{VIN1A_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d1.vin1a_d1 */
56027d170afSNishanth Menon 	{VIN1A_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d2.vin1a_d2 */
56127d170afSNishanth Menon 	{VIN1A_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d3.vin1a_d3 */
56227d170afSNishanth Menon 	{VIN1A_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d4.vin1a_d4 */
56327d170afSNishanth Menon 	{VIN1A_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d5.vin1a_d5 */
56427d170afSNishanth Menon 	{VIN1A_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d6.vin1a_d6 */
56527d170afSNishanth Menon 	{VIN1A_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d7.vin1a_d7 */
56627d170afSNishanth Menon 	{VIN1A_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d8.vin1a_d8 */
56727d170afSNishanth Menon 	{VIN1A_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d9.vin1a_d9 */
56827d170afSNishanth Menon 	{VIN1A_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d10.vin1a_d10 */
56927d170afSNishanth Menon 	{VIN1A_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d11.vin1a_d11 */
57027d170afSNishanth Menon 	{VIN1A_D12, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d12.vin1a_d12 */
57127d170afSNishanth Menon 	{VIN1A_D13, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d13.vin1a_d13 */
57227d170afSNishanth Menon 	{VIN1A_D14, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d14.vin1a_d14 */
57327d170afSNishanth Menon 	{VIN1A_D15, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d15.vin1a_d15 */
57427d170afSNishanth Menon 	{VIN1A_D16, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d16.vin1a_d16 */
57527d170afSNishanth Menon 	{VIN1A_D17, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d17.vin1a_d17 */
57627d170afSNishanth Menon 	{VIN1A_D18, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d18.vin1a_d18 */
57727d170afSNishanth Menon 	{VIN1A_D19, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d19.vin1a_d19 */
57827d170afSNishanth Menon 	{VIN1A_D20, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d20.vin1a_d20 */
57927d170afSNishanth Menon 	{VIN1A_D21, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d21.vin1a_d21 */
58027d170afSNishanth Menon 	{VIN1A_D22, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d22.vin1a_d22 */
58127d170afSNishanth Menon 	{VIN1A_D23, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin1a_d23.vin1a_d23 */
58227d170afSNishanth Menon 	{VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
58327d170afSNishanth Menon 	{VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
58427d170afSNishanth Menon 	{VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
58527d170afSNishanth Menon 	{VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
58627d170afSNishanth Menon 	{VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
58727d170afSNishanth Menon 	{VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
58827d170afSNishanth Menon 	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
58927d170afSNishanth Menon 	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
59027d170afSNishanth Menon 	{VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
59127d170afSNishanth Menon 	{VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
59227d170afSNishanth Menon 	{VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
59327d170afSNishanth Menon 	{VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
59427d170afSNishanth Menon 	{VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_clk.vout1_clk */
59527d170afSNishanth Menon 	{VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_de.vout1_de */
59627d170afSNishanth Menon 	{VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_hsync.vout1_hsync */
59727d170afSNishanth Menon 	{VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_vsync.vout1_vsync */
59827d170afSNishanth Menon 	{VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d0.vout1_d0 */
59927d170afSNishanth Menon 	{VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d1.vout1_d1 */
60027d170afSNishanth Menon 	{VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d2.vout1_d2 */
60127d170afSNishanth Menon 	{VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d3.vout1_d3 */
60227d170afSNishanth Menon 	{VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d4.vout1_d4 */
60327d170afSNishanth Menon 	{VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d5.vout1_d5 */
60427d170afSNishanth Menon 	{VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d6.vout1_d6 */
60527d170afSNishanth Menon 	{VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d7.vout1_d7 */
60627d170afSNishanth Menon 	{VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d8.vout1_d8 */
60727d170afSNishanth Menon 	{VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d9.vout1_d9 */
60827d170afSNishanth Menon 	{VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d10.vout1_d10 */
60927d170afSNishanth Menon 	{VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d11.vout1_d11 */
61027d170afSNishanth Menon 	{VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d12.vout1_d12 */
61127d170afSNishanth Menon 	{VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d13.vout1_d13 */
61227d170afSNishanth Menon 	{VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d14.vout1_d14 */
61327d170afSNishanth Menon 	{VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d15.vout1_d15 */
61427d170afSNishanth Menon 	{VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d16.vout1_d16 */
61527d170afSNishanth Menon 	{VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d17.vout1_d17 */
61627d170afSNishanth Menon 	{VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d18.vout1_d18 */
61727d170afSNishanth Menon 	{VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d19.vout1_d19 */
61827d170afSNishanth Menon 	{VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d20.vout1_d20 */
61927d170afSNishanth Menon 	{VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d21.vout1_d21 */
62027d170afSNishanth Menon 	{VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d22.vout1_d22 */
62127d170afSNishanth Menon 	{VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d23.vout1_d23 */
62227d170afSNishanth Menon 	{MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
62327d170afSNishanth Menon 	{MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_d.mdio_d */
62427d170afSNishanth Menon 	{RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
62527d170afSNishanth Menon 	{RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
62627d170afSNishanth Menon 	{RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
62727d170afSNishanth Menon 	{RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
62827d170afSNishanth Menon 	{RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
62927d170afSNishanth Menon 	{RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
63027d170afSNishanth Menon 	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
63127d170afSNishanth Menon 	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
63227d170afSNishanth Menon 	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
63327d170afSNishanth Menon 	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
63427d170afSNishanth Menon 	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
63527d170afSNishanth Menon 	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
63627d170afSNishanth Menon 	{USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb1_drvvbus.usb1_drvvbus */
63727d170afSNishanth Menon 	{USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb2_drvvbus.usb2_drvvbus */
63827d170afSNishanth Menon 	{GPIO6_14, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_14.i2c3_sda */
63927d170afSNishanth Menon 	{GPIO6_15, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_15.i2c3_scl */
64027d170afSNishanth Menon 	{GPIO6_16, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
64127d170afSNishanth Menon 	{XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.atl_clk2 */
64227d170afSNishanth Menon 	{MCASP1_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp1_aclkx.mcasp1_aclkx */
64327d170afSNishanth Menon 	{MCASP1_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp1_fsx.mcasp1_fsx */
64427d170afSNishanth Menon 	{MCASP1_AXR0, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE15)},	/* mcasp1_axr0.mcasp1_axr0 */
64527d170afSNishanth Menon 	{MCASP1_AXR1, (M0 | PIN_INPUT_SLEW)},	/* mcasp1_axr1.mcasp1_axr1 */
64627d170afSNishanth Menon 	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
64727d170afSNishanth Menon 	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr3.gpio5_5 */
64827d170afSNishanth Menon 	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
64927d170afSNishanth Menon 	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
65027d170afSNishanth Menon 	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr6.gpio5_8 */
65127d170afSNishanth Menon 	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr7.gpio5_9 */
65227d170afSNishanth Menon 	{MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr12.mcasp7_axr0 */
65327d170afSNishanth Menon 	{MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},	/* mcasp1_axr13.mcasp7_axr1 */
65427d170afSNishanth Menon 	{MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr14.mcasp7_aclkx */
65527d170afSNishanth Menon 	{MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr15.mcasp7_fsx */
65627d170afSNishanth Menon 	{MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkr.mcasp2_aclkr */
65727d170afSNishanth Menon 	{MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.mcasp3_aclkx */
65827d170afSNishanth Menon 	{MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.mcasp3_fsx */
65927d170afSNishanth Menon 	{MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_axr0.mcasp3_axr0 */
66027d170afSNishanth Menon 	{MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},	/* mcasp3_axr1.mcasp3_axr1 */
66127d170afSNishanth Menon 	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
66227d170afSNishanth Menon 	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
66327d170afSNishanth Menon 	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
66427d170afSNishanth Menon 	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
66527d170afSNishanth Menon 	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
66627d170afSNishanth Menon 	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
66726eccf31SLokesh Vutla 	{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)},	/* mmc1_sdcd.gpio6_27 */
66827d170afSNishanth Menon 	{MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},	/* mmc1_sdwp.gpio6_28 */
66927d170afSNishanth Menon 	{GPIO6_11, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_11.gpio6_11 */
67027d170afSNishanth Menon 	{SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.spi1_sclk */
67127d170afSNishanth Menon 	{SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.spi1_d1 */
67227d170afSNishanth Menon 	{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.spi1_d0 */
67327d170afSNishanth Menon 	{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},	/* spi1_cs0.spi1_cs0 */
67427d170afSNishanth Menon 	{SPI1_CS1, (M14 | PIN_OUTPUT)},		/* spi1_cs1.gpio7_11 */
67527d170afSNishanth Menon 	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
67632651e4fSTomi Valkeinen 	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
67727d170afSNishanth Menon 	{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.uart3_rxd */
67827d170afSNishanth Menon 	{SPI2_D1, (M1 | PIN_INPUT_SLEW)},	/* spi2_d1.uart3_txd */
67927d170afSNishanth Menon 	{SPI2_D0, (M1 | PIN_INPUT_SLEW)},	/* spi2_d0.uart3_ctsn */
68027d170afSNishanth Menon 	{SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.uart3_rtsn */
681a5878f19SRoger Quadros 	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
68227d170afSNishanth Menon 	{DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_rx.gpio1_15 */
68327d170afSNishanth Menon 	{UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.uart1_rxd */
68427d170afSNishanth Menon 	{UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_txd.uart1_txd */
68527d170afSNishanth Menon 	{UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_ctsn.mmc4_clk */
68627d170afSNishanth Menon 	{UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_rtsn.mmc4_cmd */
68727d170afSNishanth Menon 	{UART2_RXD, (M3 | PIN_INPUT_PULLUP)},	/* N/A.mmc4_dat0 */
68827d170afSNishanth Menon 	{UART2_TXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_txd.mmc4_dat1 */
68927d170afSNishanth Menon 	{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.mmc4_dat2 */
69027d170afSNishanth Menon 	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.mmc4_dat3 */
69127d170afSNishanth Menon 	{I2C2_SDA, (M0 | PIN_INPUT_PULLUP)},	/* i2c2_sda.i2c2_sda */
69227d170afSNishanth Menon 	{I2C2_SCL, (M0 | PIN_INPUT_PULLUP)},	/* i2c2_scl.i2c2_scl */
693a5878f19SRoger Quadros 	{WAKEUP0, (M15 | PULL_UP)},	/* Wakeup0.safe for dcan1_rx */
694bc622966SCooper Jr., Franklin 	{WAKEUP2, (M14)},		/* Wakeup2.gpio1_2 */
69527d170afSNishanth Menon };
69627d170afSNishanth Menon 
6979120ef07SLokesh Vutla const struct pad_conf_entry dra76x_core_padconf_array[] = {
6989120ef07SLokesh Vutla 	{GPMC_AD0, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad0.vout3_d0 */
6999120ef07SLokesh Vutla 	{GPMC_AD1, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad1.vout3_d1 */
7009120ef07SLokesh Vutla 	{GPMC_AD2, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad2.vout3_d2 */
7019120ef07SLokesh Vutla 	{GPMC_AD3, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad3.vout3_d3 */
7029120ef07SLokesh Vutla 	{GPMC_AD4, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad4.vout3_d4 */
7039120ef07SLokesh Vutla 	{GPMC_AD5, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad5.vout3_d5 */
7049120ef07SLokesh Vutla 	{GPMC_AD6, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad6.vout3_d6 */
7059120ef07SLokesh Vutla 	{GPMC_AD7, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad7.vout3_d7 */
7069120ef07SLokesh Vutla 	{GPMC_AD8, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad8.vout3_d8 */
7079120ef07SLokesh Vutla 	{GPMC_AD9, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad9.vout3_d9 */
7089120ef07SLokesh Vutla 	{GPMC_AD10, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad10.vout3_d10 */
7099120ef07SLokesh Vutla 	{GPMC_AD11, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad11.vout3_d11 */
7109120ef07SLokesh Vutla 	{GPMC_AD12, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad12.vout3_d12 */
7119120ef07SLokesh Vutla 	{GPMC_AD13, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad13.vout3_d13 */
7129120ef07SLokesh Vutla 	{GPMC_AD14, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad14.vout3_d14 */
7139120ef07SLokesh Vutla 	{GPMC_AD15, (M3 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad15.vout3_d15 */
7149120ef07SLokesh Vutla 	{GPMC_A0, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a0.vout3_d16 */
7159120ef07SLokesh Vutla 	{GPMC_A1, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a1.vout3_d17 */
7169120ef07SLokesh Vutla 	{GPMC_A2, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a2.vout3_d18 */
7179120ef07SLokesh Vutla 	{GPMC_A3, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a3.vout3_d19 */
7189120ef07SLokesh Vutla 	{GPMC_A4, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a4.vout3_d20 */
7199120ef07SLokesh Vutla 	{GPMC_A5, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a5.vout3_d21 */
7209120ef07SLokesh Vutla 	{GPMC_A6, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a6.vout3_d22 */
7219120ef07SLokesh Vutla 	{GPMC_A7, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a7.vout3_d23 */
7229120ef07SLokesh Vutla 	{GPMC_A8, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a8.vout3_hsync */
7239120ef07SLokesh Vutla 	{GPMC_A9, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a9.vout3_vsync */
7249120ef07SLokesh Vutla 	{GPMC_A10, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a10.vout3_de */
7259120ef07SLokesh Vutla 	{GPMC_A11, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_a11.gpio2_1 */
7269120ef07SLokesh Vutla 	{GPMC_A12, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_a12.gpio2_2 */
7279120ef07SLokesh Vutla 	{GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
7289120ef07SLokesh Vutla 	{GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
7299120ef07SLokesh Vutla 	{GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
7309120ef07SLokesh Vutla 	{GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
7319120ef07SLokesh Vutla 	{GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
7329120ef07SLokesh Vutla 	{GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
7339120ef07SLokesh Vutla 	{GPMC_A19, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a19.mmc2_dat4 */
7349120ef07SLokesh Vutla 	{GPMC_A20, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a20.mmc2_dat5 */
7359120ef07SLokesh Vutla 	{GPMC_A21, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a21.mmc2_dat6 */
7369120ef07SLokesh Vutla 	{GPMC_A22, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a22.mmc2_dat7 */
7379120ef07SLokesh Vutla 	{GPMC_A23, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a23.mmc2_clk */
7389120ef07SLokesh Vutla 	{GPMC_A24, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a24.mmc2_dat0 */
7399120ef07SLokesh Vutla 	{GPMC_A25, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a25.mmc2_dat1 */
7409120ef07SLokesh Vutla 	{GPMC_A26, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a26.mmc2_dat2 */
7419120ef07SLokesh Vutla 	{GPMC_A27, (M1 | PIN_INPUT_PULLDOWN)},	/* gpmc_a27.mmc2_dat3 */
7429120ef07SLokesh Vutla 	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
7439120ef07SLokesh Vutla 	{GPMC_CS0, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_cs0.gpmc_cs0 */
7449120ef07SLokesh Vutla 	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
7459120ef07SLokesh Vutla 	{GPMC_CS3, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_cs3.vout3_clk */
7469120ef07SLokesh Vutla 	{GPMC_ADVN_ALE, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_advn_ale.gpmc_advn_ale */
7479120ef07SLokesh Vutla 	{GPMC_OEN_REN, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_oen_ren.gpmc_oen_ren */
7489120ef07SLokesh Vutla 	{GPMC_WEN, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_wen.gpmc_wen */
7499120ef07SLokesh Vutla 	{GPMC_BEN0, (M0 | PIN_INPUT_PULLUP)},	/* gpmc_ben0.gpmc_ben0 */
7509120ef07SLokesh Vutla 	{GPMC_WAIT0, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* gpmc_wait0.gpmc_wait0 */
7519120ef07SLokesh Vutla 	{VIN1A_FLD0, (M14 | PIN_INPUT_PULLUP)},	/* vin1a_fld0.gpio3_1 */
7529120ef07SLokesh Vutla 	{VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_clk0.vin2a_clk0 */
7539120ef07SLokesh Vutla 	{VIN2A_DE0, (M15 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_de0.Driveroff */
7549120ef07SLokesh Vutla 	{VIN2A_FLD0, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_fld0.gpio3_30 */
7559120ef07SLokesh Vutla 	{VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_hsync0.vin2a_hsync0 */
7569120ef07SLokesh Vutla 	{VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_vsync0.vin2a_vsync0 */
7579120ef07SLokesh Vutla 	{VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d0.vin2a_d0 */
7589120ef07SLokesh Vutla 	{VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d1.vin2a_d1 */
7599120ef07SLokesh Vutla 	{VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d2.vin2a_d2 */
7609120ef07SLokesh Vutla 	{VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d3.vin2a_d3 */
7619120ef07SLokesh Vutla 	{VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d4.vin2a_d4 */
7629120ef07SLokesh Vutla 	{VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d5.vin2a_d5 */
7639120ef07SLokesh Vutla 	{VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d6.vin2a_d6 */
7649120ef07SLokesh Vutla 	{VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d7.vin2a_d7 */
7659120ef07SLokesh Vutla 	{VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d8.vin2a_d8 */
7669120ef07SLokesh Vutla 	{VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d9.vin2a_d9 */
7679120ef07SLokesh Vutla 	{VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d10.vin2a_d10 */
7689120ef07SLokesh Vutla 	{VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d11.vin2a_d11 */
7699120ef07SLokesh Vutla 	{VIN2A_D12, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
7709120ef07SLokesh Vutla 	{VIN2A_D13, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
7719120ef07SLokesh Vutla 	{VIN2A_D14, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
7729120ef07SLokesh Vutla 	{VIN2A_D15, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
7739120ef07SLokesh Vutla 	{VIN2A_D16, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
7749120ef07SLokesh Vutla 	{VIN2A_D17, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
7759120ef07SLokesh Vutla 	{VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
7769120ef07SLokesh Vutla 	{VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
7779120ef07SLokesh Vutla 	{VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
7789120ef07SLokesh Vutla 	{VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
7799120ef07SLokesh Vutla 	{VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
7809120ef07SLokesh Vutla 	{VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
7819120ef07SLokesh Vutla 	{VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_clk.vout1_clk */
7829120ef07SLokesh Vutla 	{VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_de.vout1_de */
7839120ef07SLokesh Vutla 	{VOUT1_FLD, (M14 | PIN_INPUT_PULLUP)},	/* vout1_fld.gpio4_21 */
7849120ef07SLokesh Vutla 	{VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_hsync.vout1_hsync */
7859120ef07SLokesh Vutla 	{VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_vsync.vout1_vsync */
7869120ef07SLokesh Vutla 	{VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d0.vout1_d0 */
7879120ef07SLokesh Vutla 	{VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d1.vout1_d1 */
7889120ef07SLokesh Vutla 	{VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d2.vout1_d2 */
7899120ef07SLokesh Vutla 	{VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d3.vout1_d3 */
7909120ef07SLokesh Vutla 	{VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d4.vout1_d4 */
7919120ef07SLokesh Vutla 	{VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d5.vout1_d5 */
7929120ef07SLokesh Vutla 	{VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d6.vout1_d6 */
7939120ef07SLokesh Vutla 	{VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d7.vout1_d7 */
7949120ef07SLokesh Vutla 	{VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d8.vout1_d8 */
7959120ef07SLokesh Vutla 	{VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d9.vout1_d9 */
7969120ef07SLokesh Vutla 	{VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d10.vout1_d10 */
7979120ef07SLokesh Vutla 	{VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d11.vout1_d11 */
7989120ef07SLokesh Vutla 	{VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d12.vout1_d12 */
7999120ef07SLokesh Vutla 	{VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d13.vout1_d13 */
8009120ef07SLokesh Vutla 	{VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d14.vout1_d14 */
8019120ef07SLokesh Vutla 	{VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d15.vout1_d15 */
8029120ef07SLokesh Vutla 	{VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d16.vout1_d16 */
8039120ef07SLokesh Vutla 	{VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d17.vout1_d17 */
8049120ef07SLokesh Vutla 	{VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d18.vout1_d18 */
8059120ef07SLokesh Vutla 	{VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d19.vout1_d19 */
8069120ef07SLokesh Vutla 	{VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d20.vout1_d20 */
8079120ef07SLokesh Vutla 	{VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d21.vout1_d21 */
8089120ef07SLokesh Vutla 	{VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d22.vout1_d22 */
8099120ef07SLokesh Vutla 	{VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d23.vout1_d23 */
8109120ef07SLokesh Vutla 	{MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
8119120ef07SLokesh Vutla 	{MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_d.mdio_d */
8129120ef07SLokesh Vutla 	{RGMII0_TXC, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
8139120ef07SLokesh Vutla 	{RGMII0_TXCTL, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
8149120ef07SLokesh Vutla 	{RGMII0_TXD3, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
8159120ef07SLokesh Vutla 	{RGMII0_TXD2, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
8169120ef07SLokesh Vutla 	{RGMII0_TXD1, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
8179120ef07SLokesh Vutla 	{RGMII0_TXD0, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
8189120ef07SLokesh Vutla 	{RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
8199120ef07SLokesh Vutla 	{RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
8209120ef07SLokesh Vutla 	{RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
8219120ef07SLokesh Vutla 	{RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
8229120ef07SLokesh Vutla 	{RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
8239120ef07SLokesh Vutla 	{RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
8249120ef07SLokesh Vutla 	{USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb1_drvvbus.usb1_drvvbus */
8259120ef07SLokesh Vutla 	{USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb2_drvvbus.usb2_drvvbus */
8269120ef07SLokesh Vutla 	{GPIO6_14, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_14.i2c3_sda */
8279120ef07SLokesh Vutla 	{GPIO6_15, (M9 | PIN_INPUT_PULLUP)},	/* gpio6_15.i2c3_scl */
8289120ef07SLokesh Vutla 	{GPIO6_16, (M0 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
8299120ef07SLokesh Vutla 	{XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.atl_clk2 */
8309120ef07SLokesh Vutla 	{MCASP1_ACLKX, (M14 | 0x00070000)},	/* mcasp1_aclkx.gpio7_31 */
8319120ef07SLokesh Vutla 	{MCASP1_FSX, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mcasp1_fsx.gpio7_30 */
8329120ef07SLokesh Vutla 	{MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr0.i2c5_sda */
8339120ef07SLokesh Vutla 	{MCASP1_AXR1, (M10 | 0x000f0000)},	/* mcasp1_axr1.i2c5_scl */
8349120ef07SLokesh Vutla 	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
8359120ef07SLokesh Vutla 	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr3.gpio5_5 */
8369120ef07SLokesh Vutla 	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
8379120ef07SLokesh Vutla 	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
8389120ef07SLokesh Vutla 	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr6.gpio5_8 */
8399120ef07SLokesh Vutla 	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr7.gpio5_9 */
8409120ef07SLokesh Vutla 	{MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr12.mcasp7_axr0 */
8419120ef07SLokesh Vutla 	{MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)},	/* mcasp1_axr13.mcasp7_axr1 */
8429120ef07SLokesh Vutla 	{MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr14.mcasp7_aclkx */
8439120ef07SLokesh Vutla 	{MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)},	/* mcasp1_axr15.mcasp7_fsx */
8449120ef07SLokesh Vutla 	{MCASP2_ACLKR, (M15 | PIN_INPUT_PULLUP)},	/* mcasp2_aclkr.Driveroff */
8459120ef07SLokesh Vutla 	{MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.mcasp3_aclkx */
8469120ef07SLokesh Vutla 	{MCASP3_FSX, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.mcasp3_fsx */
8479120ef07SLokesh Vutla 	{MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)},	/* mcasp3_axr0.mcasp3_axr0 */
8489120ef07SLokesh Vutla 	{MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)},	/* mcasp3_axr1.mcasp3_axr1 */
8499120ef07SLokesh Vutla 	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
8509120ef07SLokesh Vutla 	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
8519120ef07SLokesh Vutla 	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
8529120ef07SLokesh Vutla 	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
8539120ef07SLokesh Vutla 	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
8549120ef07SLokesh Vutla 	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
8559120ef07SLokesh Vutla 	{MMC1_SDCD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mmc1_sdcd.mmc1_sdcd */
8569120ef07SLokesh Vutla 	{MMC1_SDWP, (M14 | PIN_INPUT_SLEW)},	/* mmc1_sdwp.gpio6_28 */
8579120ef07SLokesh Vutla 	{SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.spi1_sclk */
8589120ef07SLokesh Vutla 	{SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.spi1_d1 */
8599120ef07SLokesh Vutla 	{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.spi1_d0 */
8609120ef07SLokesh Vutla 	{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},	/* spi1_cs0.spi1_cs0 */
861*eae82919STomi Valkeinen 	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
86232651e4fSTomi Valkeinen 	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
8639120ef07SLokesh Vutla 	{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.uart3_rxd */
8649120ef07SLokesh Vutla 	{SPI2_D1, (M1 | PIN_INPUT_SLEW)},	/* spi2_d1.uart3_txd */
8659120ef07SLokesh Vutla 	{SPI2_D0, (M1 | PIN_INPUT_SLEW)},	/* spi2_d0.uart3_ctsn */
8669120ef07SLokesh Vutla 	{SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.uart3_rtsn */
8679120ef07SLokesh Vutla 	{DCAN1_TX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_tx.dcan1_tx */
8689120ef07SLokesh Vutla 	{DCAN1_RX, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* dcan1_rx.dcan1_rx */
8699120ef07SLokesh Vutla 	{UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.uart1_rxd */
8709120ef07SLokesh Vutla 	{UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_txd.uart1_txd */
8719120ef07SLokesh Vutla 	{UART1_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_ctsn.mmc4_clk */
8729120ef07SLokesh Vutla 	{UART1_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart1_rtsn.mmc4_cmd */
8739120ef07SLokesh Vutla 	{UART2_RXD, (M3 | PIN_INPUT_PULLUP)},	/* N/A.mmc4_dat0 */
8749120ef07SLokesh Vutla 	{UART2_TXD, (M3 | PIN_INPUT_PULLUP)},	/* uart2_txd.mmc4_dat1 */
8759120ef07SLokesh Vutla 	{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.mmc4_dat2 */
8769120ef07SLokesh Vutla 	{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.mmc4_dat3 */
8779120ef07SLokesh Vutla 	{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_sda.hdmi1_ddc_scl */
8789120ef07SLokesh Vutla 	{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_scl.hdmi1_ddc_sda */
8799120ef07SLokesh Vutla 	{WAKEUP0, (M14 | PIN_OUTPUT)},	/* N/A.gpio1_0 */
8809120ef07SLokesh Vutla 	{WAKEUP1, (M14 | PIN_OUTPUT)},	/* N/A.gpio1_1 */
8818d0dcbf2STomi Valkeinen 	{WAKEUP2, (M14 | PIN_INPUT)},	/* N/A.gpio1_2 */
8829120ef07SLokesh Vutla 	{WAKEUP3, (M1 | PIN_OUTPUT)},	/* N/A.sys_nirq1 */
8839120ef07SLokesh Vutla };
8849120ef07SLokesh Vutla 
88527d170afSNishanth Menon #ifdef CONFIG_IODELAY_RECALIBRATION
88603589234SNishanth Menon const struct iodelay_cfg_entry dra742_es1_1_iodelay_cfg_array[] = {
88727d170afSNishanth Menon 	{0x06F0, 480, 0},	/* CFG_RGMII0_RXC_IN */
88827d170afSNishanth Menon 	{0x06FC, 111, 1641},	/* CFG_RGMII0_RXCTL_IN */
88927d170afSNishanth Menon 	{0x0708, 272, 1116},	/* CFG_RGMII0_RXD0_IN */
89027d170afSNishanth Menon 	{0x0714, 243, 1260},	/* CFG_RGMII0_RXD1_IN */
89127d170afSNishanth Menon 	{0x0720, 0, 1614},	/* CFG_RGMII0_RXD2_IN */
89227d170afSNishanth Menon 	{0x072C, 105, 1673},	/* CFG_RGMII0_RXD3_IN */
89327d170afSNishanth Menon 	{0x0740, 0, 0},		/* CFG_RGMII0_TXC_OUT */
89427d170afSNishanth Menon 	{0x074C, 1560, 120},	/* CFG_RGMII0_TXCTL_OUT */
89527d170afSNishanth Menon 	{0x0758, 1570, 120},	/* CFG_RGMII0_TXD0_OUT */
89627d170afSNishanth Menon 	{0x0764, 1500, 120},	/* CFG_RGMII0_TXD1_OUT */
89727d170afSNishanth Menon 	{0x0770, 1775, 120},	/* CFG_RGMII0_TXD2_OUT */
89827d170afSNishanth Menon 	{0x077C, 1875, 120},	/* CFG_RGMII0_TXD3_OUT */
89927d170afSNishanth Menon 	{0x08D0, 0, 0},		/* CFG_VIN1A_CLK0_IN */
90027d170afSNishanth Menon 	{0x08DC, 2600, 0},	/* CFG_VIN1A_D0_IN */
90127d170afSNishanth Menon 	{0x08E8, 2652, 46},	/* CFG_VIN1A_D10_IN */
90227d170afSNishanth Menon 	{0x08F4, 2541, 0},	/* CFG_VIN1A_D11_IN */
90327d170afSNishanth Menon 	{0x0900, 2603, 574},	/* CFG_VIN1A_D12_IN */
90427d170afSNishanth Menon 	{0x090C, 2548, 443},	/* CFG_VIN1A_D13_IN */
90527d170afSNishanth Menon 	{0x0918, 2624, 598},	/* CFG_VIN1A_D14_IN */
90627d170afSNishanth Menon 	{0x0924, 2535, 1027},	/* CFG_VIN1A_D15_IN */
90727d170afSNishanth Menon 	{0x0930, 2526, 818},	/* CFG_VIN1A_D16_IN */
90827d170afSNishanth Menon 	{0x093C, 2623, 797},	/* CFG_VIN1A_D17_IN */
90927d170afSNishanth Menon 	{0x0948, 2578, 888},	/* CFG_VIN1A_D18_IN */
91027d170afSNishanth Menon 	{0x0954, 2574, 1008},	/* CFG_VIN1A_D19_IN */
91127d170afSNishanth Menon 	{0x0960, 2527, 123},	/* CFG_VIN1A_D1_IN */
91227d170afSNishanth Menon 	{0x096C, 2577, 737},	/* CFG_VIN1A_D20_IN */
91327d170afSNishanth Menon 	{0x0978, 2627, 616},	/* CFG_VIN1A_D21_IN */
91427d170afSNishanth Menon 	{0x0984, 2573, 777},	/* CFG_VIN1A_D22_IN */
91527d170afSNishanth Menon 	{0x0990, 2730, 67},	/* CFG_VIN1A_D23_IN */
91627d170afSNishanth Menon 	{0x099C, 2509, 303},	/* CFG_VIN1A_D2_IN */
91727d170afSNishanth Menon 	{0x09A8, 2494, 267},	/* CFG_VIN1A_D3_IN */
91827d170afSNishanth Menon 	{0x09B4, 2474, 0},	/* CFG_VIN1A_D4_IN */
91927d170afSNishanth Menon 	{0x09C0, 2556, 181},	/* CFG_VIN1A_D5_IN */
92027d170afSNishanth Menon 	{0x09CC, 2516, 195},	/* CFG_VIN1A_D6_IN */
92127d170afSNishanth Menon 	{0x09D8, 2589, 210},	/* CFG_VIN1A_D7_IN */
92227d170afSNishanth Menon 	{0x09E4, 2624, 75},	/* CFG_VIN1A_D8_IN */
92327d170afSNishanth Menon 	{0x09F0, 2704, 14},	/* CFG_VIN1A_D9_IN */
92427d170afSNishanth Menon 	{0x09FC, 2469, 55},	/* CFG_VIN1A_DE0_IN */
92527d170afSNishanth Menon 	{0x0A08, 2557, 264},	/* CFG_VIN1A_FLD0_IN */
92627d170afSNishanth Menon 	{0x0A14, 2465, 269},	/* CFG_VIN1A_HSYNC0_IN */
92727d170afSNishanth Menon 	{0x0A20, 2411, 348},	/* CFG_VIN1A_VSYNC0_IN */
92827d170afSNishanth Menon 	{0x0A70, 150, 0},	/* CFG_VIN2A_D12_OUT */
92927d170afSNishanth Menon 	{0x0A7C, 1500, 0},	/* CFG_VIN2A_D13_OUT */
93027d170afSNishanth Menon 	{0x0A88, 1600, 0},	/* CFG_VIN2A_D14_OUT */
93127d170afSNishanth Menon 	{0x0A94, 900, 0},	/* CFG_VIN2A_D15_OUT */
93227d170afSNishanth Menon 	{0x0AA0, 680, 0},	/* CFG_VIN2A_D16_OUT */
93327d170afSNishanth Menon 	{0x0AAC, 500, 0},	/* CFG_VIN2A_D17_OUT */
93427d170afSNishanth Menon 	{0x0AB0, 702, 0},	/* CFG_VIN2A_D18_IN */
93527d170afSNishanth Menon 	{0x0ABC, 136, 976},	/* CFG_VIN2A_D19_IN */
93627d170afSNishanth Menon 	{0x0AD4, 210, 1357},	/* CFG_VIN2A_D20_IN */
93727d170afSNishanth Menon 	{0x0AE0, 189, 1462},	/* CFG_VIN2A_D21_IN */
93827d170afSNishanth Menon 	{0x0AEC, 232, 1278},	/* CFG_VIN2A_D22_IN */
93927d170afSNishanth Menon 	{0x0AF8, 0, 1397},	/* CFG_VIN2A_D23_IN */
940900e2104SVignesh R 	{0x0144, 0, 0},         /* CFG_GPMC_A13_IN */
941900e2104SVignesh R 	{0x0150, 1976, 1389},   /* CFG_GPMC_A14_IN */
942900e2104SVignesh R 	{0x015C, 1872, 1408},   /* CFG_GPMC_A15_IN */
943900e2104SVignesh R 	{0x0168, 1914, 1506},   /* CFG_GPMC_A16_IN */
944900e2104SVignesh R 	{0x0170, 57, 0},        /* CFG_GPMC_A16_OUT */
945900e2104SVignesh R 	{0x0174, 1904, 1471},   /* CFG_GPMC_A17_IN */
946900e2104SVignesh R 	{0x0188, 1690, 0},      /* CFG_GPMC_A18_OUT */
947900e2104SVignesh R 	{0x0374, 0, 0},         /* CFG_GPMC_CS2_OUT */
94827d170afSNishanth Menon };
94903589234SNishanth Menon 
95003589234SNishanth Menon const struct iodelay_cfg_entry dra742_es2_0_iodelay_cfg_array[] = {
95103589234SNishanth Menon 	{0x06F0, 471, 0},	/* CFG_RGMII0_RXC_IN */
95203589234SNishanth Menon 	{0x06FC, 30, 1919},	/* CFG_RGMII0_RXCTL_IN */
95303589234SNishanth Menon 	{0x0708, 74, 1688},	/* CFG_RGMII0_RXD0_IN */
95403589234SNishanth Menon 	{0x0714, 94, 1697},	/* CFG_RGMII0_RXD1_IN */
95503589234SNishanth Menon 	{0x0720, 0, 1703},	/* CFG_RGMII0_RXD2_IN */
95603589234SNishanth Menon 	{0x072C, 70, 1804},	/* CFG_RGMII0_RXD3_IN */
95703589234SNishanth Menon 	{0x0740, 70, 70},	/* CFG_RGMII0_TXC_OUT */
95803589234SNishanth Menon 	{0x074C, 35, 70},	/* CFG_RGMII0_TXCTL_OUT */
95903589234SNishanth Menon 	{0x0758, 100, 130},	/* CFG_RGMII0_TXD0_OUT */
96003589234SNishanth Menon 	{0x0764, 0, 70},	/* CFG_RGMII0_TXD1_OUT */
96103589234SNishanth Menon 	{0x0770, 0, 0},	/* CFG_RGMII0_TXD2_OUT */
96203589234SNishanth Menon 	{0x077C, 100, 130},	/* CFG_RGMII0_TXD3_OUT */
96303589234SNishanth Menon 	{0x08D0, 0, 0},	/* CFG_VIN1A_CLK0_IN */
96403589234SNishanth Menon 	{0x08DC, 2105, 619},	/* CFG_VIN1A_D0_IN */
96503589234SNishanth Menon 	{0x08E8, 2107, 739},	/* CFG_VIN1A_D10_IN */
96603589234SNishanth Menon 	{0x08F4, 2005, 788},	/* CFG_VIN1A_D11_IN */
96703589234SNishanth Menon 	{0x0900, 2059, 1297},	/* CFG_VIN1A_D12_IN */
96803589234SNishanth Menon 	{0x090C, 2027, 1141},	/* CFG_VIN1A_D13_IN */
96903589234SNishanth Menon 	{0x0918, 2071, 1332},	/* CFG_VIN1A_D14_IN */
97003589234SNishanth Menon 	{0x0924, 1995, 1764},	/* CFG_VIN1A_D15_IN */
97103589234SNishanth Menon 	{0x0930, 1999, 1542},	/* CFG_VIN1A_D16_IN */
97203589234SNishanth Menon 	{0x093C, 2072, 1540},	/* CFG_VIN1A_D17_IN */
97303589234SNishanth Menon 	{0x0948, 2034, 1629},	/* CFG_VIN1A_D18_IN */
97403589234SNishanth Menon 	{0x0954, 2026, 1761},	/* CFG_VIN1A_D19_IN */
97503589234SNishanth Menon 	{0x0960, 2017, 757},	/* CFG_VIN1A_D1_IN */
97603589234SNishanth Menon 	{0x096C, 2037, 1469},	/* CFG_VIN1A_D20_IN */
97703589234SNishanth Menon 	{0x0978, 2077, 1349},	/* CFG_VIN1A_D21_IN */
97803589234SNishanth Menon 	{0x0984, 2022, 1545},	/* CFG_VIN1A_D22_IN */
97903589234SNishanth Menon 	{0x0990, 2168, 784},	/* CFG_VIN1A_D23_IN */
98003589234SNishanth Menon 	{0x099C, 1996, 962},	/* CFG_VIN1A_D2_IN */
98103589234SNishanth Menon 	{0x09A8, 1993, 901},	/* CFG_VIN1A_D3_IN */
98203589234SNishanth Menon 	{0x09B4, 2098, 499},	/* CFG_VIN1A_D4_IN */
98303589234SNishanth Menon 	{0x09C0, 2038, 844},	/* CFG_VIN1A_D5_IN */
98403589234SNishanth Menon 	{0x09CC, 2002, 863},	/* CFG_VIN1A_D6_IN */
98503589234SNishanth Menon 	{0x09D8, 2063, 873},	/* CFG_VIN1A_D7_IN */
98603589234SNishanth Menon 	{0x09E4, 2088, 759},	/* CFG_VIN1A_D8_IN */
98703589234SNishanth Menon 	{0x09F0, 2152, 701},	/* CFG_VIN1A_D9_IN */
98803589234SNishanth Menon 	{0x09FC, 1926, 728},	/* CFG_VIN1A_DE0_IN */
98903589234SNishanth Menon 	{0x0A08, 2043, 937},	/* CFG_VIN1A_FLD0_IN */
99003589234SNishanth Menon 	{0x0A14, 1978, 909},	/* CFG_VIN1A_HSYNC0_IN */
99103589234SNishanth Menon 	{0x0A20, 1926, 987},	/* CFG_VIN1A_VSYNC0_IN */
99203589234SNishanth Menon 	{0x0A70, 140, 0},	/* CFG_VIN2A_D12_OUT */
99303589234SNishanth Menon 	{0x0A7C, 90, 70},	/* CFG_VIN2A_D13_OUT */
99403589234SNishanth Menon 	{0x0A88, 0, 0},	/* CFG_VIN2A_D14_OUT */
99503589234SNishanth Menon 	{0x0A94, 0, 0},	/* CFG_VIN2A_D15_OUT */
99603589234SNishanth Menon 	{0x0AA0, 0, 70},	/* CFG_VIN2A_D16_OUT */
99703589234SNishanth Menon 	{0x0AAC, 0, 0},	/* CFG_VIN2A_D17_OUT */
99803589234SNishanth Menon 	{0x0AB0, 612, 0},	/* CFG_VIN2A_D18_IN */
99903589234SNishanth Menon 	{0x0ABC, 4, 927},	/* CFG_VIN2A_D19_IN */
100003589234SNishanth Menon 	{0x0AD4, 136, 1340},	/* CFG_VIN2A_D20_IN */
100103589234SNishanth Menon 	{0x0AE0, 130, 1450},	/* CFG_VIN2A_D21_IN */
100203589234SNishanth Menon 	{0x0AEC, 144, 1269},	/* CFG_VIN2A_D22_IN */
100303589234SNishanth Menon 	{0x0AF8, 0, 1330},	/* CFG_VIN2A_D23_IN */
1004900e2104SVignesh R 	{0x0144, 0, 0},         /* CFG_GPMC_A13_IN */
1005900e2104SVignesh R 	{0x0150, 2575, 966},    /* CFG_GPMC_A14_IN */
1006900e2104SVignesh R 	{0x015C, 2503, 889},    /* CFG_GPMC_A15_IN */
1007900e2104SVignesh R 	{0x0168, 2528, 1007},   /* CFG_GPMC_A16_IN */
1008900e2104SVignesh R 	{0x0170, 0, 0},         /* CFG_GPMC_A16_OUT */
1009900e2104SVignesh R 	{0x0174, 2533, 980},    /* CFG_GPMC_A17_IN */
1010900e2104SVignesh R 	{0x0188, 590, 0},       /* CFG_GPMC_A18_OUT */
1011900e2104SVignesh R 	{0x0374, 0, 0},         /* CFG_GPMC_CS2_OUT */
101203589234SNishanth Menon };
10139120ef07SLokesh Vutla 
10149120ef07SLokesh Vutla const struct iodelay_cfg_entry dra76x_es1_0_iodelay_cfg_array[] = {
10159120ef07SLokesh Vutla 	{0x011C, 787, 0},	/* CFG_GPMC_A0_OUT */
10169120ef07SLokesh Vutla 	{0x0128, 1181, 0},	/* CFG_GPMC_A10_OUT */
10179120ef07SLokesh Vutla 	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
10189120ef07SLokesh Vutla 	{0x0150, 2149, 1052},	/* CFG_GPMC_A14_IN */
10199120ef07SLokesh Vutla 	{0x015C, 2121, 997},	/* CFG_GPMC_A15_IN */
10209120ef07SLokesh Vutla 	{0x0168, 2159, 1134},	/* CFG_GPMC_A16_IN */
10219120ef07SLokesh Vutla 	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
10229120ef07SLokesh Vutla 	{0x0174, 2135, 1085},	/* CFG_GPMC_A17_IN */
10239120ef07SLokesh Vutla 	{0x0188, 0, 0},	/* CFG_GPMC_A18_OUT */
10249120ef07SLokesh Vutla 	{0x01A0, 592, 0},	/* CFG_GPMC_A1_OUT */
10259120ef07SLokesh Vutla 	{0x020C, 641, 0},	/* CFG_GPMC_A2_OUT */
10269120ef07SLokesh Vutla 	{0x0218, 1481, 0},	/* CFG_GPMC_A3_OUT */
10279120ef07SLokesh Vutla 	{0x0224, 1775, 0},	/* CFG_GPMC_A4_OUT */
10289120ef07SLokesh Vutla 	{0x0230, 785, 0},	/* CFG_GPMC_A5_OUT */
10299120ef07SLokesh Vutla 	{0x023C, 848, 0},	/* CFG_GPMC_A6_OUT */
10309120ef07SLokesh Vutla 	{0x0248, 851, 0},	/* CFG_GPMC_A7_OUT */
10319120ef07SLokesh Vutla 	{0x0254, 1783, 0},	/* CFG_GPMC_A8_OUT */
10329120ef07SLokesh Vutla 	{0x0260, 951, 0},	/* CFG_GPMC_A9_OUT */
10339120ef07SLokesh Vutla 	{0x026C, 1091, 0},	/* CFG_GPMC_AD0_OUT */
10349120ef07SLokesh Vutla 	{0x0278, 1027, 0},	/* CFG_GPMC_AD10_OUT */
10359120ef07SLokesh Vutla 	{0x0284, 824, 0},	/* CFG_GPMC_AD11_OUT */
10369120ef07SLokesh Vutla 	{0x0290, 1196, 0},	/* CFG_GPMC_AD12_OUT */
10379120ef07SLokesh Vutla 	{0x029C, 754, 0},	/* CFG_GPMC_AD13_OUT */
10389120ef07SLokesh Vutla 	{0x02A8, 665, 0},	/* CFG_GPMC_AD14_OUT */
10399120ef07SLokesh Vutla 	{0x02B4, 1027, 0},	/* CFG_GPMC_AD15_OUT */
10409120ef07SLokesh Vutla 	{0x02C0, 937, 0},	/* CFG_GPMC_AD1_OUT */
10419120ef07SLokesh Vutla 	{0x02CC, 1168, 0},	/* CFG_GPMC_AD2_OUT */
10429120ef07SLokesh Vutla 	{0x02D8, 872, 0},	/* CFG_GPMC_AD3_OUT */
10439120ef07SLokesh Vutla 	{0x02E4, 1092, 0},	/* CFG_GPMC_AD4_OUT */
10449120ef07SLokesh Vutla 	{0x02F0, 576, 0},	/* CFG_GPMC_AD5_OUT */
10459120ef07SLokesh Vutla 	{0x02FC, 1113, 0},	/* CFG_GPMC_AD6_OUT */
10469120ef07SLokesh Vutla 	{0x0308, 943, 0},	/* CFG_GPMC_AD7_OUT */
10479120ef07SLokesh Vutla 	{0x0314, 0, 0},	/* CFG_GPMC_AD8_OUT */
10489120ef07SLokesh Vutla 	{0x0320, 0, 0},	/* CFG_GPMC_AD9_OUT */
10499120ef07SLokesh Vutla 	{0x0374, 0, 0},	/* CFG_GPMC_CS2_OUT */
10509120ef07SLokesh Vutla 	{0x0380, 1801, 948},	/* CFG_GPMC_CS3_OUT */
10519120ef07SLokesh Vutla 	{0x06F0, 451, 0},	/* CFG_RGMII0_RXC_IN */
10529120ef07SLokesh Vutla 	{0x06FC, 127, 1571},	/* CFG_RGMII0_RXCTL_IN */
10539120ef07SLokesh Vutla 	{0x0708, 165, 1178},	/* CFG_RGMII0_RXD0_IN */
10549120ef07SLokesh Vutla 	{0x0714, 136, 1302},	/* CFG_RGMII0_RXD1_IN */
10559120ef07SLokesh Vutla 	{0x0720, 0, 1520},	/* CFG_RGMII0_RXD2_IN */
10569120ef07SLokesh Vutla 	{0x072C, 28, 1690},	/* CFG_RGMII0_RXD3_IN */
10579120ef07SLokesh Vutla 	{0x0740, 121, 0},	/* CFG_RGMII0_TXC_OUT */
10589120ef07SLokesh Vutla 	{0x074C, 60, 0},	/* CFG_RGMII0_TXCTL_OUT */
10599120ef07SLokesh Vutla 	{0x0758, 153, 0},	/* CFG_RGMII0_TXD0_OUT */
10609120ef07SLokesh Vutla 	{0x0764, 35, 0},	/* CFG_RGMII0_TXD1_OUT */
10619120ef07SLokesh Vutla 	{0x0770, 0, 0},	/* CFG_RGMII0_TXD2_OUT */
10629120ef07SLokesh Vutla 	{0x077C, 172, 0},	/* CFG_RGMII0_TXD3_OUT */
10639120ef07SLokesh Vutla 	{0x0A38, 0, 0},	/* CFG_VIN2A_CLK0_IN */
10649120ef07SLokesh Vutla 	{0x0A44, 2180, 0},	/* CFG_VIN2A_D0_IN */
10659120ef07SLokesh Vutla 	{0x0A50, 2297, 110},	/* CFG_VIN2A_D10_IN */
10669120ef07SLokesh Vutla 	{0x0A5C, 1938, 0},	/* CFG_VIN2A_D11_IN */
10679120ef07SLokesh Vutla 	{0x0A70, 147, 0},	/* CFG_VIN2A_D12_OUT */
10689120ef07SLokesh Vutla 	{0x0A7C, 110, 0},	/* CFG_VIN2A_D13_OUT */
10699120ef07SLokesh Vutla 	{0x0A88, 18, 0},	/* CFG_VIN2A_D14_OUT */
10709120ef07SLokesh Vutla 	{0x0A94, 82, 0},	/* CFG_VIN2A_D15_OUT */
10719120ef07SLokesh Vutla 	{0x0AA0, 33, 0},	/* CFG_VIN2A_D16_OUT */
10729120ef07SLokesh Vutla 	{0x0AAC, 0, 0},	/* CFG_VIN2A_D17_OUT */
10739120ef07SLokesh Vutla 	{0x0AB0, 417, 0},	/* CFG_VIN2A_D18_IN */
10749120ef07SLokesh Vutla 	{0x0ABC, 156, 843},	/* CFG_VIN2A_D19_IN */
10759120ef07SLokesh Vutla 	{0x0AC8, 2326, 309},	/* CFG_VIN2A_D1_IN */
10769120ef07SLokesh Vutla 	{0x0AD4, 223, 1413},	/* CFG_VIN2A_D20_IN */
10779120ef07SLokesh Vutla 	{0x0AE0, 169, 1415},	/* CFG_VIN2A_D21_IN */
10789120ef07SLokesh Vutla 	{0x0AEC, 43, 1150},	/* CFG_VIN2A_D22_IN */
10799120ef07SLokesh Vutla 	{0x0AF8, 0, 1210},	/* CFG_VIN2A_D23_IN */
10809120ef07SLokesh Vutla 	{0x0B04, 2057, 0},	/* CFG_VIN2A_D2_IN */
10819120ef07SLokesh Vutla 	{0x0B10, 2440, 257},	/* CFG_VIN2A_D3_IN */
10829120ef07SLokesh Vutla 	{0x0B1C, 2142, 0},	/* CFG_VIN2A_D4_IN */
10839120ef07SLokesh Vutla 	{0x0B28, 2455, 252},	/* CFG_VIN2A_D5_IN */
10849120ef07SLokesh Vutla 	{0x0B34, 1883, 0},	/* CFG_VIN2A_D6_IN */
10859120ef07SLokesh Vutla 	{0x0B40, 2229, 0},	/* CFG_VIN2A_D7_IN */
10869120ef07SLokesh Vutla 	{0x0B4C, 2250, 151},	/* CFG_VIN2A_D8_IN */
10879120ef07SLokesh Vutla 	{0x0B58, 2279, 27},	/* CFG_VIN2A_D9_IN */
10889120ef07SLokesh Vutla 	{0x0B7C, 2233, 0},	/* CFG_VIN2A_HSYNC0_IN */
10899120ef07SLokesh Vutla 	{0x0B88, 1936, 0},	/* CFG_VIN2A_VSYNC0_IN */
10909120ef07SLokesh Vutla 	{0x0B9C, 1281, 497},	/* CFG_VOUT1_CLK_OUT */
10919120ef07SLokesh Vutla 	{0x0BA8, 379, 0},	/* CFG_VOUT1_D0_OUT */
10929120ef07SLokesh Vutla 	{0x0BB4, 441, 0},	/* CFG_VOUT1_D10_OUT */
10939120ef07SLokesh Vutla 	{0x0BC0, 461, 0},	/* CFG_VOUT1_D11_OUT */
10949120ef07SLokesh Vutla 	{0x0BCC, 1189, 0},	/* CFG_VOUT1_D12_OUT */
10959120ef07SLokesh Vutla 	{0x0BD8, 312, 0},	/* CFG_VOUT1_D13_OUT */
10969120ef07SLokesh Vutla 	{0x0BE4, 298, 0},	/* CFG_VOUT1_D14_OUT */
10979120ef07SLokesh Vutla 	{0x0BF0, 284, 0},	/* CFG_VOUT1_D15_OUT */
10989120ef07SLokesh Vutla 	{0x0BFC, 152, 0},	/* CFG_VOUT1_D16_OUT */
10999120ef07SLokesh Vutla 	{0x0C08, 216, 0},	/* CFG_VOUT1_D17_OUT */
11009120ef07SLokesh Vutla 	{0x0C14, 408, 0},	/* CFG_VOUT1_D18_OUT */
11019120ef07SLokesh Vutla 	{0x0C20, 519, 0},	/* CFG_VOUT1_D19_OUT */
11029120ef07SLokesh Vutla 	{0x0C2C, 475, 0},	/* CFG_VOUT1_D1_OUT */
11039120ef07SLokesh Vutla 	{0x0C38, 316, 0},	/* CFG_VOUT1_D20_OUT */
11049120ef07SLokesh Vutla 	{0x0C44, 59, 0},	/* CFG_VOUT1_D21_OUT */
11059120ef07SLokesh Vutla 	{0x0C50, 221, 0},	/* CFG_VOUT1_D22_OUT */
11069120ef07SLokesh Vutla 	{0x0C5C, 96, 0},	/* CFG_VOUT1_D23_OUT */
11079120ef07SLokesh Vutla 	{0x0C68, 264, 0},	/* CFG_VOUT1_D2_OUT */
11089120ef07SLokesh Vutla 	{0x0C74, 421, 0},	/* CFG_VOUT1_D3_OUT */
11099120ef07SLokesh Vutla 	{0x0C80, 1257, 0},	/* CFG_VOUT1_D4_OUT */
11109120ef07SLokesh Vutla 	{0x0C8C, 432, 0},	/* CFG_VOUT1_D5_OUT */
11119120ef07SLokesh Vutla 	{0x0C98, 436, 0},	/* CFG_VOUT1_D6_OUT */
11129120ef07SLokesh Vutla 	{0x0CA4, 440, 0},	/* CFG_VOUT1_D7_OUT */
11139120ef07SLokesh Vutla 	{0x0CB0, 81, 100},	/* CFG_VOUT1_D8_OUT */
11149120ef07SLokesh Vutla 	{0x0CBC, 471, 0},	/* CFG_VOUT1_D9_OUT */
11159120ef07SLokesh Vutla 	{0x0CC8, 0, 0},	/* CFG_VOUT1_DE_OUT */
11169120ef07SLokesh Vutla 	{0x0CE0, 0, 0},	/* CFG_VOUT1_HSYNC_OUT */
11179120ef07SLokesh Vutla 	{0x0CEC, 815, 0},	/* CFG_VOUT1_VSYNC_OUT */
11189120ef07SLokesh Vutla };
111927d170afSNishanth Menon #endif
112027d170afSNishanth Menon 
1121687054a7SLokesh Vutla #endif /* _MUX_DATA_DRA7XX_H_ */
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