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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
[all …]
H A Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
18 mpp0 0 gpio, ua0(rxd)
19 mpp1 1 gpio, ua0(txd)
20 mpp2 2 gpio, i2c0(sck)
21 mpp3 3 gpio, i2c0(sda)
22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dtegra_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
3 * NVIDIA Tegra20 GPIO handling.
4 * (C) Copyright 2010-2012,2015
21 #include <asm/gpio.h>
22 #include <dm/device-internal.h>
23 #include <dt-bindings/gpio/gpio.h>
26 static const int CONFIG_GPIO = 1;
28 static const int DIRECTION_OUTPUT = 1;
33 int base_gpio; /* Port number for this port (0, 1,.., n-1) */
36 /* Information about each port at run-time */
[all …]
H A Dmpc83xx_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Freescale MPC83xx GPIO handling.
8 #include <asm/gpio.h>
36 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument
38 if (gpio >= MAX_NUM_GPIOS) in gpio_request()
39 return -1; in gpio_request()
44 int gpio_free(unsigned gpio) in gpio_free() argument
50 /* set GPIO pin 'gpio' as an input */
51 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument
58 /* 32-bits per controller */ in gpio_direction_input()
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dpxaregs.c2 * pxaregs - tool to display and modify PXA250's registers at runtime
4 * (c) Copyright 2002 by M&N Logistik-Lösungen Online GmbH
9 * Please send patches to h.schurig, working at mn-logistik.de
10 * - added fix from Bernhard Nemec
11 * - i2c registers from Stefan Eletzhofer
25 #include <linux/i2c-dev.h>
29 static int fd = -1;
46 { "IBMR_SCLS", 0x40301680, 1, 0x00000001, 'x', "SDA Status" },
52 { "ICR_START", 0x40301690, 0, 1, 'x', " start bit " },
53 { "ICR_STOP", 0x40301690, 1, 1, 'x', " stop bit " },
[all …]
/openbmc/linux/arch/arc/boot/dts/
H A Dabilis_tb101.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
30 /* Port 1 */
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
[all …]
H A Dabilis_tb100.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
30 /* Port 1 */
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
[all …]
/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 HiSilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-yosemite4.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/leds/leds-pca955x.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,yosemite4-bmc", "aspeed,ast2600";
44 stdout-path = "serial4:57600n8";
52 iio-hwmon {
53 compatible = "iio-hwmon";
[all …]
/openbmc/linux/include/linux/
H A Dgpio.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * <linux/gpio.h>
5 * This is the LEGACY GPIO bulk include file, including legacy APIs. It is
6 * used for GPIO drivers still referencing the global GPIO numberspace,
9 * If you're implementing a GPIO driver, only include <linux/gpio/driver.h>
10 * If you're implementing a GPIO consumer, only include <linux/gpio/consumer.h>
19 /* see Documentation/driver-api/gpio/legacy.rst */
21 /* make these flag values available regardless of GPIO kconfig options */
23 #define GPIOF_DIR_IN (1 << 0)
25 #define GPIOF_INIT_LOW (0 << 1)
[all …]
/openbmc/qemu/tests/qtest/
H A Dstm32l4x5_gpio-test.c4 * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
5 * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr>
8 * See the COPYING file in the top-level directory.
12 #include "libqtest-single.h"
38 #define MODER_OUTPUT 1
41 #define PUPDR_PULLUP 1
45 #define OTYPER_OPEN_DRAIN 1
84 #define GPIO_ADDR_MASK (~(GPIO_SIZE - 1))
94 static uint32_t gpio_readl(unsigned int gpio, unsigned int offset) in gpio_readl() argument
96 return readl(gpio + offset); in gpio_readl()
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-tegra186.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2022 NVIDIA Corporation
9 #include <linux/gpio/driver.h>
18 #include <dt-bindings/gpio/tegra186-gpio.h>
19 #include <dt-bindings/gpio/tegra194-gpio.h>
20 #include <dt-bindings/gpio/tegra234-gpio.h>
21 #include <dt-bindings/gpio/tegra241-gpio.h>
38 #define TEGRA186_GPIO_SCR_SEC_G1R BIT(1)
43 #define TEGRA186_GPIO_ENABLE_CONFIG_OUT BIT(1)
98 struct gpio_chip gpio; member
[all …]
H A Dgpio-zynq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Xilinx Zynq GPIO device driver
5 * Copyright (C) 2009 - 2014 Xilinx, Inc.
10 #include <linux/gpio/driver.h>
20 #define DRIVER_NAME "zynq-gpio"
46 ZYNQ##str##_GPIO_BANK0_NGPIO - 1)
47 #define ZYNQ_GPIO_BANK1_PIN_MIN(str) (ZYNQ_GPIO_BANK0_PIN_MAX(str) + 1)
49 ZYNQ##str##_GPIO_BANK1_NGPIO - 1)
50 #define ZYNQ_GPIO_BANK2_PIN_MIN(str) (ZYNQ_GPIO_BANK1_PIN_MAX(str) + 1)
52 ZYNQ##str##_GPIO_BANK2_NGPIO - 1)
[all …]
/openbmc/linux/arch/mips/include/asm/mach-au1x00/
H A Dgpio-au1000.h2 * GPIO functions for Au1000, Au1500, Au1100, Au1550, Au1200
12 #include <asm/mach-au1x00/au1000.h>
14 /* The default GPIO numberspace as documented in the Alchemy manuals.
15 * GPIO0-31 from GPIO1 block, GPIO200-215 from GPIO2 block.
22 #define ALCHEMY_GPIO1_MAX (ALCHEMY_GPIO1_BASE + ALCHEMY_GPIO1_NUM - 1)
23 #define ALCHEMY_GPIO2_MAX (ALCHEMY_GPIO2_BASE + ALCHEMY_GPIO2_NUM - 1)
43 struct gpio;
45 static inline int au1000_gpio1_to_irq(int gpio) in au1000_gpio1_to_irq() argument
47 return MAKE_IRQ(1, gpio - ALCHEMY_GPIO1_BASE); in au1000_gpio1_to_irq()
50 static inline int au1000_gpio2_to_irq(int gpio) in au1000_gpio2_to_irq() argument
[all …]
/openbmc/linux/drivers/ssb/
H A Ddriver_gpio.c3 * GPIO driver
6 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
13 #include <linux/gpio/driver.h>
26 static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio) in ssb_gpio_to_irq() argument
30 if (bus->bustype == SSB_BUSTYPE_SSB) in ssb_gpio_to_irq()
31 return irq_find_mapping(bus->irq_domain, gpio); in ssb_gpio_to_irq()
33 return -EINVAL; in ssb_gpio_to_irq()
41 static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned int gpio) in ssb_gpio_chipco_get_value() argument
45 return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio); in ssb_gpio_chipco_get_value()
48 static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned int gpio, in ssb_gpio_chipco_set_value() argument
[all …]
/openbmc/openbmc/meta-yadro/meta-nicole/recipes-bsp/u-boot/files/
H A D0003-aspeed-add-gpio-support.patch4 Subject: [PATCH] aspeed: add gpio support
6 This is an initial support for the parallel GPIO pins directly connected
9 This brings the functions and a shell command to manipulate the GPIO
10 state. The GPIO value reading and writing work in non interrupt mode
13 Signed-off-by: Alexander Filippov <a.filippov@yadro.com>
14 ---
15 arch/arm/include/asm/arch-aspeed/gpio.h | 65 ++++
16 arch/arm/include/asm/arch-aspeed/platform.h | 1 +
17 drivers/gpio/Makefile | 2 +
18 drivers/gpio/aspeed_gpio.c | 386 ++++++++++++++++++++
[all …]
/openbmc/skeleton/libopenbmc_intf/
H A Dgpio.c14 #include "gpio.h"
18 #include <linux/gpio.h>
21 #define GPIO_BASE_PATH "/sys/class/gpio"
26 int gpio_write(GPIO* gpio, uint8_t value) in gpio_write() argument
28 g_assert (gpio != NULL); in gpio_write()
33 if (gpio->fd <= 0) in gpio_write()
38 if (ioctl(gpio->fd, GPIOHANDLE_SET_LINE_VALUES_IOCTL, &data) < 0) in gpio_write()
46 int gpio_read(GPIO* gpio, uint8_t *value) in gpio_read() argument
48 g_assert (gpio != NULL); in gpio_read()
52 if (gpio->fd <= 0) in gpio_read()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs35l45.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
11 - Richard Fitzgerald <rf@opensource.cirrus.com>
18 - $ref: dai-common.yaml#
23 - cirrus,cs35l45
26 maxItems: 1
28 '#sound-dai-cells':
29 const: 1
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dmrvl-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell PXA GPIO controller
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <bgolaszewski@baylibre.com>
12 - Rob Herring <robh+dt@kernel.org>
15 - if:
20 - intel,pxa25x-gpio
[all …]
/openbmc/linux/include/dt-bindings/sound/
H A Dcs35l45.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header
12 * cirrus,asp-sdout-hiz-ctrl
14 * TX_HIZ_UNUSED: TX pin high-impedance during unused slots.
15 * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled.
21 * Optional GPIOX Sub-nodes:
22 * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])
23 * sub-nodes for configuring the GPIO pins.
25 * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'
26 * is 1.
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Exynos5410 SoC pin-mux and pin-config device tree source
9 #include "exynos-pinctrl.h"
12 gpa0: gpa0-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
16 interrupt-controller;
17 #interrupt-cells = <2>;
20 gpa1: gpa1-gpio-bank {
21 gpio-controller;
[all …]
/openbmc/linux/arch/mips/boot/dts/pic32/
H A Dpic32mzda.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
49 #clock-cells = <0>;
[all …]
/openbmc/u-boot/include/asm-generic/
H A Dgpio.h1 /* SPDX-License-Identifier: GPL-2.0+ */
15 * Generic GPIO API for U-Boot
17 * --
20 * - gpio_request_by_name()
21 * - dm_gpio_get_value() etc.
24 * --
26 * GPIOs are numbered from 0 to GPIO_COUNT-1 which value is defined
29 * Each GPIO can be an input or output. If an input then its value can
30 * be read as 0 or 1. If an output then its value can be set to 0 or 1.
35 * In some cases the operation may fail, for example if the GPIO number
[all …]
/openbmc/u-boot/doc/device-tree-bindings/gpio/
H A Dsnps,creg-gpio.txt1 GPIO via CREG (control registers) driver
5 [ not used | gpio-1 | gpio-0 | <-shift-> ] < 32 bit register
8 write 0x2 == set output to "1" (activate)
12 - compatible : "snps,creg-gpio"
13 - reg : Exactly one register range with length 0x4.
14 - #gpio-cells : Should be one - the pin number.
15 - gpio-controller : Marks the device node as a GPIO controller.
16 - gpio-count: Number of GPIO pins.
17 - gpio-bit-per-line: Number of bits per gpio line (see picture).
18 - gpio-first-shift: Shift (in bits) of the first GPIO field in register
[all …]
/openbmc/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-ac5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include "pinctrl-mvebu.h"
21 MPP_FUNCTION(0, "gpio", NULL),
22 MPP_FUNCTION(1, "sdio", "d0"),
24 MPP_MODE(1,
25 MPP_FUNCTION(0, "gpio", NULL),
26 MPP_FUNCTION(1, "sdio", "d1"),
29 MPP_FUNCTION(0, "gpio", NULL),
30 MPP_FUNCTION(1, "sdio", "d2"),
33 MPP_FUNCTION(0, "gpio", NULL),
[all …]

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