/openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | adi,axi-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Analog Devices AXI ADC IP core 10 - Michael Hennerich <michael.hennerich@analog.com> 13 Analog Devices Generic AXI ADC IP core for interfacing an ADC device 17 interface for the actual ADC, while this IP core will interface 18 to the data-lines of the ADC and handle the streaming of data into 26 - adi,axi-adc-10.0.a [all …]
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H A D | xilinx-xadc.txt | 6 The Xilinx XADC is an ADC that can be found in the Series 7 FPGAs from Xilinx. 10 on all series 7 platforms and is a softmacro with a AXI interface. This binding 14 The Xilinx System Monitor is an ADC that is found in the UltraScale and 17 System Monitor through an AXI interface in the FPGA fabric. This IP core is 22 - compatible: Should be one of 23 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device 25 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to 27 * "xlnx,system-management-wiz-1.3": When using the 30 - reg: Address and length of the register set for the device 31 - interrupts: Interrupt for the XADC control interface. [all …]
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/openbmc/linux/drivers/iio/adc/ |
H A D | adi-axi-adc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Analog Devices Generic AXI ADC IP core 6 * Copyright 2012-2020 Analog Devices Inc. 21 #include <linux/fpga/adi-axi-common.h> 24 #include <linux/iio/buffer-dmaengine.h> 33 /* ADC controls */ 40 /* ADC Channel controls */ 69 ret = regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN, in axi_adc_enable() 75 return regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN, in axi_adc_enable() 83 regmap_write(st->regmap, ADI_AXI_REG_RSTN, 0); in axi_adc_disable() [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # ADC drivers 10 bool "ST-Ericsson AB8500 GPADC driver" 25 tristate "Analog Device AD4130 ADC Driver" 33 Say yes here to build support for Analog Devices AD4130-8 SPI analog 34 to digital converters (ADC). 40 tristate "Analog Devices AD7091R5 ADC Driver" 44 Say yes here to build support for Analog Devices AD7091R-5 ADC. 47 tristate "Analog Devices AD7124 and similar sigma-delta ADCs driver" 51 Say yes here to build support for Analog Devices AD7124-4 and AD7124-8 [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for IIO ADC drivers 7 obj-$(CONFIG_AB8500_GPADC) += ab8500-gpadc.o 8 obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o 9 obj-$(CONFIG_AD4130) += ad4130.o 10 obj-$(CONFIG_AD7091R5) += ad7091r5.o ad7091r-base.o 11 obj-$(CONFIG_AD7124) += ad7124.o 12 obj-$(CONFIG_AD7192) += ad7192.o 13 obj-$(CONFIG_AD7266) += ad7266.o 14 obj-$(CONFIG_AD7280) += ad7280a.o [all …]
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H A D | xilinx-xadc-core.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright 2013-2014 Analog Devices Inc. 6 * Author: Lars-Peter Clausen <lars@metafoo.de> 9 * - XADC hardmacro: Xilinx UG480 10 * - ZYNQ XADC interface: Xilinx UG585 11 * - AXI XADC interface: Xilinx PG019 36 #include "xilinx-xadc.h" 88 /* AXI register definitions */ 117 * overloaded by the interrupts that it soft-lockups. For this reason the driver 126 writel(val, xadc->base + reg); in xadc_write_reg() [all …]
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/openbmc/u-boot/drivers/ |
H A D | Kconfig | 7 source "drivers/adc/Kconfig" 11 source "drivers/axi/Kconfig" 125 source "drivers/w1-eeprom/Kconfig"
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0+ 3 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/ 4 obj-$(CONFIG_$(SPL_TPL_)DM) += core/ 5 obj-$(CONFIG_$(SPL_TPL_)DFU) += dfu/ 6 obj-$(CONFIG_$(SPL_TPL_)GPIO_SUPPORT) += gpio/ 7 obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/ 8 obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/ 9 obj-$(CONFIG_$(SPL_TPL_)INPUT) += input/ 10 obj-$(CONFIG_$(SPL_TPL_)LED) += led/ 11 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/ [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | imx6sx.dtsi | 9 #include <dt-bindings/clock/imx6sx-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6sx-pinfunc.h" 55 #address-cells = <1>; 56 #size-cells = <0>; 59 compatible = "arm,cortex-a9"; 62 next-level-cache = <&L2>; 63 operating-points = < [all …]
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/openbmc/u-boot/test/dm/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0+ 5 obj-$(CONFIG_UT_DM) += bus.o 6 obj-$(CONFIG_UT_DM) += nop.o 7 obj-$(CONFIG_UT_DM) += test-driver.o 8 obj-$(CONFIG_UT_DM) += test-fdt.o 9 obj-$(CONFIG_UT_DM) += test-main.o 10 obj-$(CONFIG_UT_DM) += test-uclass.o 12 # Tests for particular subsystems - when enabling driver model for a new 14 obj-$(CONFIG_UT_DM) += core.o 16 obj-$(CONFIG_SOUND) += audio.o [all …]
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/openbmc/u-boot/arch/sandbox/dts/ |
H A D | test.dts | 1 /dts-v1/; 6 #address-cells = <1>; 7 #size-cells = <1>; 27 testfdt6 = "/e-test"; 28 testbus3 = "/some-bus"; 29 testfdt0 = "/some-bus/c-test@0"; 30 testfdt1 = "/some-bus/c-test@1"; 31 testfdt3 = "/b-test"; 32 testfdt5 = "/some-bus/c-test@5"; 33 testfdt8 = "/a-test"; [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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H A D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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H A D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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/openbmc/linux/arch/arc/boot/dts/ |
H A D | hsdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/reset/snps,hsdk-reset.h> 18 #address-cells = <2>; 19 #size-cells = <2>; 22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1"; 30 #address-cells = <1>; 31 #size-cells = <0>; 62 input_clk: input-clk { [all …]
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/openbmc/linux/sound/soc/codecs/ |
H A D | rt5631.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * rt5631.c -- RT5631 ALSA Soc Audio driver 22 #include <sound/soc-dapm.h> 68 * rt5631_write_index - write index register of 2nd layer 78 * rt5631_read_index - read index register of 2nd layer 169 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 170 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0); 171 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 189 ucontrol->value.integer.value[0] = rt5631->dmic_used_flag; in rt5631_dmic_get() 200 rt5631->dmic_used_flag = ucontrol->value.integer.value[0]; in rt5631_dmic_put() [all …]
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/openbmc/linux/drivers/clk/ |
H A D | clk-npcm8xx.c | 1 // SPDX-License-Identifier: GPL-2.0 15 #include <linux/clk-provider.h> 23 #include <dt-bindings/clock/nuvoton,npcm845-clk.h> 24 #include <soc/nuvoton/clock-npcm8xx.h> 190 { NPCM8XX_CLKDIV1, 21, 5, "pre_adc", &npcm8xx_muxes[6].hw, CLK_DIVIDER_READ_ONLY, 0, -1 }, 196 …{ NPCM8XX_CLKDIV1, 28, 3, "adc", &npcm8xx_pre_divs[0].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWE… 237 val = readl_relaxed(pll->pllcon); in npcm8xx_clk_pll_recalc_rate() 265 return ERR_PTR(-ENOMEM); in npcm8xx_clk_register_pll() 273 pll->pllcon = pllcon; in npcm8xx_clk_register_pll() 274 pll->hw.init = &init; in npcm8xx_clk_register_pll() [all …]
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/openbmc/linux/arch/arm/boot/dts/broadcom/ |
H A D | bcm-cygnus.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 34 #include <dt-bindings/interrupt-controller/irq.h> 35 #include <dt-bindings/clock/bcm-cygnus.h> 38 #address-cells = <1>; 39 #size-cells = <1>; 42 interrupt-parent = <&gic>; 54 #address-cells = <1>; 55 #size-cells = <0>; 59 compatible = "arm,cortex-a9"; 60 next-level-cache = <&L2>; [all …]
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rv1126.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rv1126-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rockchip,rv1126-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | r9a07g043.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/clock/r9a07g043-cpg.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 15 audio_clk1: audio1-clk { 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 19 clock-frequency = <0>; 22 audio_clk2: audio2-clk { 23 compatible = "fixed-clock"; [all …]
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H A D | r9a07g054.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g054-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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H A D | r9a07g044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g044-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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/openbmc/linux/drivers/hwmon/ |
H A D | axi-fan-control.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <linux/fpga/adi-axi-common.h> 11 #include <linux/hwmon-sysfs.h> 65 iowrite32(val, ctl->base + reg); in axi_iowrite() 71 return ioread32(ctl->base + reg); in axi_ioread() 76 * T = /raw * 509.3140064 / 65535) - 280.2308787 82 u32 temp = axi_ioread(attr->index, ctl); in axi_fan_control_show() 84 temp = DIV_ROUND_CLOSEST_ULL(temp * 509314ULL, 65535) - 280230; in axi_fan_control_show() 102 axi_iowrite(temp, attr->index, ctl); in axi_fan_control_store() 147 return DIV_ROUND_CLOSEST(60 * ctl->clk_rate, ctl->ppr * tach); in axi_fan_control_get_fan_rpm() [all …]
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/openbmc/u-boot/cmd/ |
H A D | Kconfig | 4 bool "Support U-Boot commands" 7 Enable U-Boot's command-line functions. This provides a means 8 to enter commands into U-Boot for a wide variety of purposes. It 12 substantially to the size of U-Boot. 71 U-Boot automatic booting process and bring the device 72 to the U-Boot prompt for user input. 103 autoboot starts booting, U-Boot gives a command prompt. The 104 U-Boot prompt will time out if CONFIG_BOOT_RETRY_TIME is 116 U-Boot gives a command prompt. The U-Boot prompt never 120 bool "Enable Ctrl-C autoboot interruption" [all …]
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