| /openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/ |
| H A D | video-pll.c | 30 static void dss_dpll_enable_scp_clk(struct dss_video_pll *vpll) in dss_dpll_enable_scp_clk() argument
32 REG_MOD(vpll->clkctrl_base, 1, 14, 14); /* CIO_CLK_ICG */ in dss_dpll_enable_scp_clk()
35 static void dss_dpll_disable_scp_clk(struct dss_video_pll *vpll) in dss_dpll_disable_scp_clk() argument
37 REG_MOD(vpll->clkctrl_base, 0, 14, 14); /* CIO_CLK_ICG */ in dss_dpll_disable_scp_clk()
40 static void dss_dpll_power_enable(struct dss_video_pll *vpll) in dss_dpll_power_enable() argument
42 REG_MOD(vpll->clkctrl_base, 2, 31, 30); /* PLL_POWER_ON_ALL */ in dss_dpll_power_enable()
51 static void dss_dpll_power_disable(struct dss_video_pll *vpll) in dss_dpll_power_disable() argument
53 REG_MOD(vpll->clkctrl_base, 0, 31, 30); /* PLL_POWER_OFF */ in dss_dpll_power_disable()
58 struct dss_video_pll *vpll = container_of(pll, struct dss_video_pll, pll); in dss_video_pll_enable() local
67 dss_dpll_enable_scp_clk(vpll); in dss_video_pll_enable()
[all …]
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| /openbmc/linux/drivers/gpu/drm/omapdrm/dss/ |
| H A D | video-pll.c | 28 static void dss_dpll_enable_scp_clk(struct dss_video_pll *vpll) in dss_dpll_enable_scp_clk() argument
30 REG_MOD(vpll->clkctrl_base, 1, 14, 14); /* CIO_CLK_ICG */ in dss_dpll_enable_scp_clk()
33 static void dss_dpll_disable_scp_clk(struct dss_video_pll *vpll) in dss_dpll_disable_scp_clk() argument
35 REG_MOD(vpll->clkctrl_base, 0, 14, 14); /* CIO_CLK_ICG */ in dss_dpll_disable_scp_clk()
38 static void dss_dpll_power_enable(struct dss_video_pll *vpll) in dss_dpll_power_enable() argument
40 REG_MOD(vpll->clkctrl_base, 2, 31, 30); /* PLL_POWER_ON_ALL */ in dss_dpll_power_enable()
49 static void dss_dpll_power_disable(struct dss_video_pll *vpll) in dss_dpll_power_disable() argument
51 REG_MOD(vpll->clkctrl_base, 0, 31, 30); /* PLL_POWER_OFF */ in dss_dpll_power_disable()
56 struct dss_video_pll *vpll = container_of(pll, struct dss_video_pll, pll); in dss_video_pll_enable() local
65 dss_dpll_enable_scp_clk(vpll); in dss_video_pll_enable()
[all …]
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| /openbmc/linux/drivers/mfd/ |
| H A D | stw481x.c | 82 u8 vpll; in stw481x_startup() local
113 vpll = (ret >> 4) & 1; /* Save bit 4 */ in stw481x_startup()
118 vpll |= (ret >> 1) & 2; in stw481x_startup()
124 dev_info(&stw481x->client->dev, "VPLL: %u.%uV %s\n", in stw481x_startup()
125 vpll_val[vpll] / 100, vpll_val[vpll] % 100, in stw481x_startup()
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| /openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | ti,sn65dsi86.yaml | 40 vpll-supply:
153 - vpll-supply
179 vpll-supply = <&src_pp1800_s4a>;
244 vpll-supply = <&pm8916_l17>;
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| /openbmc/linux/Documentation/devicetree/bindings/display/rockchip/ |
| H A D | rockchip,dw-hdmi.yaml | 62 - vpll
66 - vpll
69 - vpll
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| /openbmc/u-boot/drivers/clk/ |
| H A D | clk_zynqmp.c | 114 apll, dpll, vpll, enumerator
149 "vpll", "iopll_to_fpd", "rpll_to_fpd",
190 case vpll: in zynqmp_clk_get_register()
255 return vpll; in zynqmp_clk_get_cpu_pll()
269 return vpll; in zynqmp_clk_get_ddr_pll()
575 case iopll ... vpll: in zynqmp_clk_get_rate()
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| /openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx53-qsrb.dts | 95 vpll_reg: vpll {
96 regulator-name = "VPLL";
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| /openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/ |
| H A D | pll.c | 358 VPLL, enumerator
456 { CPM_LPCDR, VPLL, 30 }, in pll_init()
457 { CPM_LPCDR1, VPLL, 30 }, in pll_init()
459 { CPM_HDMICDR, VPLL, 30 }, in pll_init()
474 pll_init_one(VPLL, JZ4780_VPLL_M, JZ4780_VPLL_N, JZ4780_VPLL_OD); in pll_init()
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| /openbmc/u-boot/arch/arm/mach-exynos/ |
| H A D | clock.c | 144 } else if (pllreg == VPLL) { in exynos_get_pll_clk()
202 case VPLL: in exynos4_get_pll_clk()
232 case VPLL: in exynos4x12_get_pll_clk()
263 case VPLL: in exynos5_get_pll_clk()
321 case VPLL: in exynos542x_get_pll_clk()
443 sclk = exynos5_get_pll_clk(VPLL); in exynos5_get_periph_rate()
656 sclk = get_pll_clk(VPLL); in exynos4_get_pwm_clk()
717 sclk = get_pll_clk(VPLL); in exynos4_get_uart_clk()
763 sclk = get_pll_clk(VPLL); in exynos4x12_get_uart_clk()
799 sclk = get_pll_clk(VPLL); in exynos4_get_mmc_clk()
[all …]
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| /openbmc/u-boot/arch/arm/mach-s5pc1xx/include/mach/ |
| H A D | clk.h | 15 #define VPLL 4 macro
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| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | mc13xxx.txt | 95 vpll : regulator VPLL (register 32, bit 15)
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| H A D | tps65910.txt | 23 tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1,
39 vcc5-supply: VPLL and VDAC input.
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| /openbmc/linux/arch/arm64/boot/dts/nuvoton/ |
| H A D | ma35d1-iot-512m.dts | 45 <&clk VPLL>;
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| H A D | ma35d1-som-256m.dts | 45 <&clk VPLL>;
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | nuvoton,ma35d1-clk.yaml | 37 EPLL, and VPLL in sequential.
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| /openbmc/u-boot/arch/arm/mach-exynos/include/mach/ |
| H A D | clk.h | 14 #define VPLL 4 macro
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | tps65910.dtsi | 58 regulator-compatible = "vpll";
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| /openbmc/linux/arch/arm/boot/dts/ |
| H A D | tps65910.dtsi | 55 regulator-compatible = "vpll";
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| /openbmc/linux/arch/arm/boot/dts/ti/omap/ |
| H A D | motorola-cpcap-mapphone.dtsi | 205 vpll: VPLL { label
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| /openbmc/linux/drivers/clk/nuvoton/ |
| H A D | clk-ma35d1.c | 88 { .fw_name = "vpll", },
334 { .fw_name = "vpll", },
347 { .fw_name = "vpll", },
510 hws[VPLL] = ma35d1_reg_clk_pll(dev, VPLL, pllmode[4], "vpll", in ma35d1_clocks_probe()
616 hws[DCUP_DIV] = ma35d1_clk_divider_table(dev, "dcup_div", "vpll", in ma35d1_clocks_probe()
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| H A D | clk-ma35d1-pll.c | 238 case VPLL: in ma35d1_clk_pll_recalc_rate()
270 case VPLL: in ma35d1_clk_pll_round_rate()
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| /openbmc/u-boot/include/ |
| H A D | exynos_lcd.h | 71 /* parent clock name(MPLL, EPLL or VPLL) */
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | xlnx-zynqmp-clk.h | 16 #define VPLL 4 macro
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| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc7180-trogdor-ti-sn65dsi86.dtsi | 47 vpll-supply = <&pp1800_edp_vpll>;
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| /openbmc/linux/drivers/video/fbdev/nvidia/ |
| H A D | nv_type.h | 71 u32 vpll; member
|