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/openbmc/linux/arch/riscv/lib/
H A Dmemmove.S37 * Reverse Copy: t4 - Index counter of dest
54 add t4, a0, a2
69 andi t6, t4, -SZREG
163 sub a5, a4, t4 /* Find the difference between src and dest */
198 addi t4, t4, (-2 * SZREG)
202 REG_S t2, ( 1 * SZREG)(t4)
204 beq t4, a2, 2f
211 REG_S t2, ( 0 * SZREG)(t4)
213 bne t4, t5, 1b
215 mv t4, t5 /* Fix the dest pointer in case the loop was broken */
[all …]
/openbmc/linux/arch/alpha/lib/
H A Dev67-strrchr.S36 insbl a1, 1, t4 # U : 000000000000ch00
41 or t2, t4, a1 # E : 000000000000chch
48 sll a1, 48, t4 # U : chch000000000000
50 or t4, a1, a1 # E : chch00000000chch
56 mskqh t5, a0, t4 # E : Complete garbage mask
58 cmpbge zero, t4, t4 # E : bits set iff byte is garbage
61 andnot t1, t4, t1 # E : clear garbage from null test
62 andnot t3, t4, t3 # E : clear garbage from char test
84 negq t1, t4 # E : isolate first null byte match
85 and t1, t4, t4 # E :
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H A Dstrrchr.S31 lda t4, -1 # .. e1 : build garbage mask
34 mskqh t4, a0, t4 # e0 :
37 cmpbge zero, t4, t4 # .. e1 : bits set iff byte is garbage
39 andnot t1, t4, t1 # .. e1 : clear garbage from null test
40 andnot t3, t4, t3 # e0 : clear garbage from char test
56 negq t1, t4 # e0 : isolate first null byte match
57 and t1, t4, t4 # e1 :
58 subq t4, 1, t5 # e0 : build a mask of the bytes up to...
59 or t4, t5, t4 # e1 : ... and including the null
61 and t3, t4, t3 # e0 : mask out char matches after null
H A Dstrchr.S27 lda t4, -1 # .. e1 : build garbage mask
30 mskqh t4, a0, t4 # e0 :
33 cmpbge zero, t4, t4 # .. e1 : bits set iff byte is garbage
38 andnot t0, t4, t0 # e0 : clear garbage bits
58 and t0, 0xaa, t4 # e0 :
61 cmovne t4, 1, t4 # .. e1 :
63 addq v0, t4, v0 # .. e1 :
H A Dev67-strchr.S40 lda t4, -1 # E : build garbage mask
42 mskqh t4, a0, t4 # U : only want relevant part of first quad
50 cmpbge zero, t4, t4 # E : bits set iff byte is garbage
58 andnot t0, t4, t0 # E : clear garbage bits
/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dlowlevel_init.S102 li t4, ~0x0F
103 and t3, t3, t4
129 lw t4, 0x100(s2)
131 or t4, t4, t2
132 sw t4, 0x100(s2)
133 lw t4, 0x10c(s2)
138 and t4, t4, t2
139 sw t4, 0x10c(s2)
144 or t4, t4, t2
145 sw t4, 0x10c(s2)
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/openbmc/qemu/include/exec/
H A Dhelper-gen.h.inc51 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
55 dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \
60 dh_arg(t3, 3), dh_arg(t4, 4)); \
63 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
67 dh_arg_decl(t4, 4), dh_arg_decl(t5, 5)) \
72 dh_arg(t4, 4), dh_arg(t5, 5)); \
75 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \
79 dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6)) \
84 dh_arg(t4, 4), dh_arg(t5, 5), dh_arg(t6, 6)); \
87 #define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\
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H A Dhelper-proto.h.inc36 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
38 dh_ctype(t4)) DEF_HELPER_ATTR;
40 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
42 dh_ctype(t4), dh_ctype(t5)) DEF_HELPER_ATTR;
44 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \
46 dh_ctype(t4), dh_ctype(t5), \
49 #define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \
51 dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \
H A Dhelper-head.h.inc124 #define DEF_HELPER_4(name, ret, t1, t2, t3, t4) \
125 DEF_HELPER_FLAGS_4(name, 0, ret, t1, t2, t3, t4)
126 #define DEF_HELPER_5(name, ret, t1, t2, t3, t4, t5) \
127 DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
128 #define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
129 DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
130 #define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
131 DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
H A Dhelper-info.c.inc48 #define DEF_HELPER_FLAGS_4(NAME, FLAGS, RET, T1, T2, T3, T4) \
54 | dh_typemask(T4, 4) \
57 #define DEF_HELPER_FLAGS_5(NAME, FLAGS, RET, T1, T2, T3, T4, T5) \
63 | dh_typemask(T4, 4) | dh_typemask(T5, 5) \
66 #define DEF_HELPER_FLAGS_6(NAME, FLAGS, RET, T1, T2, T3, T4, T5, T6) \
72 | dh_typemask(T4, 4) | dh_typemask(T5, 5) \
76 #define DEF_HELPER_FLAGS_7(NAME, FLAGS, RET, T1, T2, T3, T4, T5, T6, T7) \
82 | dh_typemask(T4, 4) | dh_typemask(T5, 5) \
/openbmc/linux/arch/x86/crypto/
H A Daesni-intel_avx-x86_64.S571 .macro CALC_AAD_HASH GHASH_MUL AAD AADLEN T1 T2 T3 T4 T5 T6 T7 T8
587 \GHASH_MUL \T8, \T2, \T1, \T3, \T4, \T5, \T6
635 \GHASH_MUL \T7, \T2, \T1, \T3, \T4, \T5, \T6
863 .macro GHASH_MUL_AVX GH HK T1 T2 T3 T4 T5
884 vpslld $25, \GH, \T4 # packed right shifting shift << 25
887 vpxor \T4, \T2, \T2
898 vpsrld $7,\GH, \T4 # packed left shifting >> 7
900 vpxor \T4, \T2, \T2
909 .macro PRECOMPUTE_AVX HK T1 T2 T3 T4 T5 T6
918 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^2<<1 mod poly
[all …]
H A Dpoly1305-x86_64-cryptogams.pl419 my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) =
892 vpunpckhqdq $T1,$T0,$T4 # 4
896 vpsrlq \$40,$T4,$T4 # 4
904 vpor 32(%rcx),$T4,$T4 # padbit, yes, always
985 vpmuludq $T4,$D4,$D4 # d4 = h4*r0
988 vpmuludq 0x20(%rsp),$T4,$H0 # h4*s1
1011 vpmuludq $T4,$H4,$H0 # h4*s2
1022 vpmuludq $T4,$H3,$H0 # h4*s3
1034 vpmuludq $T4,$H4,$T4 # h4*s4
1037 vpaddq $T4,$D3,$D3 # d3 += h4*s4
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H A Dcamellia-aesni-avx2-asm_64.S62 #define roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ argument
67 vbroadcasti128 .Linv_shift_row(%rip), t4; \
75 vpshufb t4, x0, x0; \
76 vpshufb t4, x7, x7; \
77 vpshufb t4, x3, x3; \
78 vpshufb t4, x6, x6; \
79 vpshufb t4, x2, x2; \
80 vpshufb t4, x5, x5; \
81 vpshufb t4, x1, x1; \
82 vpshufb t4, x4, x4; \
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H A Dnh-avx2-x86_64.S31 #define T4 %ymm12 macro
49 vpshufd $0x10, T0, T4
57 vpmuludq T4, T0, T0
148 vinserti128 $0x1, T2_XMM, T0, T4 // T4 = (0A 1A 2A 3A)
153 vpaddq T5, T4, T4
155 vpaddq T4, T0, T0
H A Dcamellia-aesni-avx-asm_64.S50 #define roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ argument
55 vmovdqa .Linv_shift_row(%rip), t4; \
61 vpshufb t4, x0, x0; \
62 vpshufb t4, x7, x7; \
63 vpshufb t4, x1, x1; \
64 vpshufb t4, x4, x4; \
65 vpshufb t4, x2, x2; \
66 vpshufb t4, x5, x5; \
67 vpshufb t4, x3, x3; \
68 vpshufb t4, x6, x6; \
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/openbmc/linux/arch/arm64/crypto/
H A Dcrct10dif-ce-core.S84 t4 .req v18
136 ext t4.8b, ad.8b, ad.8b, #1 // A1
140 pmull t4.8h, t4.8b, fold_consts.8b // F = A1*B
150 tbl t4.16b, {ad.16b}, perm1.16b // A1
154 pmull2 t4.8h, t4.16b, fold_consts.16b // F = A1*B
162 0: eor t4.16b, t4.16b, t8.16b // L = E + F
166 uzp1 t8.2d, t4.2d, t5.2d
167 uzp2 t4.2d, t4.2d, t5.2d
171 // t4 = (L) (P0 + P1) << 8
173 eor t8.16b, t8.16b, t4.16b
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H A Dsm4-ce-gcm-core.S53 r4, r5, m4, m5, T4, T5, \ argument
57 ext T4.16b, m5.16b, m5.16b, #8; \
65 pmull T5.1q, m4.1d, T4.1d; \
69 pmull2 T4.1q, m4.2d, T4.2d; \
77 eor T4.16b, T4.16b, T5.16b; \
81 ext T5.16b, RZERO.16b, T4.16b, #8; \
85 ext T4.16b, T4.16b, RZERO.16b, #8; \
93 eor r5.16b, r5.16b, T4.16b; \
136 r4, r5, m4, m5, T4, T5) \ argument
142 ext T4.16b, m5.16b, m5.16b, #8; \
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/openbmc/linux/arch/ia64/lib/
H A Dmemcpy.S36 # define t4 r22 macro
190 sub t4=r0,dst // t4 = -dst
194 shl t4=t4,3 // t4 = 8*(dst & 7)
202 mov pr=t4,0x38 // (p5,p4,p3)=(dst & 7)
225 mov t4=ip
228 adds t4=.memcpy_loops-1b,t4
243 add t4=t0,t4
255 mov b6=t4
/openbmc/linux/tools/testing/selftests/bpf/prog_tests/
H A Dtracing_struct.c46 ASSERT_EQ(skel->bss->t4_a_a, 10, "t4:a.a"); in test_fentry()
47 ASSERT_EQ(skel->bss->t4_b, 1, "t4:b"); in test_fentry()
48 ASSERT_EQ(skel->bss->t4_c, 2, "t4:c"); in test_fentry()
49 ASSERT_EQ(skel->bss->t4_d, 3, "t4:d"); in test_fentry()
50 ASSERT_EQ(skel->bss->t4_e_a, 2, "t4:e.a"); in test_fentry()
51 ASSERT_EQ(skel->bss->t4_e_b, 3, "t4:e.b"); in test_fentry()
52 ASSERT_EQ(skel->bss->t4_ret, 21, "t4 ret"); in test_fentry()
/openbmc/u-boot/arch/riscv/cpu/
H A Dstart.S144 la t4, __dyn_sym_start
145 add t4, t4, t6
157 add s5, t4, t0
193 mv t4, t0 /* offset of board_init_r() */
194 add t4, t4, t6 /* real address of board_init_r() */
204 jr t4 /* jump to board_init_r() */
/openbmc/linux/arch/arm/crypto/
H A Dsha256-armv4.pl51 $inp="r1"; $t4="r1";
78 str $inp,[sp,#17*4] @ make room for $t4
95 str $inp,[sp,#17*4] @ make room for $t4
127 ldr $t4,[sp,#`($i+15)%16`*4] @ from future BODY_16_xx
144 @ ldr $t4,[sp,#`($i+14)%16`*4]
147 mov $t2,$t4,ror#$sigma1[0]
149 eor $t2,$t2,$t4,ror#$sigma1[1]
152 eor $t2,$t2,$t4,lsr#$sigma1[2] @ sigma1(X[i+14])
153 ldr $t4,[sp,#`($i+9)%16`*4]
159 add $t1,$t1,$t4 @ X[i]
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H A Daes-cipher-core.S42 .macro __hround, out0, out1, in0, in1, in2, in3, t3, t4, enc, sz, op, oldcpsr
65 __select \t4, \in0, 3
68 __select \t4, \in2, 3
72 __load \t4, \t4, 3, \sz, \op
87 eor \out1, \out1, \t4, ror #8
/openbmc/linux/arch/mips/lib/
H A Dcsum_partial.S33 #define t4 $12 macro
182 CSUM_BIGCHUNK1(src, 0x00, sum, t0, t1, t3, t4)
193 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
194 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
195 CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4)
196 CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4)
208 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
209 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
217 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
476 LOAD(t4, UNIT(4)(src))
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/openbmc/linux/drivers/net/ethernet/chelsio/
H A DKconfig70 tristate "Chelsio Communications T4/T5/T6 Ethernet support"
77 This driver supports Chelsio T4, T5 & T6 based gigabit, 10Gb Ethernet
93 bool "Data Center Bridging (DCB) Support for Chelsio T4/T5/T6 cards"
115 tristate "Chelsio Communications T4/T5/T6 Virtual Function Ethernet support"
118 This driver supports Chelsio T4, T5 & T6 based gigabit, 10Gb Ethernet
/openbmc/qemu/target/mips/tcg/
H A Dmxu_translate.c1364 TCGv t0, t1, t2, t3, t4, t5, t6, t7; in gen_mxu_q8mul_mac() local
1371 t4 = tcg_temp_new(); in gen_mxu_q8mul_mac()
1399 tcg_gen_extract_tl(t4, t7, 0, 8); in gen_mxu_q8mul_mac()
1404 tcg_gen_mul_tl(t0, t0, t4); in gen_mxu_q8mul_mac()
1410 gen_load_mxu_gpr(t4, XRd); in gen_mxu_q8mul_mac()
1412 tcg_gen_extract_tl(t6, t4, 0, 16); in gen_mxu_q8mul_mac()
1413 tcg_gen_extract_tl(t7, t4, 16, 16); in gen_mxu_q8mul_mac()
1446 TCGv t0, t1, t2, t3, t4, t5, t6, t7; in gen_mxu_q8madl() local
1453 t4 = tcg_temp_new(); in gen_mxu_q8madl()
1472 tcg_gen_extract_tl(t4, t7, 0, 8); in gen_mxu_q8madl()
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