Lines Matching full:t4
50 #define roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ argument
55 vmovdqa .Linv_shift_row(%rip), t4; \
61 vpshufb t4, x0, x0; \
62 vpshufb t4, x7, x7; \
63 vpshufb t4, x1, x1; \
64 vpshufb t4, x4, x4; \
65 vpshufb t4, x2, x2; \
66 vpshufb t4, x5, x5; \
67 vpshufb t4, x3, x3; \
68 vpshufb t4, x6, x6; \
81 vpxor t4, t4, t4; \
88 vaesenclast t4, x0, x0; \
89 vaesenclast t4, x7, x7; \
90 vaesenclast t4, x1, x1; \
91 vaesenclast t4, x4, x4; \
92 vaesenclast t4, x2, x2; \
93 vaesenclast t4, x5, x5; \
94 vaesenclast t4, x3, x3; \
95 vaesenclast t4, x6, x6; \
106 vmovdqa .Lpost_tf_lo_s2(%rip), t4; \
115 filter_8bit(x1, t4, t5, t7, t2); \
116 filter_8bit(x4, t4, t5, t7, t2); \
122 vpsrldq $4, t0, t4; \
127 vpshufb t6, t4, t4; \
183 vpxor t4, x3, x3; \