Searched full:oscilator (Results 1 – 18 of 18) sorted by relevance
9 /* Internal period for PCA9665 oscilator */
63 #define RTC_CTL_BIT_EN_OSC (1<<7) /* Bit 7 - Enable Oscilator */
58 * Oscilator in da850_pll_init()
110 * Select the Clock Mode as Onchip Oscilator or External Clock on in dm365_pll2_init()
37 u32 mor; /* 0x20 Main Oscilator Register */
234 // The master path selects are sourced from the oscilator reference in collectTodFaultData()
42 /* Si544 Internal oscilator runs at 55.05 MHz */
139 /* chip has built-in oscilator */
27 * oscilator. This is necessary if the PLL is being reconfigured to45 * This function switches the CPU core clock from 24MHz XTAL oscilator
125 /* select PCI clock until we have setup oscilator... */ in DAC1064_setmclk()632 /* and we are waiting for PLL with oscilator disabled... Is it right? */ in MGAG100_progPixClock()
151 /* The oscilator should run at should be 90-100MHz, and in wm8955_pll_factors()
1732 /* Unlock forced oscilator control to switch it on/off */ in wm8904_set_fll()
1012 /* use 1MHz or 10MHz oscilator */ in pcl818_attach()
860 * Pin 79 is connected to the oscilator circuit so we in initW6692()
1815 //Reg1Fh[7] = 0(default): 25MHz Mode, XI, XO(pin 9, 8) is 25MHz(crystal/oscilator). in phy_micrel0()1816 //Reg1Fh[7] = 1 : 50MHz Mode, XI(pin 9) is 50MHz(oscilator). in phy_micrel0()
2563 /* Bridge delay, uses oscilator clock */ in CDRXD()
6034 /* Bridge delay, uses oscilator clock */ in init_drxk()
2414 /* Bridge delay, uses oscilator clock */ in init_hi()