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/openbmc/linux/arch/ia64/kernel/
H A Dtime.c55 .name = "itc",
185 printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n", in timer_interrupt()
253 printk("Jitter checking for ITC timers disabled\n"); in nojitter_setup()
268 * frequency and then a PAL call to determine the frequency ratio between the ITC in ia64_init_itm()
303 printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, " in ia64_init_itm()
304 "ITC freq=%lu.%03luMHz", smp_processor_id(), in ia64_init_itm()
327 * The ITC synchronization is usually successful to within a few in ia64_init_itm()
328 * ITC ticks but this is not a sure thing. If you need to improve in ia64_init_itm()
331 * even going backward) if the ITC offsets between the individual CPUs in ia64_init_itm()
339 * ITC is drifty and we have not synchronized the ITCs in smpboot.c. in ia64_init_itm()
[all …]
H A Dsmpboot.c14 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
93 * ITC synchronization related stuff:
209 * Return the number of cycles by which our itc differs from the itc on the master
210 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
243 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
246 * step). The basic idea is for the slave to ask the master what itc value it has and to
247 * read its own itc before and after the master responds. Each iteration gives us three
261 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
267 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
270 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
[all …]
H A Dsys_ia64.c180 * 'ar.itc' counter which gets incremented at a constant in ia64_clock_getres()
185 * based on ITC frequency and not HZ frequency for supported in ia64_clock_getres()
H A Dirq_lsapic.c7 * (LSAPIC), such as the ITC and IPI interrupts.
H A Dpalinfo.c653 struct pal_freq_ratio proc, itc, bus; in frequency_info() local
661 if (ia64_pal_freq_ratios(&proc, &bus, &itc) != 0) return 0; in frequency_info()
666 "ITC/Clock ratio : %d/%d\n", in frequency_info()
667 proc.num, proc.den, bus.num, bus.den, itc.num, itc.den); in frequency_info()
H A Dminstate.h9 /* read ar.itc in advance, and use it before leaving bank 0 */
11 (pUStk) mov.m r20=ar.itc;
H A Divt.S207 * Tell the assemblers dependency-violation checker that the above "itc" instructions
214 * between reading the pagetable and the "itc". If so, flush the entry we
276 * Tell the assemblers dependency-violation checker that the above "itc" instructions
320 * Tell the assemblers dependency-violation checker that the above "itc" instructions
563 * Tell the assemblers dependency-violation checker that the above "itc" instructions
629 * Tell the assemblers dependency-violation checker that the above "itc" instructions
683 * Tell the assemblers dependency-violation checker that the above "itc" instructions
823 // mov.m r30=ar.itc is called in advance, and r13 is current
925 * - r30: ar.itc for accounting (don't touch)
1057 // mov.m r20=ar.itc is called in advance, and r13 is current
/openbmc/linux/arch/ia64/include/asm/native/
H A Dinst.h39 (pred) mov reg = ar.itc
63 (pred) itc.i reg
66 (pred) itc.d reg
69 (pred_i) itc.i reg; \
70 (pred_d) itc.d reg
/openbmc/linux/arch/mips/kernel/
H A Dmips-mt.c192 * Configure ITC mapping. This code is very in mips_mt_set_cpuoptions()
194 * a special mode bit ("ITC") in the ErrCtl in mips_mt_set_cpuoptions()
195 * register to enable access to ITC control in mips_mt_set_cpuoptions()
212 /* Set for 128 byte pitch of ITC cells */ in mips_mt_set_cpuoptions()
219 /* Now set base address, and turn ITC on with 0x1 bit */ in mips_mt_set_cpuoptions()
226 printk("Mapped %ld ITC cells starting at 0x%08x\n", in mips_mt_set_cpuoptions()
/openbmc/qemu/include/hw/misc/
H A Dmips_itu.h63 /* ITC Storage */
67 /* ITC Configuration Tags */
75 /* Get ITC Configuration Tag memory region. */
/openbmc/qemu/hw/misc/
H A Dmips_itu.c191 /* ITC Bypass View */
212 /* ITC Control View */
235 /* ITC Empty/Full View */
316 /* ITC P/V View */
415 "itc_storage_read: Bad ITC View %d\n", (int)view); in itc_storage_read()
467 "itc_storage_write: Bad ITC View %d\n", (int)view); in itc_storage_write()
498 "mips-itc-storage", ITC_STORAGE_ADDRSPACE_SZ); in mips_itu_init()
502 "mips-itc-tag", ITC_TAG_ADDRSPACE_SZ); in mips_itu_init()
/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dsharedbuffer.sh78 local itc=$1; shift
84 | jq -e ".[][][\"itc\"][\"$itc\"][\"max\"]")
/openbmc/linux/drivers/watchdog/
H A Dmixcomwd.c6 * Author: Gergely Madarasz <gorgo@itc.hu>
8 * Copyright (c) 1999 ITConsult-Pro Co. <info@itc.hu>
310 MODULE_AUTHOR("Gergely Madarasz <gorgo@itc.hu>");
/openbmc/qemu/include/hw/net/
H A Dftgmac100.h50 uint32_t itc; member
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dci-hdrc-usb2.yaml107 itc-setting:
110 aligned with ITC bits at register USBCMD.
429 itc-setting = <0x4>; /* 4 micro-frames */
/openbmc/linux/drivers/gpu/drm/amd/display/include/
H A Dset_mode_types.h74 uint8_t ITC:1; member
/openbmc/u-boot/drivers/net/
H A Dftmac110.h21 uint32_t itc; /* 0x28: Interrupt Timer Control Register */ member
80 * ITC control bits
H A Dftmac100.h23 unsigned int itc; /* 0x28 */ member
/openbmc/linux/drivers/misc/
H A Dpch_phub.c47 /* CM-iTC */
727 /* quirk for CM-iTC board */ in pch_phub_probe()
729 if (board_name && strstr(board_name, "CM-iTC")) in pch_phub_probe()
/openbmc/linux/drivers/gpu/drm/display/
H A Ddrm_hdmi_helper.c195 frame->itc = conn_state->content_type != DRM_MODE_CONTENT_TYPE_NO_DATA; in drm_hdmi_avi_infoframe_content_type()
/openbmc/linux/drivers/media/i2c/
H A Dadv7511-v4l2.c396 u8 itc, cn; in adv7511_s_ctrl() local
399 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC; in adv7511_s_ctrl()
400 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS; in adv7511_s_ctrl()
401 adv7511_wr_and_or(sd, 0x57, 0x7f, itc << 7); in adv7511_s_ctrl()
1278 u8 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC; in adv7511_set_fmt() local
1279 u8 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS; in adv7511_set_fmt()
1393 adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2) | (itc << 7)); in adv7511_set_fmt()
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-dv.rst120 - No IT Content information is available and the ITC bit in the AVI
/openbmc/linux/Documentation/admin-guide/media/
H A Dbttv.rst1392 - ITC PCITV (Card Ver 1.0) "Teppro TV1/TVFM1 Card"
1393 - ITC PCITV (Card Ver 2.0)
1394 - ITC PCITV (Card Ver 3.0) = "PV-BT878P+ (REV.9D)"
1395 - ITC PCITV (Card Ver 4.0)
1397 - ITC DSTTV (bt878, satellite)
1398 - ITC VideoMaker (saa7146, StreamMachine sm2110, tvtuner) "PV-SM2210P+ (REV:1C)"
/openbmc/qemu/target/mips/tcg/sysemu/
H A Dcp0_helper.c1397 int32_t itc = env->itc_tag ? (arg1 & (1 << CP0EC_ITC)) : 0; in helper_mtc0_errctl() local
1399 env->CP0_ErrCtl = wst | spr | itc; in helper_mtc0_errctl()
1401 if (itc && !wst && !spr) { in helper_mtc0_errctl()
1412 * If CACHE instruction is configured for ITC tags then make all in helper_mtc0_taglo()
1413 * CP0.TagLo bits writable. The actual write to ITC Configuration in helper_mtc0_taglo()
/openbmc/qemu/hw/net/
H A Dftgmac100.c702 s->itc = 0; in ftgmac100_do_reset()
752 return s->itc; in ftgmac100_read()
813 s->itc = value; in ftgmac100_write()
1232 VMSTATE_UINT32(itc, FTGMAC100State),

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