Lines Matching full:itc

14  * 01/04/27 David Mosberger <davidm@hpl.hp.com>	Added ITC synching code.
93  * ITC synchronization related stuff:
209  * Return the number of cycles by which our itc differs from the itc on the master
210  * (time-keeper) CPU.  A positive number indicates our itc is ahead of the master,
243  * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
246  * step).  The basic idea is for the slave to ask the master what itc value it has and to
247  * read its own itc before and after the master responds.  Each iteration gives us three
261  * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
267  * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
270  * hundred cycles (e.g., ~500 cycles).  In practice, this means that the itc's are usually
284 		long lat;	/* estimate of itc adjustment latency */  in ia64_sync_itc()
291 	 * like setting the ITC ahead of (or a long time before) the  in ia64_sync_itc()
340 	printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "  in ia64_sync_itc()
393 		 * Synchronize the ITC with the BP.  Need to do this after irqs are  in smp_callin()
398 		Dprintk("Going to syncup ITC with ITC Master.\n");  in smp_callin()