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Searched full:gcc_ufs_phy_bcr (Results 1 – 25 of 45) sorted by relevance

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/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sc7180.h146 #define GCC_UFS_PHY_BCR 2 macro
H A Dqcom,gcc-sm6350.h163 #define GCC_UFS_PHY_BCR 4 macro
H A Dqcom,sm7150-gcc.h165 #define GCC_UFS_PHY_BCR 3 macro
H A Dqcom,gcc-sm6115.h180 #define GCC_UFS_PHY_BCR 3 macro
H A Dqcom,gcc-sc7280.h218 #define GCC_UFS_PHY_BCR 9 macro
H A Dqcom,sm6375-gcc.h214 #define GCC_UFS_PHY_BCR 13 macro
H A Dqcom,gcc-sm6125.h233 #define GCC_UFS_PHY_BCR 2 macro
H A Dqcom,sm8550-gcc.h208 #define GCC_UFS_PHY_BCR 24 macro
H A Dqcom,gcc-sm8450.h224 #define GCC_UFS_PHY_BCR 25 macro
H A Dqcom,gcc-sm8150.h238 #define GCC_UFS_PHY_BCR 25 macro
H A Dqcom,gcc-sdm845.h219 #define GCC_UFS_PHY_BCR 14 macro
H A Dqcom,gcc-sm8350.h239 #define GCC_UFS_PHY_BCR 25 macro
H A Dqcom,gcc-sm8250.h245 #define GCC_UFS_PHY_BCR 33 macro
H A Dqcom,gcc-sc8180x.h289 #define GCC_UFS_PHY_BCR 36 macro
H A Dqcom,sa8775p-gcc.h287 #define GCC_UFS_PHY_BCR 25 macro
H A Dqcom,gcc-sc8280xp.h451 #define GCC_UFS_PHY_BCR 49 macro
/openbmc/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,ufs.yaml281 resets = <&gcc GCC_UFS_PHY_BCR>;
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125.dtsi777 resets = <&gcc GCC_UFS_PHY_BCR>;
H A Dsa8775p.dtsi1498 resets = <&gcc GCC_UFS_PHY_BCR>;
H A Dsm6115.dtsi1001 resets = <&gcc GCC_UFS_PHY_BCR>;
H A Dsm6350.dtsi1149 resets = <&gcc GCC_UFS_PHY_BCR>;
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-sc7180.c2377 [GCC_UFS_PHY_BCR] = { 0x77000 },
H A Dgcc-sm6350.c2505 [GCC_UFS_PHY_BCR] = { 0x3a000 },
H A Dgcc-sm7150.c2914 [GCC_UFS_PHY_BCR] = { 0x77000 },
H A Dgcc-sm8450.c3196 [GCC_UFS_PHY_BCR] = { 0x87000 },

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