| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gf100.c | 279 u32 clk0, clk1 = 0; in calc_clk() local
286 clk0 = calc_src(clk, idx, freq, &src0, &div0); in calc_clk()
287 clk0 = calc_div(clk, idx, clk0, freq, &div1D); in calc_clk()
290 if (clk0 != freq && (0x00004387 & (1 << idx))) { in calc_clk()
299 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
311 info->freq = clk0; in calc_clk()
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| H A D | gk104.c | 293 u32 clk0, clk1 = 0; in calc_clk() local
300 clk0 = calc_src(clk, idx, freq, &src0, &div0); in calc_clk()
301 clk0 = calc_div(clk, idx, clk0, freq, &div1D); in calc_clk()
304 if (clk0 != freq && (0x0000ff87 & (1 << idx))) { in calc_clk()
313 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
324 info->freq = clk0; in calc_clk()
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| H A D | mcp77.c | 184 u32 clk0 = src, clk1 = src; in calc_P() local
186 if (clk0 <= target) { in calc_P()
187 clk1 = clk0 << (*div ? 1 : 0); in calc_P()
190 clk0 >>= 1; in calc_P()
193 if (target - clk0 <= clk1 - target) in calc_P()
194 return clk0; in calc_P()
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| H A D | nv50.c | 347 u32 clk0 = src, clk1 = src; in calc_div() local
349 if (clk0 <= target) { in calc_div()
350 clk1 = clk0 << (*div ? 1 : 0); in calc_div()
353 clk0 >>= 1; in calc_div()
356 if (target - clk0 <= clk1 - target) in calc_div()
357 return clk0; in calc_div()
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | qcom,lpass-cpu.yaml | 149 - const: mi2s-bit-clk0
173 - const: mi2s-bit-clk0
271 "mi2s-bit-clk0", "mi2s-bit-clk1";
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| /openbmc/qemu/hw/arm/ |
| H A D | cubieboard.c | 64 if (!object_property_set_int(OBJECT(&a10->timer), "clk0-freq", 32768, in cubieboard_init()
66 error_reportf_err(err, "Couldn't set clk0 frequency: "); in cubieboard_init()
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| H A D | orangepi.c | 57 object_property_set_int(OBJECT(h3), "clk0-freq", 32768, &error_abort); in orangepi_init()
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| H A D | bananapi_m2u.c | 79 object_property_set_int(OBJECT(r40), "clk0-freq", 32768, &error_abort); in bpim2u_init()
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| H A D | allwinner-h3.c | 208 object_property_add_alias(obj, "clk0-freq", OBJECT(&s->timer), in allwinner_h3_init()
209 "clk0-freq"); in allwinner_h3_init()
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| H A D | allwinner-r40.c | 279 object_property_add_alias(obj, "clk0-freq", OBJECT(&s->timer), in allwinner_r40_init()
280 "clk0-freq"); in allwinner_r40_init()
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| /openbmc/linux/sound/soc/qcom/ |
| H A D | lpass-apq8016.c | 273 "mi2s-osr-clk0",
279 "mi2s-bit-clk0",
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| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | st-pincfg.h | 68 * CLK0, CLK1 modes with non-inverted clock
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | st-pincfg.h | 67 * CLK0, CLK1 modes with non-inverted clock
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| /openbmc/linux/drivers/clk/ti/ |
| H A D | adpll.c | 264 char *name, struct clk *clk0, in ti_adpll_init_mux() argument
276 parents[0] = __clk_get_name(clk0); in ti_adpll_init_mux()
573 char *name, struct clk *clk0, in ti_adpll_init_clkout() argument
604 parent_names[0] = __clk_get_name(clk0); in ti_adpll_init_clkout()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr_clk.c | 48 CLK_REG(reg_name, CLK0, 0)
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | intel,lgm-clk.h | 95 /* Gate CLK0 */
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| /openbmc/linux/drivers/comedi/drivers/ |
| H A D | dmm32at.c | 51 #define DMM32AT_AUX_DI0 BIT(0) /* J3.48 - CLK0 (SRC0) */
89 #define DMM32AT_CTRDIO_CFG_FREQ0 BIT(6) /* CLK0 1=10KHz 0=10MHz */
93 #define DMM32AT_CTRDIO_CFG_SRC0 BIT(1) /* CLK0 is 0=FREQ0 1=J3.48 */
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| /openbmc/linux/drivers/clk/zynq/ |
| H A D | clkc.c | 174 static void __init zynq_clk_register_periph_clk(enum zynq_clk clk0, in zynq_clk_register_periph_clk() argument
197 clks[clk0] = clk_register_gate(NULL, clk_name0, div_name, in zynq_clk_register_periph_clk()
209 clks[clk0] = ERR_PTR(-ENOMEM); in zynq_clk_register_periph_clk()
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| /openbmc/linux/Documentation/devicetree/bindings/arm/ |
| H A D | vexpress-config.yaml | 275 clk0 {
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| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | gpio-latch.yaml | 16 CLK0 ----------------------. ,--------.
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| /openbmc/u-boot/board/armadeus/apf27/ |
| H A D | apf27.h | 54 #define CONFIG_CLK0_DIV 3 /* Divide CLK0 by 4 */
55 #define CONFIG_CLK0_EN 1 /* CLK0 enabled */
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| /openbmc/u-boot/arch/x86/cpu/quark/ |
| H A D | mrc_util.c | 709 * CCPTRREG[11:08] -> CLK0 (0x0-0xF) in set_wclk()
721 * ECCB1DLLPICODER0[13:08] -> CLK0 (0x00-0x3F) in set_wclk()
785 * CCPTRREG[11:08] -> CLK0 (0x0-0xF) in get_wclk()
797 * ECCB1DLLPICODER0[13:08] -> CLK0 (0x00-0x3F) in get_wclk()
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| /openbmc/linux/drivers/pinctrl/mvebu/ |
| H A D | pinctrl-ac5.c | 205 MPP_FUNCTION(1, "ptp", "clk0"),
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| /openbmc/qemu/hw/timer/ |
| H A D | allwinner-a10-pit.c | 192 DEFINE_PROP_UINT32("clk0-freq", AwA10PITState, clk_freq[0], 0),
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| /openbmc/linux/drivers/gpio/ |
| H A D | gpio-latch.c | 10 * CLK0 ----------------------. ,--------.
|