1b0c96666SNiek Linnenbank /*
2b0c96666SNiek Linnenbank * Orange Pi emulation
3b0c96666SNiek Linnenbank *
4b0c96666SNiek Linnenbank * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
5b0c96666SNiek Linnenbank *
6b0c96666SNiek Linnenbank * This program is free software: you can redistribute it and/or modify
7b0c96666SNiek Linnenbank * it under the terms of the GNU General Public License as published by
8b0c96666SNiek Linnenbank * the Free Software Foundation, either version 2 of the License, or
9b0c96666SNiek Linnenbank * (at your option) any later version.
10b0c96666SNiek Linnenbank *
11b0c96666SNiek Linnenbank * This program is distributed in the hope that it will be useful,
12b0c96666SNiek Linnenbank * but WITHOUT ANY WARRANTY; without even the implied warranty of
13b0c96666SNiek Linnenbank * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14b0c96666SNiek Linnenbank * GNU General Public License for more details.
15b0c96666SNiek Linnenbank *
16b0c96666SNiek Linnenbank * You should have received a copy of the GNU General Public License
17b0c96666SNiek Linnenbank * along with this program. If not, see <http://www.gnu.org/licenses/>.
18b0c96666SNiek Linnenbank */
19b0c96666SNiek Linnenbank
20b0c96666SNiek Linnenbank #include "qemu/osdep.h"
21b0c96666SNiek Linnenbank #include "qemu/units.h"
22b0c96666SNiek Linnenbank #include "exec/address-spaces.h"
23b0c96666SNiek Linnenbank #include "qapi/error.h"
24cc37d98bSRichard Henderson #include "qemu/error-report.h"
25b0c96666SNiek Linnenbank #include "hw/boards.h"
26b0c96666SNiek Linnenbank #include "hw/qdev-properties.h"
27b0c96666SNiek Linnenbank #include "hw/arm/allwinner-h3.h"
280e246c62SPhilippe Mathieu-Daudé #include "hw/arm/boot.h"
29b0c96666SNiek Linnenbank
30d6dc926eSPeter Maydell static struct arm_boot_info orangepi_binfo;
31b0c96666SNiek Linnenbank
orangepi_init(MachineState * machine)32b0c96666SNiek Linnenbank static void orangepi_init(MachineState *machine)
33b0c96666SNiek Linnenbank {
34b0c96666SNiek Linnenbank AwH3State *h3;
3582e48382SNiek Linnenbank DriveInfo *di;
3682e48382SNiek Linnenbank BlockBackend *blk;
3782e48382SNiek Linnenbank BusState *bus;
3882e48382SNiek Linnenbank DeviceState *carddev;
39b0c96666SNiek Linnenbank
40b0c96666SNiek Linnenbank /* BIOS is not supported by this board */
410ad3b5d3SPaolo Bonzini if (machine->firmware) {
42b0c96666SNiek Linnenbank error_report("BIOS not supported for this machine");
43b0c96666SNiek Linnenbank exit(1);
44b0c96666SNiek Linnenbank }
45b0c96666SNiek Linnenbank
46b0c96666SNiek Linnenbank /* This board has fixed size RAM */
47b0c96666SNiek Linnenbank if (machine->ram_size != 1 * GiB) {
48b0c96666SNiek Linnenbank error_report("This machine can only be used with 1GiB of RAM");
49b0c96666SNiek Linnenbank exit(1);
50b0c96666SNiek Linnenbank }
51b0c96666SNiek Linnenbank
52b0c96666SNiek Linnenbank h3 = AW_H3(object_new(TYPE_AW_H3));
53d2623129SMarkus Armbruster object_property_add_child(OBJECT(machine), "soc", OBJECT(h3));
54b0c96666SNiek Linnenbank object_unref(OBJECT(h3));
55b0c96666SNiek Linnenbank
56b0c96666SNiek Linnenbank /* Setup timer properties */
575325cc34SMarkus Armbruster object_property_set_int(OBJECT(h3), "clk0-freq", 32768, &error_abort);
585325cc34SMarkus Armbruster object_property_set_int(OBJECT(h3), "clk1-freq", 24 * 1000 * 1000,
59b0c96666SNiek Linnenbank &error_abort);
60b0c96666SNiek Linnenbank
616556617cSNiek Linnenbank /* Setup SID properties. Currently using a default fixed SID identifier. */
626556617cSNiek Linnenbank if (qemu_uuid_is_null(&h3->sid.identifier)) {
636556617cSNiek Linnenbank qdev_prop_set_string(DEVICE(h3), "identifier",
646556617cSNiek Linnenbank "02c00081-1111-2222-3333-000044556677");
656556617cSNiek Linnenbank } else if (ldl_be_p(&h3->sid.identifier.data[0]) != 0x02c00081) {
666556617cSNiek Linnenbank warn_report("Security Identifier value does not include H3 prefix");
676556617cSNiek Linnenbank }
686556617cSNiek Linnenbank
6929d08975SNiek Linnenbank /* Setup EMAC properties */
705325cc34SMarkus Armbruster object_property_set_int(OBJECT(&h3->emac), "phy-addr", 1, &error_abort);
7129d08975SNiek Linnenbank
72b71d0385SNiek Linnenbank /* DRAMC */
734af44e1eSEduardo Habkost object_property_set_uint(OBJECT(h3), "ram-addr", h3->memmap[AW_H3_DEV_SDRAM],
745325cc34SMarkus Armbruster &error_abort);
755325cc34SMarkus Armbruster object_property_set_int(OBJECT(h3), "ram-size", machine->ram_size / MiB,
76b71d0385SNiek Linnenbank &error_abort);
77b71d0385SNiek Linnenbank
78b0c96666SNiek Linnenbank /* Mark H3 object realized */
79ce189ab2SMarkus Armbruster qdev_realize(DEVICE(h3), NULL, &error_abort);
80b0c96666SNiek Linnenbank
8182e48382SNiek Linnenbank /* Retrieve SD bus */
8264eaa820SMarkus Armbruster di = drive_get(IF_SD, 0, 0);
8382e48382SNiek Linnenbank blk = di ? blk_by_legacy_dinfo(di) : NULL;
84*cc17f3b2SCédric Le Goater bus = BUS(&h3->mmc0.sdbus);
8582e48382SNiek Linnenbank
8682e48382SNiek Linnenbank /* Plug in SD card */
873e80f690SMarkus Armbruster carddev = qdev_new(TYPE_SD_CARD);
88934df912SMarkus Armbruster qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
893e80f690SMarkus Armbruster qdev_realize_and_unref(carddev, bus, &error_fatal);
9082e48382SNiek Linnenbank
91b0c96666SNiek Linnenbank /* SDRAM */
924af44e1eSEduardo Habkost memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_DEV_SDRAM],
93b0c96666SNiek Linnenbank machine->ram);
94b0c96666SNiek Linnenbank
95a80beb16SNiek Linnenbank /* Load target kernel or start using BootROM */
96c251191eSNiek Linnenbank if (!machine->kernel_filename && blk && blk_is_available(blk)) {
97a80beb16SNiek Linnenbank /* Use Boot ROM to copy data from SD card to SRAM */
98a80beb16SNiek Linnenbank allwinner_h3_bootrom_setup(h3, blk);
99a80beb16SNiek Linnenbank }
1004af44e1eSEduardo Habkost orangepi_binfo.loader_start = h3->memmap[AW_H3_DEV_SDRAM];
101b0c96666SNiek Linnenbank orangepi_binfo.ram_size = machine->ram_size;
10249865b90SPeter Maydell orangepi_binfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC;
103f0109f72SPhilippe Mathieu-Daudé arm_load_kernel(&h3->cpus[0], machine, &orangepi_binfo);
104b0c96666SNiek Linnenbank }
105b0c96666SNiek Linnenbank
orangepi_machine_init(MachineClass * mc)106b0c96666SNiek Linnenbank static void orangepi_machine_init(MachineClass *mc)
107b0c96666SNiek Linnenbank {
1083e71f4a7SGavin Shan static const char * const valid_cpu_types[] = {
1093e71f4a7SGavin Shan ARM_CPU_TYPE_NAME("cortex-a7"),
1103e71f4a7SGavin Shan NULL
1113e71f4a7SGavin Shan };
1123e71f4a7SGavin Shan
113fd8f71b9SPhilippe Mathieu-Daudé mc->desc = "Orange Pi PC (Cortex-A7)";
114b0c96666SNiek Linnenbank mc->init = orangepi_init;
11582e48382SNiek Linnenbank mc->block_default_type = IF_SD;
11682e48382SNiek Linnenbank mc->units_per_default_bus = 1;
117b0c96666SNiek Linnenbank mc->min_cpus = AW_H3_NUM_CPUS;
118b0c96666SNiek Linnenbank mc->max_cpus = AW_H3_NUM_CPUS;
119b0c96666SNiek Linnenbank mc->default_cpus = AW_H3_NUM_CPUS;
120b0c96666SNiek Linnenbank mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
1213e71f4a7SGavin Shan mc->valid_cpu_types = valid_cpu_types;
122b0c96666SNiek Linnenbank mc->default_ram_size = 1 * GiB;
123b0c96666SNiek Linnenbank mc->default_ram_id = "orangepi.ram";
124b0c96666SNiek Linnenbank }
125b0c96666SNiek Linnenbank
126b0c96666SNiek Linnenbank DEFINE_MACHINE("orangepi-pc", orangepi_machine_init)
127