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/openbmc/u-boot/arch/arm/mach-uniphier/boot-device/
H A Dboot-device-pxs2.c15 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
24 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
[all …]
H A Dboot-device-ld11.c15 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
24 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"},
[all …]
H A Dboot-device-pro5.c15 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
16 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128MB, Addr 4)"},
28 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
29 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
[all …]
H A Dboot-device-ld4.c16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
25 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
26 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"},
27 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
[all …]
H A Dboot-device-pxs3.c16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
/openbmc/u-boot/board/freescale/t104xrdb/
H A DREADME45 - Four e5500 cores, each with a private 256 KB L2 cache
46 - 256 KB shared L3 CoreNet platform cache (CPC)
110 - NOR: 128MB 16-bit NOR Flash
142 - NOR: 128MB 16-bit NOR Flash
168 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
169 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
171 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
172 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
173 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
174 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
[all …]
/openbmc/u-boot/board/freescale/t102xrdb/
H A DREADME14 - two e5500 cores, each with a private 256 KB L2 cache
19 - 256 KB shared L3 CoreNet platform cache (CPC)
87 - NOR: 128MB 16-bit NOR Flash
115 - NOR: 128MB S29GL01GS110TFIV10 Spansion NOR Flash
129 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
130 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
132 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
133 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
134 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
137 0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB
[all …]
/openbmc/linux/tools/testing/selftests/bpf/prog_tests/
H A Dxdp_adjust_tail.c11 char buf[128]; in test_xdp_adjust_tail_shrink()
104 tattr.data_size_out = 128; /* Limit copy_size */ in test_xdp_adjust_tail_grow2()
117 ASSERT_EQ(buf[128], 1, "case-64-data buf[128]"); /* 128-191 memset to 1 */ in test_xdp_adjust_tail_grow2()
120 /* Test case-128 */ in test_xdp_adjust_tail_grow2()
122 tattr.data_size_in = 128; /* Determine test case via pkt size */ in test_xdp_adjust_tail_grow2()
127 ASSERT_OK(err, "case-128"); in test_xdp_adjust_tail_grow2()
128 ASSERT_EQ(tattr.retval, XDP_TX, "case-128 retval"); in test_xdp_adjust_tail_grow2()
129 ASSERT_EQ(tattr.data_size_out, max_grow, "case-128 data_size_out"); /* Expect max grow */ in test_xdp_adjust_tail_grow2()
136 ASSERT_EQ(cnt, max_grow - tattr.data_size_in, "case-128-data cnt"); /* Grow increase */ in test_xdp_adjust_tail_grow2()
137 ASSERT_EQ(tattr.data_size_out, max_grow, "case-128-data data_size_out"); /* Total grow */ in test_xdp_adjust_tail_grow2()
[all …]
/openbmc/u-boot/board/freescale/t1040qds/
H A DREADME14 - Four e5500 cores, each with a private 256 KB L2 cache
15 - 256 KB shared L3 CoreNet platform cache (CPC)
99 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
100 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
102 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
103 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
104 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
105 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
108 0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB
109 0xF_E000_0000 0xF_E7FF_FFFF Promjet 128MB
[all …]
/openbmc/linux/fs/btrfs/tests/
H A Dfree-space-tests.c430 * Extent entry covering free space range [128Mb - 256Kb, 128Mb - 128Kb[ in test_steal_space_from_bitmap_to_extent()
438 /* Bitmap entry covering free space range [128Mb + 512Kb, 256Mb[ */ in test_steal_space_from_bitmap_to_extent()
451 * Now make only the first 256Kb of the bitmap marked as free, so that in test_steal_space_from_bitmap_to_extent()
454 * [128Mb - 256Kb, 128Mb - 128Kb[ in test_steal_space_from_bitmap_to_extent()
455 * [128Mb + 512Kb, 128Mb + 768Kb[ in test_steal_space_from_bitmap_to_extent()
476 * Confirm that the bitmap range [128Mb + 768Kb, 256Mb[ isn't marked in test_steal_space_from_bitmap_to_extent()
486 * Confirm that the region [128Mb + 256Kb, 128Mb + 512Kb[, which is in test_steal_space_from_bitmap_to_extent()
495 * Confirm that the region [128Mb, 128Mb + 256Kb[, which is covered in test_steal_space_from_bitmap_to_extent()
504 * Now lets mark the region [128Mb, 128Mb + 512Kb[ as free too. But, in test_steal_space_from_bitmap_to_extent()
548 * Now mark the region [128Mb - 128Kb, 128Mb[ as free too. This will in test_steal_space_from_bitmap_to_extent()
[all …]
/openbmc/u-boot/board/freescale/t102xqds/
H A DREADME14 - two e5500 cores, each with a private 256 KB L2 cache
19 - 256 KB shared L3 CoreNet platform cache (CPC)
155 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
156 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
158 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
159 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
160 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
163 0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB
164 0xF_E000_0000 0xF_E7FF_FFFF Promjet 128MB
172 128MB NOR Flash memory Map
[all …]
/openbmc/u-boot/board/freescale/t208xrdb/
H A DREADME13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
69 - NOR: 128MB 16-bit NOR Flash
89 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
90 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
92 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
93 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
94 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
95 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
98 0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB
107 128M NOR Flash memory Map
[all …]
/openbmc/u-boot/board/freescale/t208xqds/
H A DREADME13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
67 - 128MB NOR Flash, 512MB NAND Flash, PromJet debug port and FPGA
69 - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
124 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
125 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
127 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
128 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
129 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
130 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
133 0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB
[all …]
/openbmc/u-boot/doc/
H A DREADME.b4860qds90 - 2 KB internal memory space including
173 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4 KB
175 0xF_FF80_0000 0xF_FF80_FFFF IFC NAND Flash 64 KB
179 0xF_F800_0000 0xF_F800_FFFF PCIe I/O Space 64 KB
183 0xF_E800_0000 0xF_EFFF_FFFF IFC NOR Flash 128 MB
184 0xF_E000_0000 0xF_E7FF_FFFF Promjet 128 MB
203 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4 KB
205 0xF_FF80_0000 0xF_FF80_FFFF IFC NAND Flash 64 KB
209 0xF_F800_0000 0xF_F800_FFFF PCIe I/O Space 64 KB
213 0xF_E800_0000 0xF_EFFF_FFFF IFC NOR Flash 128 MB
[all …]
H A DREADME.N121311 - 32/64/128/256 BTB.
23 - 32/64/128-entry 4-way set-associati.ve main TLB.
27 - 4KB & 1MB.
28 - 8KB & 1MB.
33 - Cache size: 8KB/16KB/32KB/64KB.
38 - Size: 4KB to 1MB.
/openbmc/u-boot/include/configs/
H A Dxtfpga.h61 /* Lx60 can only map 128kb memory (instead of 256kb) when running under OCD */
63 # define CONFIG_SYS_MONITOR_LEN 0x00020000 /* 128KB */
65 # define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256KB */
68 #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* heap 256KB */
156 * Bit 7 maps the first 128KB of ROM address space at CONFIG_SYS_ROM_BASE to
201 # define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* block size 64KB */
202 # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x2000 /* param size 8KB */
206 # define CONFIG_SYS_FLASH_SIZE 0x8000000 /* 128MB */
207 # define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */
208 # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */
[all …]
H A Dmicroblaze-generic.h46 * SECT_SIZE = 0x20000; 128kB is one sector
47 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
50 * FREE 256kB
52 * ENV_AREA 128kB
75 /* 128K(one sector) for env */
89 /* 128K(two sectors) for env */
93 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
H A Dapf27.h71 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
72 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
74 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
75 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
77 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
173 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
264 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
265 /* micron 128MB */
266 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
267 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
/openbmc/linux/tools/testing/selftests/tc-testing/tc-tests/qdiscs/
H A Dhhf.json18 …c hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s n…
41 …t refcnt [0-9]+ limit 1500p.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s n…
64 …refcnt [0-9]+.*quantum 9000b hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s n…
87 … hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 100ms admit_bytes 128Kb evict_timeout 1s n…
133 …c hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 500m…
156 …c hhf 1: root refcnt [0-9]+.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s n…
180 …t refcnt [0-9]+ limit 1500p.*hh_limit 2048 reset_timeout 40ms admit_bytes 128Kb evict_timeout 1s n…
/openbmc/u-boot/board/cadence/xtfpga/
H A DREADME25 - 128MB / 64MB (LX60) memory
38 - 128MB Linear BPI Flash
67 connect them. Be aware that the board has only 128 KB of SRAM,
73 has been programmed into the first two 64 KB sectors of the Flash.
103 The XT-AV60 board has only 128 KB of SDRAM that can be mapped
105 OCD/JTAG. This limits the useful size of U-Boot to 128 KB (0x20000)
114 debugged, because the image can still fit into the 128 KB SRAM.
124 check and fatal error message if the image size exceeds 128 KB.
/openbmc/u-boot/board/freescale/ls1046aqds/
H A DREADME25 - One in-socket 128 MB NOR flash 16-bit data bus
50 0x00_1000_0000 - 0x00_1000_FFFF OCRAM0 64KB
51 0x00_1001_0000 - 0x00_1001_FFFF OCRAM1 64KB
53 0x00_6000_0000 - 0x00_67FF_FFFF IFC - NOR Flash 128MB
54 0x00_7E80_0000 - 0x00_7E80_FFFF IFC - NAND Flash 64KB
55 0x00_7FB0_0000 - 0x00_7FB0_0FFF IFC - FPGA 4KB
57 0x05_0000_0000 - 0x05_07FF_FFFF QMAN S/W Portal 128M
58 0x05_0800_0000 - 0x05_0FFF_FFFF BMAN S/W Portal 128M
/openbmc/linux/drivers/media/platform/samsung/s5p-mfc/
H A Dregs-mfc-v7.h34 #define MAX_FW_SIZE_V7 (SZ_512K) /* 512KB */
40 #define MFC_CHROMA_PAD_BYTES_V7 128
43 #define MFC_CTX_BUF_SIZE_V7 (30 * SZ_1K) /* 30KB */
45 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V7 (20 * SZ_1K) /* 20KB */
46 #define MFC_H264_ENC_CTX_BUF_SIZE_V7 (100 * SZ_1K) /* 100KB */
47 #define MFC_OTHER_ENC_CTX_BUF_SIZE_V7 (10 * SZ_1K) /* 10KB */
54 (((w) * 48) + 8192 + ((((w) + 1) / 2) * 128) + 144 + \
/openbmc/qemu/block/
H A Dvhdx.h28 * each block is 64KB:
31 * | File Id. | Header 1 | Header 2 | Region Table | Reserved (768KB) |
34 * 0.........64KB...........128KB........192KB..........256KB................1MB
88 the header is the first 4KB of the 64KB
91 /* The full header is 4KB, although the actual header data is much smaller.
92 * But for the checksum calculation, it is over the entire 4KB structure,
102 MSGUID file_write_guid; /* 128 bit unique identifier. Must be
106 MSGUID data_write_guid; /* 128 bit unique identifier. Must be
120 MSGUID log_guid; /* 128 bit unique identifier. If zero,
138 uint32_t checksum; /* CRC-32C hash of the 64KB table */
[all …]
/openbmc/linux/arch/x86/pci/
H A Dce4100.c45 #define KB (1024) macro
106 DEFINE_REG(2, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
107 DEFINE_REG(3, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
108 DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
109 DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write)
110 DEFINE_REG(6, 0, 0x10, (512*KB), reg_init, reg_read, reg_write)
111 DEFINE_REG(6, 1, 0x10, (512*KB), reg_init, reg_read, reg_write)
112 DEFINE_REG(6, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
114 DEFINE_REG(8, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
115 DEFINE_REG(8, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
[all …]
/openbmc/u-boot/board/freescale/ls1046ardb/
H A DREADME46 0x00_1000_0000 - 0x00_1000_FFFF OCRAM0 64KB
47 0x00_1001_0000 - 0x00_1001_FFFF OCRAM1 64KB
49 0x00_7E80_0000 - 0x00_7E80_FFFF IFC - NAND Flash 64KB
50 0x00_7FB0_0000 - 0x00_7FB0_0FFF IFC - CPLD 4KB
52 0x05_0000_0000 - 0x05_07FF_FFFF QMAN S/W Portal 128M
53 0x05_0800_0000 - 0x05_0FFF_FFFF BMAN S/W Portal 128M
67 0x00_4090_0000 - 0x00_4093_FFFF FMan ucode 256KB
68 0x00_4094_0000 - 0x00_4097_FFFF QE/uQE firmware 256KB

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