18d67c368SShengzhou LiuT2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC. 28d67c368SShengzhou LiuIt can work in two mode: standalone mode and PCIe endpoint mode. 38d67c368SShengzhou Liu 48d67c368SShengzhou LiuT2080 SoC Overview 58d67c368SShengzhou Liu------------------ 68d67c368SShengzhou LiuThe T2080 QorIQ multicore processor combines four dual-threaded e6500 Power 78d67c368SShengzhou LiuArchitecture processor cores with high-performance datapath acceleration 88d67c368SShengzhou Liulogic and network and peripheral bus interfaces required for networking, 98d67c368SShengzhou Liutelecom/datacom, wireless infrastructure, and mil/aerospace applications. 108d67c368SShengzhou Liu 118d67c368SShengzhou LiuT2080 includes the following functions and features: 128d67c368SShengzhou Liu - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz 138d67c368SShengzhou Liu - 2MB L2 cache and 512KB CoreNet platform cache (CPC) 148d67c368SShengzhou Liu - Hierarchical interconnect fabric 158d67c368SShengzhou Liu - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving 168d67c368SShengzhou Liu - Data Path Acceleration Architecture (DPAA) incorporating acceleration 178d67c368SShengzhou Liu - 16 SerDes lanes up to 10.3125 GHz 188d67c368SShengzhou Liu - 8 Ethernet interfaces, supporting combinations of the following: 198d67c368SShengzhou Liu - Up to four 10 Gbps Ethernet MACs 208d67c368SShengzhou Liu - Up to eight 1 Gbps Ethernet MACs 218d67c368SShengzhou Liu - Up to four 2.5 Gbps Ethernet MACs 228d67c368SShengzhou Liu - High-speed peripheral interfaces 238d67c368SShengzhou Liu - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) 248d67c368SShengzhou Liu - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz 258d67c368SShengzhou Liu - Additional peripheral interfaces 268d67c368SShengzhou Liu - Two serial ATA (SATA 2.0) controllers 278d67c368SShengzhou Liu - Two high-speed USB 2.0 controllers with integrated PHY 288d67c368SShengzhou Liu - Enhanced secure digital host controller (SD/SDHC/SDXC/eMMC) 298d67c368SShengzhou Liu - Enhanced serial peripheral interface (eSPI) 308d67c368SShengzhou Liu - Four I2C controllers 318d67c368SShengzhou Liu - Four 2-pin UARTs or two 4-pin UARTs 328d67c368SShengzhou Liu - Integrated Flash Controller supporting NAND and NOR flash 338d67c368SShengzhou Liu - Three eight-channel DMA engines 348d67c368SShengzhou Liu - Support for hardware virtualization and partitioning enforcement 358d67c368SShengzhou Liu - QorIQ Platform's Trust Architecture 2.0 368d67c368SShengzhou Liu 378d67c368SShengzhou LiuDifferences between T2080 and T2081 388d67c368SShengzhou Liu----------------------------------- 398d67c368SShengzhou Liu Feature T2080 T2081 408d67c368SShengzhou Liu 1G Ethernet numbers: 8 6 418d67c368SShengzhou Liu 10G Ethernet numbers: 4 2 428d67c368SShengzhou Liu SerDes lanes: 16 8 438d67c368SShengzhou Liu Serial RapidIO,RMan: 2 no 448d67c368SShengzhou Liu SATA Controller: 2 no 458d67c368SShengzhou Liu Aurora: yes no 468d67c368SShengzhou Liu SoC Package: 896-pins 780-pins 478d67c368SShengzhou Liu 488d67c368SShengzhou Liu 498d67c368SShengzhou LiuT2080PCIe-RDB board Overview 508d67c368SShengzhou Liu---------------------------- 518d67c368SShengzhou Liu - SERDES Configuration 528d67c368SShengzhou Liu - SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10) 538d67c368SShengzhou Liu - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2) 548d67c368SShengzhou Liu - SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3) 558d67c368SShengzhou Liu - SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2) 568d67c368SShengzhou Liu - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2) 578d67c368SShengzhou Liu - SerDes-2 Lane G-H: to SATA1 & SATA2 588d67c368SShengzhou Liu - Ethernet 598d67c368SShengzhou Liu - Two on-board 10M/100M/1G RGMII ethernet ports 608d67c368SShengzhou Liu - Two on-board 10Gbps XFI fiber ports 618d67c368SShengzhou Liu - Two on-board 10Gbps Base-T copper ports 628d67c368SShengzhou Liu - DDR Memory 638d67c368SShengzhou Liu - Supports 72bit 4GB DDR3-LP SODIMM 648d67c368SShengzhou Liu - PCIe 658d67c368SShengzhou Liu - One PCIe x4 gold-finger 668d67c368SShengzhou Liu - One PCIe x4 connector 678d67c368SShengzhou Liu - One PCIe x2 end-point device (C293 Crypto co-processor) 688d67c368SShengzhou Liu - IFC/Local Bus 698d67c368SShengzhou Liu - NOR: 128MB 16-bit NOR Flash 70ef531c73SShengzhou Liu - NAND: 1GB 8-bit NAND flash 718d67c368SShengzhou Liu - CPLD: for system controlling with programable header on-board 728d67c368SShengzhou Liu - SATA 738d67c368SShengzhou Liu - Two SATA 2.0 onnectors on-board 748d67c368SShengzhou Liu - USB 758d67c368SShengzhou Liu - Supports two USB 2.0 ports with integrated PHYs 768d67c368SShengzhou Liu - Two type A ports with 5V@1.5A per port. 778d67c368SShengzhou Liu - SDHC 788d67c368SShengzhou Liu - one TF-card connector on-board 798d67c368SShengzhou Liu - SPI 808d67c368SShengzhou Liu - On-board 64MB SPI flash 818d67c368SShengzhou Liu - Other 828d67c368SShengzhou Liu - Two Serial ports 838d67c368SShengzhou Liu - Four I2C ports 848d67c368SShengzhou Liu 858d67c368SShengzhou Liu 868d67c368SShengzhou LiuSystem Memory map 878d67c368SShengzhou Liu----------------- 888d67c368SShengzhou LiuStart Address End Address Description Size 898d67c368SShengzhou Liu0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB 908d67c368SShengzhou Liu0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB 918d67c368SShengzhou Liu0xF_FE00_0000 0xF_FEFF_FFFF CCSRBAR 16MB 928d67c368SShengzhou Liu0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB 938d67c368SShengzhou Liu0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB 948d67c368SShengzhou Liu0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB 958d67c368SShengzhou Liu0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB 968d67c368SShengzhou Liu0xF_F600_0000 0xF_F7FF_FFFF Queue manager software portal 32MB 978d67c368SShengzhou Liu0xF_F400_0000 0xF_F5FF_FFFF Buffer manager software portal 32MB 988d67c368SShengzhou Liu0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB 998d67c368SShengzhou Liu0xF_0000_0000 0xF_003F_FFFF DCSR 4MB 1008d67c368SShengzhou Liu0xC_4000_0000 0xC_4FFF_FFFF PCI Express 4 Mem Space 256MB 1018d67c368SShengzhou Liu0xC_3000_0000 0xC_3FFF_FFFF PCI Express 3 Mem Space 256MB 1028d67c368SShengzhou Liu0xC_2000_0000 0xC_2FFF_FFFF PCI Express 2 Mem Space 256MB 1038d67c368SShengzhou Liu0xC_0000_0000 0xC_1FFF_FFFF PCI Express 1 Mem Space 512MB 1048d67c368SShengzhou Liu0x0_0000_0000 0x0_ffff_ffff DDR 4GB 1058d67c368SShengzhou Liu 1068d67c368SShengzhou Liu 1078d67c368SShengzhou Liu128M NOR Flash memory Map 1088d67c368SShengzhou Liu------------------------- 1098d67c368SShengzhou LiuStart Address End Address Definition Max size 110*a187559eSBin Meng0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB 111*a187559eSBin Meng0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB 1128d67c368SShengzhou Liu0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB 1138d67c368SShengzhou Liu0xEFE00000 0xEFE3FFFF PHY CS4315 firmware 256KB 1148d67c368SShengzhou Liu0xED300000 0xEFEFFFFF rootfs (alt bank) 44MB 1158d67c368SShengzhou Liu0xEC800000 0xEC8FFFFF Hardware device tree (alt bank) 1MB 1168d67c368SShengzhou Liu0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB 1178d67c368SShengzhou Liu0xEC000000 0xEC01FFFF RCW (alt bank) 128KB 118*a187559eSBin Meng0xEBF40000 0xEBFFFFFF U-Boot (alt bank) 768KB 119*a187559eSBin Meng0xEBF20000 0xEBF3FFFF U-Boot env (alt bank) 128KB 1208d67c368SShengzhou Liu0xEBF00000 0xEBF1FFFF FMAN ucode (alt bank) 128KB 1218d67c368SShengzhou Liu0xEBE00000 0xEBE3FFFF PHY CS4315 firmware (alt bank) 256KB 1228d67c368SShengzhou Liu0xE9300000 0xEBEFFFFF rootfs (current bank) 44MB 1234d666683SShengzhou Liu0xE8800000 0xE88FFFFF Hardware device tree (cur bank) 1MB 1248d67c368SShengzhou Liu0xE8020000 0xE86FFFFF Linux.uImage (current bank) 7MB + 875KB 1258d67c368SShengzhou Liu0xE8000000 0xE801FFFF RCW (current bank) 128KB 1268d67c368SShengzhou Liu 1278d67c368SShengzhou Liu 1288d67c368SShengzhou LiuT2080PCIe-RDB Ethernet Port Map 1298d67c368SShengzhou Liu------------------------------- 1308d67c368SShengzhou LiuLabel In Uboot In Linux FMan Address Comments PHY 1318d67c368SShengzhou LiuETH0 FM1@GTEC1 fm1-mac9 0xfe4f0000 10G SFP+ (CS4315) 1328d67c368SShengzhou LiuETH1 FM1@GTEC2 fm1-mac10 0xfe4f2000 10G SFP+ (CS4315) 1338d67c368SShengzhou LiuETH2 FM1@GTEC3 fm1-mac1 0xfe4e0000 10G Base-T (AQ1202) 1348d67c368SShengzhou LiuETH3 FM1@GTEC4 fm1-mac2 0xfe4e2000 10G Base-T (AQ1202) 1358d67c368SShengzhou LiuETH4 FM1@DTSEC3 fm1-mac3 0xfe4e4000 1G RGMII (RTL8211E) 1368d67c368SShengzhou LiuETH5 FM1@DTSEC4 fm1-mac4 0xfe4e6000 1G RGMII (RTL8211E) 1378d67c368SShengzhou Liu 1388d67c368SShengzhou Liu 1398d67c368SShengzhou LiuT2080PCIe-RDB Default DIP-Switch setting 1408d67c368SShengzhou Liu---------------------------------------- 1418d67c368SShengzhou LiuSW1[1:8] = '00010011' 1428d67c368SShengzhou LiuSW2[1:8] = '10111111' 1438d67c368SShengzhou LiuSW3[1:8] = '11100001' 1448d67c368SShengzhou Liu 1458d67c368SShengzhou LiuSoftware configurations and board settings 1468d67c368SShengzhou Liu------------------------------------------ 1478d67c368SShengzhou Liu1. NOR boot: 1488d67c368SShengzhou Liu a. build NOR boot image 1494d666683SShengzhou Liu $ make T2080RDB_config 1504d666683SShengzhou Liu $ make 1518d67c368SShengzhou Liu b. program u-boot.bin image to NOR flash 1528d67c368SShengzhou Liu => tftp 1000000 u-boot.bin 1538d67c368SShengzhou Liu => pro off all;era eff40000 efffffff;cp.b 1000000 eff40000 $filesize 1548d67c368SShengzhou Liu set SW1[1:8] = '00010011', SW2[1] = '1', SW3[4] = '0' for NOR boot 1558d67c368SShengzhou Liu 1568d67c368SShengzhou Liu Switching between default bank and alternate bank on NOR flash 1578d67c368SShengzhou Liu To change boot source to vbank4: 158*a187559eSBin Meng via software: run command 'cpld reset altbank' in U-Boot. 159ef531c73SShengzhou Liu via DIP-switch: set SW3[5:7] = '100' 1608d67c368SShengzhou Liu 1618d67c368SShengzhou Liu To change boot source to vbank0: 162*a187559eSBin Meng via software: run command 'cpld reset' in U-Boot. 163ef531c73SShengzhou Liu via DIP-Switch: set SW3[5:7] = '000' 1648d67c368SShengzhou Liu 1658d67c368SShengzhou Liu2. NAND Boot: 1668d67c368SShengzhou Liu a. build PBL image for NAND boot 1678d67c368SShengzhou Liu $ make T2080RDB_NAND_config 1684d666683SShengzhou Liu $ make 1694d666683SShengzhou Liu b. program u-boot-with-spl-pbl.bin to NAND flash 1704d666683SShengzhou Liu => tftp 1000000 u-boot-with-spl-pbl.bin 1718d67c368SShengzhou Liu => nand erase 0 d0000 1728d67c368SShengzhou Liu => nand write 1000000 0 $filesize 1738d67c368SShengzhou Liu set SW1[1:8] = '10000010', SW2[1] = '1', SW3[4] = '1' for NAND boot 1748d67c368SShengzhou Liu 1758d67c368SShengzhou Liu3. SPI Boot: 1768d67c368SShengzhou Liu a. build PBL image for SPI boot 1778d67c368SShengzhou Liu $ make T2080RDB_SPIFLASH_config 1784d666683SShengzhou Liu $ make 1794d666683SShengzhou Liu b. program u-boot-with-spl-pbl.bin to SPI flash 1804d666683SShengzhou Liu => tftp 1000000 u-boot-with-spl-pbl.bin 1818d67c368SShengzhou Liu => sf probe 0 1828d67c368SShengzhou Liu => sf erase 0 d0000 1838d67c368SShengzhou Liu => sf write 1000000 0 $filesize 1848d67c368SShengzhou Liu set SW1[1:8] = '00100010', SW2[1] ='1' for SPI boot 1858d67c368SShengzhou Liu 1868d67c368SShengzhou Liu4. SD Boot: 1878d67c368SShengzhou Liu a. build PBL image for SD boot 1888d67c368SShengzhou Liu $ make T2080RDB_SDCARD_config 1894d666683SShengzhou Liu $ make 1904d666683SShengzhou Liu b. program u-boot-with-spl-pbl.bin to micro-SD/TF card 1914d666683SShengzhou Liu => tftp 1000000 u-boot-with-spl-pbl.bin 1924d666683SShengzhou Liu => mmc write 1000000 8 0x800 1938d67c368SShengzhou Liu set SW1[1:8] = '00100000', SW2[1] = '0' for SD boot 1948d67c368SShengzhou Liu 1958d67c368SShengzhou Liu 1964d666683SShengzhou Liu2-stage NAND/SPI/SD boot loader 1974d666683SShengzhou Liu------------------------------- 1984d666683SShengzhou LiuPBL initializes the internal CPC-SRAM and copy SPL(160K) to SRAM. 1994d666683SShengzhou LiuSPL further initializes DDR using SPD and environment variables 200*a187559eSBin Mengand copy U-Boot(768 KB) from NAND/SPI/SD device to DDR. 201*a187559eSBin MengFinally SPL transers control to U-Boot for futher booting. 2024d666683SShengzhou Liu 2034d666683SShengzhou LiuSPL has following features: 2044d666683SShengzhou Liu - Executes within 256K 2054d666683SShengzhou Liu - No relocation required 2064d666683SShengzhou Liu 2074d666683SShengzhou LiuRun time view of SPL framework 2084d666683SShengzhou Liu------------------------------------------------- 2094d666683SShengzhou Liu|Area | Address | 2104d666683SShengzhou Liu------------------------------------------------- 2114d666683SShengzhou Liu|SecureBoot header | 0xFFFC0000 (32KB) | 2124d666683SShengzhou Liu------------------------------------------------- 2134d666683SShengzhou Liu|GD, BD | 0xFFFC8000 (4KB) | 2144d666683SShengzhou Liu------------------------------------------------- 2154d666683SShengzhou Liu|ENV | 0xFFFC9000 (8KB) | 2164d666683SShengzhou Liu------------------------------------------------- 2174d666683SShengzhou Liu|HEAP | 0xFFFCB000 (50KB) | 2184d666683SShengzhou Liu------------------------------------------------- 2194d666683SShengzhou Liu|STACK | 0xFFFD8000 (22KB) | 2204d666683SShengzhou Liu------------------------------------------------- 221*a187559eSBin Meng|U-Boot SPL | 0xFFFD8000 (160KB) | 2224d666683SShengzhou Liu------------------------------------------------- 2234d666683SShengzhou Liu 2244d666683SShengzhou LiuNAND Flash memory Map on T2080RDB 2254d666683SShengzhou Liu-------------------------------------------------------------- 2264d666683SShengzhou LiuStart End Definition Size 227*a187559eSBin Meng0x000000 0x0FFFFF U-Boot img 1MB (2 blocks) 228*a187559eSBin Meng0x100000 0x17FFFF U-Boot env 512KB (1 block) 2294d666683SShengzhou Liu0x180000 0x1FFFFF FMAN ucode 512KB (1 block) 2304d666683SShengzhou Liu0x200000 0x27FFFF CS4315 ucode 512KB (1 block) 2314d666683SShengzhou Liu 2324d666683SShengzhou Liu 2334d666683SShengzhou LiuMicro SD Card memory Map on T2080RDB 2344d666683SShengzhou Liu---------------------------------------------------- 2354d666683SShengzhou LiuBlock #blocks Definition Size 236*a187559eSBin Meng0x008 2048 U-Boot img 1MB 237*a187559eSBin Meng0x800 0016 U-Boot env 8KB 2384d666683SShengzhou Liu0x820 0128 FMAN ucode 64KB 2394d666683SShengzhou Liu0x8a0 0512 CS4315 ucode 256KB 2404d666683SShengzhou Liu 2414d666683SShengzhou Liu 2424d666683SShengzhou LiuSPI Flash memory Map on T2080RDB 2434d666683SShengzhou Liu---------------------------------------------------- 2444d666683SShengzhou LiuStart End Definition Size 245*a187559eSBin Meng0x000000 0x0FFFFF U-Boot img 1MB 246*a187559eSBin Meng0x100000 0x101FFF U-Boot env 8KB 2474d666683SShengzhou Liu0x110000 0x11FFFF FMAN ucode 64KB 2484d666683SShengzhou Liu0x120000 0x15FFFF CS4315 ucode 256KB 2494d666683SShengzhou Liu 2504d666683SShengzhou Liu 2518d67c368SShengzhou LiuHow to update the ucode of Cortina CS4315/CS4340 10G PHY 2528d67c368SShengzhou Liu-------------------------------------------------------- 2538d67c368SShengzhou Liu=> tftp 1000000 CS4315-CS4340-PHY-ucode.txt 2548d67c368SShengzhou Liu=> pro off all;era 0xefe00000 0xefefffff;cp.b 1000000 0xefe00000 $filesize 2558d67c368SShengzhou Liu 2568d67c368SShengzhou Liu 2578d67c368SShengzhou LiuHow to update the ucode of Freescale FMAN 2588d67c368SShengzhou Liu----------------------------------------- 2598d67c368SShengzhou Liu=> tftp 1000000 fsl_fman_ucode_t2080_r1.0.bin 2608d67c368SShengzhou Liu=> pro off all;erase 0xeff00000 0xeff1ffff;cp 1000000 0xeff00000 $filesize 2618d67c368SShengzhou Liu 2628d67c368SShengzhou Liu 2638d67c368SShengzhou LiuFor more details, please refer to T2080PCIe-RDB User Guide and access 2648d67c368SShengzhou Liuwebsite www.freescale.com and Freescale QorIQ SDK Infocenter document. 265