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Searched defs:XCHAL_INTLEVEL4_VECTOR_VADDR (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h316 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0xFE000520 macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h318 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0xFE000520 macro
/openbmc/qemu/target/xtensa/
H A Doverlay_tool.h558 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0 macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h402 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x5FFE05BC macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h367 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0xD0000200 macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h368 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0xD0000200 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h366 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0xD0000200 macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h417 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x00002200 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h396 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x00002200 macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h418 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x00002200 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h458 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x00002200 macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h522 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x60000200 macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h501 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x00002200 macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h500 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x00002200 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h500 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x60000200 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h501 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x00002200 macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h536 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x60000200 macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h557 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x40000200 macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h639 #define XCHAL_INTLEVEL4_VECTOR_VADDR 0x00002200 macro