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Searched defs:SZ (Results 1 – 14 of 14) sorted by relevance

/openbmc/qemu/tests/tcg/hexagon/
H A Dload_align.c52 #define LOAD_io(SZ, RES, ADDR, OFF) \ argument
62 #define TEST_io(NAME, SZ, SIZE, EXP1, EXP2, EXP3, EXP4) \ argument
87 #define LOAD_ur(SZ, RES, SHIFT, IDX) \ argument
97 #define TEST_ur(NAME, SZ, SHIFT, RES1, RES2, RES3, RES4) \ argument
122 #define LOAD_ap(SZ, RES, PTR, ADDR) \ argument
131 #define TEST_ap(NAME, SZ, SIZE, RES1, RES2, RES3, RES4) \ argument
161 #define LOAD_pr(SZ, RES, PTR, INC) \ argument
173 #define TEST_pr(NAME, SZ, SIZE, RES1, RES2, RES3, RES4) \ argument
203 #define LOAD_pbr(SZ, RES, PTR) \ argument
216 #define TEST_pbr(NAME, SZ, RES1, RES2, RES3, RES4) \ argument
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H A Dbrev.c38 #define BREV_LOAD(SZ, RES, ADDR, INC) \ argument
59 #define BREV_STORE(SZ, PART, ADDR, VAL, INC) \ argument
78 #define BREV_STORE_NEW(SZ, ADDR, VAL, INC) \ argument
112 #define TEST_BREV_LOAD(SZ, TYPE, BUF, SHIFT, EXP) \ argument
122 #define TEST_BREV_STORE(SZ, TYPE, BUF, VAL, SHIFT) \ argument
134 #define TEST_BREV_STORE_NEW(SZ, BUF, SHIFT) \ argument
H A Dload_unpack.c55 #define BxW_LOAD_io(SZ, RES, ADDR, OFF) \ argument
96 #define BxW_LOAD_ur(SZ, RES, SHIFT, IDX) \ argument
136 #define BxW_LOAD_ap(SZ, RES, PTR, ADDR) \ argument
180 #define BxW_LOAD_pr(SZ, RES, PTR, INC) \ argument
227 #define BxW_LOAD_pbr(SZ, RES, PTR) \ argument
271 #define BxW_LOAD_pi(SZ, RES, PTR, INC) \ argument
315 #define BxW_LOAD_pci(SZ, RES, PTR, START, LEN, INC) \ argument
364 #define BxW_LOAD_pcr(SZ, RES, PTR, START, LEN, INC) \ argument
H A Dcirc.c233 #define check_load(I, RES, INC, SZ) __check_load(__LINE__, I, RES, INC, SZ) argument
235 #define TEST_LOAD_IMM(SZ, TYPE, BUF, BUFSIZE, INC, FMT) \ argument
264 #define TEST_LOAD_REG(SZ, TYPE, BUF, BUFSIZE, FMT) \ argument
294 #define CIRC_VAL(SZ, TYPE, BUFSIZE) \ in TEST_LOAD_REG() argument
321 #define CHECK_STORE(SZ, BUF, BUFSIZE, FMT) \ argument
339 #define CIRC_TEST_STORE_IMM(SZ, CHK, TYPE, BUF, BUFSIZE, SHIFT, INC) \ argument
371 #define CIRC_TEST_STORE_REG(SZ, CHK, TYPE, BUF, BUFSIZE, SHIFT) \ argument
/openbmc/linux/arch/mips/crypto/
H A Dcrc32-mips.c31 #define _ASM_SET_CRC(OP, SZ, TYPE) \ argument
40 #define _ASM_UNSET_CRC(op, SZ, TYPE) ".purgem " #op "\n\t" argument
42 #define _ASM_SET_CRC(op, SZ, TYPE) ".set\tcrc\n\t" argument
43 #define _ASM_UNSET_CRC(op, SZ, TYPE) argument
46 #define __CRC32(crc, value, op, SZ, TYPE) \ argument
/openbmc/linux/arch/sh/math-emu/
H A Dmath.c68 #define CMP_X(SZ,R,M,N) do{ \ argument
72 #define EQ_X(SZ,R,M,N) do{ \ argument
99 #define ARITH_X(SZ,OP,M,N) do{ \ argument
285 #define EMU_FLOAT_X(SZ,N) do { \ in NOTYETn() argument
301 #define EMU_FTRC_X(SZ,N) do { \ argument
/openbmc/linux/arch/sparc/net/
H A Dbpf_jit_comp_32.c291 #define emit_alloc_stack(SZ) \ argument
294 #define emit_release_stack(SZ) \ argument
/openbmc/qemu/target/ppc/
H A Dint_helper.c1273 #define XXGENPCV_BE_EXP(NAME, SZ) \ argument
1296 #define XXGENPCV_BE_COMP(NAME, SZ) \ argument
1315 #define XXGENPCV_LE_EXP(NAME, SZ) \ argument
1340 #define XXGENPCV_LE_COMP(NAME, SZ) \ argument
1361 #define XXGENPCV(NAME, SZ) \ argument
/openbmc/qemu/hw/core/
H A Dloader.c304 #define SZ 32 macro
329 #define SZ 64 macro
/openbmc/linux/arch/m68k/include/asm/
H A Dtraps.h114 #define SZ (0x0030) macro
/openbmc/qemu/accel/tcg/
H A Dtcg-runtime-gvec.c1029 #define DO_CMP2(SZ) \ argument
1056 #define DO_CMP2(SZ) \ argument
/openbmc/linux/scripts/mod/
H A Dmodpost.c1714 #define SZ 500 macro
/openbmc/webui-vue/src/locales/
H A Dru-RU.json1079 "SZ": "Эсватини", string
H A Den-US.json1093 "SZ": "Eswatini", string