History log of /openbmc/qemu/tests/tcg/hexagon/load_unpack.c (Results 1 – 6 of 6)
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Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0
# 9c9fff18 26-May-2023 Richard Henderson <richard.henderson@linaro.org>

Merge tag 'pull-hex-20230526' of https://github.com/quic/qemu into staging

Hexagon update

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# RCLR

Merge tag 'pull-hex-20230526' of https://github.com/quic/qemu into staging

Hexagon update

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# gpg: Signature made Fri 26 May 2023 07:18:12 AM PDT
# gpg: using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422

* tag 'pull-hex-20230526' of https://github.com/quic/qemu:
Hexagon (target/hexagon) Change Hexagon maintainer
Hexagon: fix outdated `hex_new_*` comments
target/hexagon/*.py: clean up used 'toss' and 'numregs' vars
Hexagon (target/hexagon) Fix assignment to tmp registers
Hexagon (tests/tcg/hexagon) Clean up Hexagon check-tcg tests

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# 0d57cd61 19-May-2023 Taylor Simpson <tsimpson@quicinc.com>

Hexagon (tests/tcg/hexagon) Clean up Hexagon check-tcg tests

Move test infra to header file
check functions (always print line number on error)
USR manipulation
Useful floating point val

Hexagon (tests/tcg/hexagon) Clean up Hexagon check-tcg tests

Move test infra to header file
check functions (always print line number on error)
USR manipulation
Useful floating point values
Use stdint.h types
Use stdbool.h bool where appropriate
Use trip counts local to for loop

Suggested-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Tested-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230522174341.1805460-1-tsimpson@quicinc.com>

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Revision tags: v8.0.0, v7.2.0
# 4e06b3fc 31-Jul-2022 Richard Henderson <richard.henderson@linaro.org>

Merge tag 'pull-hex-20220731' of https://github.com/quic/qemu into staging

Hexagon bug fixes and test improvements

1) Fixes a bug in qemu-hexagon
2) Fixes a bug in a test case
3) Adds reference fil

Merge tag 'pull-hex-20220731' of https://github.com/quic/qemu into staging

Hexagon bug fixes and test improvements

1) Fixes a bug in qemu-hexagon
2) Fixes a bug in a test case
3) Adds reference file for float_convd test case

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# gpg: Signature made Sun 31 Jul 2022 04:23:59 PM PDT
# gpg: using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422

* tag 'pull-hex-20220731' of https://github.com/quic/qemu:
Hexagon (tests/tcg/hexagon) reference file for float_convd
Hexagon (tests/tcg/hexagon) Fix alignment in load_unpack.c
Hexagon (target/hexagon) make VyV operands use a unique temp

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# a1ad040d 18-Jul-2022 Taylor Simpson <tsimpson@quicinc.com>

Hexagon (tests/tcg/hexagon) Fix alignment in load_unpack.c

The increment used in :brev tests was causing unaligned addresses
Change the increment and the relevant expected values

Signed-off-by: Tay

Hexagon (tests/tcg/hexagon) Fix alignment in load_unpack.c

The increment used in :brev tests was causing unaligned addresses
Change the increment and the relevant expected values

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220718230320.24444-3-tsimpson@quicinc.com>

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Revision tags: v7.0.0, v6.2.0, v6.1.0
# 15106f7d 02-May-2021 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210502' into staging

Minor cleanups.
Finish the rest of the hexagon integer instructions.

# gpg: Signature made Sun 02 May 2021 15:3

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210502' into staging

Minor cleanups.
Finish the rest of the hexagon integer instructions.

# gpg: Signature made Sun 02 May 2021 15:38:17 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-hex-20210502: (31 commits)
Hexagon (target/hexagon) CABAC decode bin
Hexagon (target/hexagon) load into shifted register instructions
Hexagon (target/hexagon) load and unpack bytes instructions
Hexagon (target/hexagon) bit reverse (brev) addressing
Hexagon (target/hexagon) circular addressing
Hexagon (target/hexagon) add A4_addp_c/A4_subp_c
Hexagon (target/hexagon) add A6_vminub_RdP
Hexagon (target/hexagon) add A5_ACS (vacsh)
Hexagon (target/hexagon) add F2_sfinvsqrta
Hexagon (target/hexagon) add F2_sfrecipa instruction
Hexagon (target/hexagon) compile all debug code
Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h
Hexagon (target/hexagon) cleanup reg_field_info definition
Hexagon (target/hexagon) cleanup ternary operators in semantics
Hexagon (target/hexagon) use softfloat for float-to-int conversions
Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn
Hexagon (target/hexagon) use softfloat default NaN and tininess
Hexagon (target/hexagon) change type of softfloat_roundingmodes
Hexagon (target/hexagon) remove unused carry_from_add64 function
Hexagon (target/hexagon) change variables from int to bool when appropriate
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# 0d0b91a8 08-Apr-2021 Taylor Simpson <tsimpson@quicinc.com>

Hexagon (target/hexagon) load and unpack bytes instructions

The following instructions are added
L2_loadbzw2_io Rd32 = memubh(Rs32+#s11:1)
L2_loadbzw4_io Rdd32 = memubh(Rs3

Hexagon (target/hexagon) load and unpack bytes instructions

The following instructions are added
L2_loadbzw2_io Rd32 = memubh(Rs32+#s11:1)
L2_loadbzw4_io Rdd32 = memubh(Rs32+#s11:1)
L2_loadbsw2_io Rd32 = membh(Rs32+#s11:1)
L2_loadbsw4_io Rdd32 = membh(Rs32+#s11:1)

L4_loadbzw2_ur Rd32 = memubh(Rt32<<#u2+#U6)
L4_loadbzw4_ur Rdd32 = memubh(Rt32<<#u2+#U6)
L4_loadbsw2_ur Rd32 = membh(Rt32<<#u2+#U6)
L4_loadbsw4_ur Rdd32 = membh(Rt32<<#u2+#U6)

L4_loadbzw2_ap Rd32 = memubh(Re32=#U6)
L4_loadbzw4_ap Rdd32 = memubh(Re32=#U6)
L4_loadbsw2_ap Rd32 = membh(Re32=#U6)
L4_loadbsw4_ap Rdd32 = membh(Re32=#U6)

L2_loadbzw2_pr Rd32 = memubh(Rx32++Mu2)
L2_loadbzw4_pr Rdd32 = memubh(Rx32++Mu2)
L2_loadbsw2_pr Rd32 = membh(Rx32++Mu2)
L2_loadbsw4_pr Rdd32 = membh(Rx32++Mu2)

L2_loadbzw2_pbr Rd32 = memubh(Rx32++Mu2:brev)
L2_loadbzw4_pbr Rdd32 = memubh(Rx32++Mu2:brev)
L2_loadbsw2_pbr Rd32 = membh(Rx32++Mu2:brev)
L2_loadbsw4_pbr Rdd32 = membh(Rx32++Mu2:brev)

L2_loadbzw2_pi Rd32 = memubh(Rx32++#s4:1)
L2_loadbzw4_pi Rdd32 = memubh(Rx32++#s4:1)
L2_loadbsw2_pi Rd32 = membh(Rx32++#s4:1)
L2_loadbsw4_pi Rdd32 = membh(Rx32++#s4:1)

L2_loadbzw2_pci Rd32 = memubh(Rx32++#s4:1:circ(Mu2))
L2_loadbzw4_pci Rdd32 = memubh(Rx32++#s4:1:circ(Mu2))
L2_loadbsw2_pci Rd32 = membh(Rx32++#s4:1:circ(Mu2))
L2_loadbsw4_pci Rdd32 = membh(Rx32++#s4:1:circ(Mu2))

L2_loadbzw2_pcr Rd32 = memubh(Rx32++I:circ(Mu2))
L2_loadbzw4_pcr Rdd32 = memubh(Rx32++I:circ(Mu2))
L2_loadbsw2_pcr Rd32 = membh(Rx32++I:circ(Mu2))
L2_loadbsw4_pcr Rdd32 = membh(Rx32++I:circ(Mu2))

Test cases in tests/tcg/hexagon/load_unpack.c

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-25-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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