| /openbmc/qemu/tests/tcg/hexagon/ |
| H A D | usr.c | 51 #define FUNC_x_OP_x(RESTYPE, SRCTYPE, NAME, INSN) \ argument
66 #define FUNC_R_OP_R(NAME, INSN) \ argument
69 #define FUNC_R_OP_P(NAME, INSN) \ argument
72 #define FUNC_P_OP_P(NAME, INSN) \ argument
75 #define FUNC_P_OP_R(NAME, INSN) \ argument
82 #define FUNC_xp_OP_x(RESTYPE, SRCTYPE, NAME, INSN) \ argument
100 #define FUNC_Rp_OP_R(NAME, INSN) \ argument
104 #define FUNC_x_OP_xx(RESTYPE, SRC1TYPE, SRC2TYPE, NAME, INSN) \ argument
119 #define FUNC_P_OP_PP(NAME, INSN) \ argument
122 #define FUNC_R_OP_PP(NAME, INSN) \ argument
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | translate-mve.c | 531 #define DO_1OP_VEC(INSN, FN, VECFN) \ argument
543 #define DO_1OP(INSN, FN) DO_1OP_VEC(INSN, FN, NULL) argument
558 #define DO_VCVT(INSN, HFN, SFN) \ in DO_1OP() argument
620 #define DO_VCVT_RMODE(INSN, RMODE, U) \ argument
635 #define DO_VCVT_SH(INSN, FN) \ in DO_VCVT_RMODE() argument
649 #define DO_VRINT(INSN, RMODE) \ argument
695 #define DO_VMOVN(INSN, FN) \ argument
814 #define DO_LOGIC(INSN, HELPER, VECFN) \ argument
833 #define DO_2OP_VEC(INSN, FN, VECFN) \ argument
845 #define DO_2OP(INSN, FN) DO_2OP_VEC(INSN, FN, NULL) argument
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| H A D | translate-neon.c | 809 #define DO_3SAME(INSN, FUNC) \ argument
836 #define DO_3SAME_BITSEL(INSN, O1, O2, O3) \ in DO_3SAME() argument
849 #define DO_3SAME_NO_SZ_3(INSN, FUNC) \ argument
882 #define DO_3SAME_CMP(INSN, COND) \ argument
914 #define DO_VQRDMLAH(INSN, FUNC) \ argument
970 #define DO_3SAME_VQDMULH(INSN, FUNC) \ argument
987 #define DO_3S_FP_GVEC(INSN,SFUNC,HFUNC) \ argument
1087 #define DO_2SH(INSN, FUNC) \ argument
1227 #define DO_2SN_64(INSN, FUNC, NARROWFUNC) \ argument
1232 #define DO_2SN_32(INSN, FUNC, NARROWFUNC) \ argument
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| H A D | translate-vfp.c | 2255 #define MAKE_ONE_VFM_TRANS_FN(INSN, PREC, NEGN, NEGD) \ argument
2393 #define DO_VFP_2OP(INSN, PREC, FN, CHECK) \ argument
2403 #define DO_VFP_VMOV(INSN, PREC, FN) \ argument
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| H A D | mve_helper.c | 1810 #define DO_DAV_S(INSN, XCHG, EVENACC, ODDACC) \ argument
1815 #define DO_DAV_U(INSN, XCHG, EVENACC, ODDACC) \ argument
1913 #define DO_VMAXMINV_U(INSN, FN) \ argument
1917 #define DO_VMAXMINV_S(INSN, FN) \ argument
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| /openbmc/qemu/tests/tcg/ppc64/ |
| H A D | non_signalling_xscv.c | 6 #define TEST(INSN, B_HI, B_LO, T_HI, T_LO) \ argument
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| H A D | vsx_f2i_nan.c | 11 #define DEFINE_VSX_F2I_FUNC(SRC_T, DEST_T, INSN) \ argument
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| /openbmc/qemu/target/openrisc/ |
| H A D | disas.c | 53 #define INSN(opcode, format, ...) \ macro
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| /openbmc/qemu/tests/tcg/hppa/ |
| H A D | stby.c | 41 #define TEST(INSN, OFS, E) \ argument
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| /openbmc/linux/arch/sparc/kernel/ |
| H A D | visemul.c | 136 #define RS1(INSN) (((INSN) >> 14) & 0x1f) argument
137 #define RS2(INSN) (((INSN) >> 0) & 0x1f) argument
138 #define RD(INSN) (((INSN) >> 25) & 0x1f) argument
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| /openbmc/qemu/target/avr/ |
| H A D | disas.c | 96 #define INSN(opcode, format, ...) \ macro
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| /openbmc/qemu/target/loongarch/ |
| H A D | disas.c | 123 #define output(C, INSN, FMT, ...) \ argument
349 #define INSN(insn, type) \ macro
356 INSN(clo_w, rr) in INSN() function
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| /openbmc/linux/arch/loongarch/include/asm/ |
| H A D | inst.h | 33 #define ADDR_IMM(addr, INSN) \ argument
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| /openbmc/qemu/disas/ |
| H A D | sparc.c | 2265 #define HASH_INSN(INSN) \ argument
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| /openbmc/qemu/target/m68k/ |
| H A D | translate.c | 5774 #define INSN(name, opcode, mask, feature) do { \ in register_m68k_insns() macro
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