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Searched defs:CONFIG_SYS_DDR_SDRAM_CFG2 (Results 1 – 14 of 14) sorted by relevance

/openbmc/u-boot/include/configs/km/
H A Dkm8321-common.h76 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 macro
H A Dkm8309-common.h111 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 macro
/openbmc/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c72 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x24401031 macro
/openbmc/u-boot/include/configs/
H A Dkm8360.h76 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 macro
H A Dmpc8308_p1m.h178 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 /* 1 posted refresh */ macro
H A DMPC8308RDB.h174 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 /* 1 posted refresh */ macro
H A DMPC832XEMDS.h141 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 macro
H A DMPC8323ERDB.h131 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 macro
H A DMPC837XERDB.h195 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00001000 /* 1 posted refresh */ macro
H A DMPC8315ERDB.h148 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 /* 1 posted refresh */ macro
H A DMPC837XEMDS.h170 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00001000 /* 1 posted refresh */ macro
H A Dhrcon.h165 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 /* 1 posted refresh */ macro
H A DMPC8349EMDS.h115 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 macro
H A Dstrider.h165 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 /* 1 posted refresh */ macro