History log of /openbmc/u-boot/drivers/fpga/socfpga.c (Results 1 – 15 of 15)
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Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07
# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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# d024236e 18-Apr-2018 Tom Rini <trini@konsulko.com>

Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR

We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added

Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR

We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Revision tags: v2018.03, v2018.01
# 65972a0b 28-Nov-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-socfpga


Revision tags: v2017.11
# bd08ce8f 25-Sep-2017 Tien Fong Chee <tien.fong.chee@intel.com>

arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes

Existing FPGA program write is always assume RBF data >= 32 bytes, so
any rbf data less than 32 bytes writing to FPGA would be

arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes

Existing FPGA program write is always assume RBF data >= 32 bytes, so
any rbf data less than 32 bytes writing to FPGA would be failed.
This patch enhances the FPGA program write to support rbf data with
size >= 4 bytes.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>

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# 19d1f1a2 29-Jul-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-socfpga


# 6867e19a 26-Jul-2017 Tien Fong Chee <tien.fong.chee@intel.com>

arm: socfpga: Restructure FPGA driver in the preparation to support A10

Move FPGA driver which is Gen5 specific code into Gen5 driver file
and keeping common FPGA driver intact. All the changes are

arm: socfpga: Restructure FPGA driver in the preparation to support A10

Move FPGA driver which is Gen5 specific code into Gen5 driver file
and keeping common FPGA driver intact. All the changes are still keeping
in driver/fpga/ and no functional change. Subsequent patch would move
FPGA manager driver from arch/arm into driver/fpga/.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>

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# 1221ce45 20-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

treewide: replace #include <asm/errno.h> with <linux/errno.h>

Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)

Replace

treewide: replace #include <asm/errno.h> with <linux/errno.h>

Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)

Replace all include directives for <asm/errno.h> with <linux/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>

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Revision tags: v2016.07, openbmc-20160624-1
# 2a5bcaf3 04-Feb-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-socfpga


# a409a8b8 19-Jan-2016 Dinh Nguyen <dinguyen@kernel.org>

Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals"

Apparently, the logic for the FPGA global bit is not universal between Gen5
and Gen10 devices is not the same. Disabling

Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals"

Apparently, the logic for the FPGA global bit is not universal between Gen5
and Gen10 devices is not the same. Disabling this bit, while applicable to
Gen10 devices, will break FPGA programming on Gen5 devices.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

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# b8c5b472 16-Jan-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-socfpga


# b00a21f0 06-Jan-2016 Dinh Nguyen <dinh.linux@gmail.com>

arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

We should be setting the FPGA Interface Group global bit that will correctly
disable all interfaces between the FPGA and HPS.

Si

arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

We should be setting the FPGA Interface Group global bit that will correctly
disable all interfaces between the FPGA and HPS.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

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Revision tags: v2016.01-rc1, v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1
# bfa89d2b 27-Jul-2015 Marek Vasut <marex@denx.de>

arm: socfpga: Fix FPGA bitstream programming routine

In case the FPGA bitstream is aligned to 4 bytes, skip the
part of the assembler which handles unaligned bitstream.
Otherwise, that part will loo

arm: socfpga: Fix FPGA bitstream programming routine

In case the FPGA bitstream is aligned to 4 bytes, skip the
part of the assembler which handles unaligned bitstream.
Otherwise, that part will loop indefinitelly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

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Revision tags: v2015.07, v2015.07-rc3, v2015.07-rc2, v2015.07-rc1, v2015.04, v2015.04-rc5, v2015.04-rc4, v2015.04-rc3, v2015.04-rc2, v2015.04-rc1, v2015.01, v2015.01-rc4, v2015.01-rc3, v2015.01-rc2, v2015.01-rc1, v2014.10
# 790af815 10-Oct-2014 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master' into 'u-boot-arm/master'


Revision tags: v2014.10-rc3
# 04de09f8 06-Oct-2014 Tom Rini <trini@ti.com>

Merge branch 'topic/arm/socfpga-20141006' of git://git.denx.de/u-boot-socfpga

Fix a trivial conflict in dw_mmc.c after talking with Marek.

Conflicts:
drivers/mmc/dw_mmc.c

Signed-off-by: Tom Rini

Merge branch 'topic/arm/socfpga-20141006' of git://git.denx.de/u-boot-socfpga

Fix a trivial conflict in dw_mmc.c after talking with Marek.

Conflicts:
drivers/mmc/dw_mmc.c

Signed-off-by: Tom Rini <trini@ti.com>

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# 230fe9b2 08-Sep-2014 Pavel Machek <pavel@denx.de>

arm: socfpga: fpga: Add SoCFPGA FPGA programming interface

Add code necessary to program the FPGA part of SoCFPGA from U-Boot
with an RBF blob. This patch also integrates the code into the
FPGA driv

arm: socfpga: fpga: Add SoCFPGA FPGA programming interface

Add code necessary to program the FPGA part of SoCFPGA from U-Boot
with an RBF blob. This patch also integrates the code into the
FPGA driver framework in U-Boot so it can be used via the 'fpga'
command.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>

V2: Move the not-CPU specific stuff into drivers/fpga/ and base
this on the cleaned up altera FPGA support.

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