Revision tags: v9.2.0, v9.1.2 |
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2c471a82 |
| 18-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-request-2024-11-18' of https://gitlab.com/thuth/qemu into staging
* Fixes & doc updates for the new "boot order" s390x bios feature * Provide a "loadparm" property for scsi-hd & scsi
Merge tag 'pull-request-2024-11-18' of https://gitlab.com/thuth/qemu into staging
* Fixes & doc updates for the new "boot order" s390x bios feature * Provide a "loadparm" property for scsi-hd & scsi-cd devices on s390x (required for the "boot order" feature) * Fix the floating-point multiply-and-add NaN rules on s390x * Raise timeout on cross-accel build jobs to 60m
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* tag 'pull-request-2024-11-18' of https://gitlab.com/thuth/qemu: .gitlab-ci.d: Raise timeout on cross-accel build jobs to 60m pc-bios: Update the s390 bios images with the recent fixes pc-bios/s390-ccw: Re-initialize receive queue index before each boot attempt pc-bios/s390x: Initialize machine loadparm before probing IPL devices pc-bios/s390x: Initialize cdrom type to false for each IPL device hw: Add "loadparm" property to scsi disk devices for booting on s390x hw/s390x: Restrict "loadparm" property to devices that can be used for booting docs/system/bootindex: Make it clear that s390x can also boot from virtio-net docs/system/s390x/bootdevices: Update loadparm documentation tests/tcg/s390x: Add the floating-point multiply-and-add test target/s390x: Fix the floating-point multiply-and-add NaN rules hw/usb: Use __attribute__((packed)) vs __packed
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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e1f1ccb8 |
| 22-Oct-2024 |
Ilya Leoshkevich <iii@linux.ibm.com> |
target/s390x: Fix the floating-point multiply-and-add NaN rules
Order the helper arguments to match the Principles of Operation. Implement the "Results: MULTIPLY AND ADD" table in pickNaNMulAdd().
target/s390x: Fix the floating-point multiply-and-add NaN rules
Order the helper arguments to match the Principles of Operation. Implement the "Results: MULTIPLY AND ADD" table in pickNaNMulAdd().
Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20241023000147.34035-2-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
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f15f7273 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20241105' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Fix MMU indexes for AArch32 Secure PL1&0 in a less complex and buggy way *
Merge tag 'pull-target-arm-20241105' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Fix MMU indexes for AArch32 Secure PL1&0 in a less complex and buggy way * Fix SVE SDOT/UDOT/USDOT (4-way, indexed) * softfloat: set 2-operand NaN propagation rule at runtime * disas: Fix build against Capstone v6 (again) * hw/rtc/ds1338: Trace send and receive operations * hw/timer/imx_gpt: Convert DPRINTF to trace events * hw/watchdog/wdt_imx2: Remove redundant assignment * hw/sensor/tmp105: Convert printf() to trace event, add tracing for read/write access * hw/net/npcm_gmac: Change error log to trace event * target/arm: Enable FEAT_CMOW for -cpu max
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* tag 'pull-target-arm-20241105' of https://git.linaro.org/people/pmaydell/qemu-arm: (31 commits) target/arm: Enable FEAT_CMOW for -cpu max hw/net/npcm_gmac: Change error log to trace event hw/sensor/tmp105: Convert printf() to trace event, add tracing for read/write access hw/watchdog/wdt_imx2: Remove redundant assignment hw/timer/imx_gpt: Convert DPRINTF to trace events hw/rtc/ds1338: Trace send and receive operations disas: Fix build against Capstone v6 (again) target/arm: Fix SVE SDOT/UDOT/USDOT (4-way, indexed) target/arm: Add new MMU indexes for AArch32 Secure PL1&0 Revert "target/arm: Fix usage of MMU indexes when EL3 is AArch32" softfloat: Remove fallback rule from pickNaN() target/rx: Explicitly set 2-NaN propagation rule target/openrisc: Explicitly set 2-NaN propagation rule target/microblaze: Explicitly set 2-NaN propagation rule target/microblaze: Move setting of float rounding mode to reset target/alpha: Explicitly set 2-NaN propagation rule target/i386: Set 2-NaN propagation rule explicitly target/xtensa: Explicitly set 2-NaN propagation rule target/xtensa: Factor out calls to set_use_first_nan() target/sparc: Explicitly set 2-NaN propagation rule ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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bc0b360d |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Remove fallback rule from pickNaN()
Now that all targets have been converted to explicitly set a NaN propagation rule, we can remove the set of target ifdefs (which now list every target)
softfloat: Remove fallback rule from pickNaN()
Now that all targets have been converted to explicitly set a NaN propagation rule, we can remove the set of target ifdefs (which now list every target) and clean up the references to fallback behaviour for float_2nan_prop_none.
The "default" case in the switch will catch any remaining places where status->float_2nan_prop_rule was not set by the target.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-22-peter.maydell@linaro.org
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ba655846 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/rx: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly for the float_status word used in the rx target.
This not the architecturally correct behaviour, but since t
target/rx: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly for the float_status word used in the rx target.
This not the architecturally correct behaviour, but since this is a no-behaviour-change patch, we leave a TODO note to that effect.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-21-peter.maydell@linaro.org
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355e6cfb |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/openrisc: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly for the float_status word used in the openrisc target.
Signed-off-by: Peter Maydell <peter.maydell@lin
target/openrisc: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly for the float_status word used in the openrisc target.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-20-peter.maydell@linaro.org
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4fafdcc8 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/microblaze: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly for the float_status word used in the microblaze target.
This is probably not the architecturally co
target/microblaze: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly for the float_status word used in the microblaze target.
This is probably not the architecturally correct behaviour, but since this is a no-behaviour-change patch, we leave a TODO note to that effect.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-19-peter.maydell@linaro.org
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8403a501 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/alpha: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly for the float_status word used in this target.
This is a no-behaviour-change commit, so we retain the exi
target/alpha: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly for the float_status word used in this target.
This is a no-behaviour-change commit, so we retain the existing behaviour of x87-style pick-largest-significand NaN propagation. This is however not the architecturally correct handling, so we leave a TODO note to that effect.
We also leave a TODO note pointing out that all this code in the cpu initfn (including the existing setting up of env->flags and the FPCR) should be in a currently non-existent CPU reset function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-17-peter.maydell@linaro.org
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62d39b28 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/i386: Set 2-NaN propagation rule explicitly
Set the NaN propagation rule explicitly for the float_status words used in the x86 target.
This is a no-behaviour-change commit, so we retain the
target/i386: Set 2-NaN propagation rule explicitly
Set the NaN propagation rule explicitly for the float_status words used in the x86 target.
This is a no-behaviour-change commit, so we retain the existing behaviour of using the x87-style "prefer QNaN over SNaN, then prefer the NaN with the larger significand" for MMX and SSE. This is however not the documented hardware behaviour, so we leave a TODO note about what we should be doing instead.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-16-peter.maydell@linaro.org
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8d988eb4 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/xtensa: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly in xtensa_use_first_nan().
(When we convert the softfloat pickNaNMulAdd routine to also select a NaN pro
target/xtensa: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly in xtensa_use_first_nan().
(When we convert the softfloat pickNaNMulAdd routine to also select a NaN propagation rule at runtime, we will be able to remove the use_first_nan flag because the propagation rules will handle everything.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-15-peter.maydell@linaro.org
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4482f32d |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/sparc: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly in the float_status words we use.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Mark
target/sparc: Explicitly set 2-NaN propagation rule
Set the NaN propagation rule explicitly in the float_status words we use.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-13-peter.maydell@linaro.org
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0527cfd9 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/m68k: Explicitly set 2-NaN propagation rule
Explicitly set the 2-NaN propagation rule on env->fp_status and on the temporary fp_status that we use in frem (since we pass that to a division op
target/m68k: Explicitly set 2-NaN propagation rule
Explicitly set the 2-NaN propagation rule on env->fp_status and on the temporary fp_status that we use in frem (since we pass that to a division operation function).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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5aaab56a |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/ppc: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in env->fp_status and env->vec_status.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-b
target/ppc: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in env->fp_status and env->vec_status.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-9-peter.maydell@linaro.org
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841f9d74 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/s390x: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in env->fpu_status.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Ilya Leoshkevi
target/s390x: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in env->fpu_status.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-8-peter.maydell@linaro.org
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2915876e |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/hppa: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in env->fp_status.
Really we only need to do this at CPU reset (after reset has zeroed out most of the C
target/hppa: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in env->fp_status.
Really we only need to do this at CPU reset (after reset has zeroed out most of the CPU state struct, which typically includes fp_status fields). However target/hppa does not currently implement CPU reset at all, so leave a TODO comment to note that this could be moved if we ever do implement reset.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-7-peter.maydell@linaro.org
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1bb5257d |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/loongarch: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in the float_status word we use.
(There are a couple of places in fpu_helper.c where we create a du
target/loongarch: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in the float_status word we use.
(There are a couple of places in fpu_helper.c where we create a dummy float_status word with "float_status *s = { };", but these are only used for calling float*_is_quiet_nan() so it doesn't matter that we don't set a 2-NaN propagation rule there.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-6-peter.maydell@linaro.org
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0c587f13 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/mips: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in the float_status words we use.
For active_fpu.fp_status, we do this in a new fp_reset() function whic
target/mips: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in the float_status words we use.
For active_fpu.fp_status, we do this in a new fp_reset() function which mirrors the existing msa_reset() function in doing "first call restore to set the fp status parts that depend on CPU state, then set the fp status parts that are constant".
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241025141254.2141506-5-peter.maydell@linaro.org
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d1ff9967 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
target/arm: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in the float_status words we use. We wrap this plus the pre-existing setting of the tininess-before-round
target/arm: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in the float_status words we use. We wrap this plus the pre-existing setting of the tininess-before-rounding flag in a new function arm_set_default_fp_behaviours() to avoid repetition, since we have a lot of float_status words at this point.
The situation with FPA11 emulation in linux-user is a little odd, and arguably "correct" behaviour there would be to exactly match a real Linux kernel's FPA11 emulation. However FPA11 emulation is essentially dead at this point and so it seems better to continue with QEMU's current behaviour and leave a comment describing the situation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-4-peter.maydell@linaro.org
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8a132968 |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Allow 2-operand NaN propagation rule to be set at runtime
IEEE 758 does not define a fixed rule for which NaN to pick as the result if both operands of a 2-operand operation are NaNs. As
softfloat: Allow 2-operand NaN propagation rule to be set at runtime
IEEE 758 does not define a fixed rule for which NaN to pick as the result if both operands of a 2-operand operation are NaNs. As a result different architectures have ended up with different rules for propagating NaNs.
QEMU currently hardcodes the NaN propagation logic into the binary because pickNaN() has an ifdef ladder for different targets. We want to make the propagation rule instead be selectable at runtime, because: * this will let us have multiple targets in one QEMU binary * the Arm FEAT_AFP architectural feature includes letting the guest select a NaN propagation rule at runtime * x86 specifies different propagation rules for x87 FPU ops and for SSE ops, and specifying the rule in the float_status would let us emulate this, instead of wrongly using the x87 rules everywhere
In this commit we add an enum for the propagation rule, the field in float_status, and the corresponding getters and setters. We change pickNaN to honour this, but because all targets still leave this field at its default 0 value, the fallback logic will pick the rule type with the old ifdef ladder.
It's valid not to set a propagation rule if default_nan_mode is enabled, because in that case there's no need to pick a NaN; all the callers of pickNaN() catch this case and skip calling it. So we can already assert that we don't get into the "no rule defined" codepath for our four targets which always set default_nan_mode: Hexagon, RiscV, SH4 and Tricore, and for the one target which does not have FP at all: avr. These targets will not need to be updated to call set_float_2nan_prop_rule().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-2-peter.maydell@linaro.org
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Revision tags: v9.1.1 |
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ea9cdbcf |
| 15-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'hw-misc-20240913' of https://github.com/philmd/qemu into staging
Misc HW & UI patches
- Remove deprecated SH4 SHIX machine TC58128 NAND EEPROM (Phil) - Remove deprecated CRIS target (Phi
Merge tag 'hw-misc-20240913' of https://github.com/philmd/qemu into staging
Misc HW & UI patches
- Remove deprecated SH4 SHIX machine TC58128 NAND EEPROM (Phil) - Remove deprecated CRIS target (Phil) - Remove deprecated RISC-V 'any' CPU type (Phil) - Add fifo8_peek_buf() to correctly handle FIFO wraparound (Mark) - Minor cleanups in Designware PCIe, PL011 and loongson IPI models (Phil) - Fixes in TI TMP105 temperature (Guenter) - Convert Sun ESCC and ADB mouses to QemuInputHandler (Mark) - Prevent heap overflow in VIRTIO sound device (Volker) - Cleanups around g_assert_not_reached() call (Pierrick) - Add Clément as VT-d reviewer (Clément) - Prevent stuck modifier keys and unexpected text input on Windows (Volker) - Explicitly set SDL2 swap interval when OpenGL is enabled (Gert)
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* tag 'hw-misc-20240913' of https://github.com/philmd/qemu: (60 commits) ui: remove break after g_assert_not_reached() ui/sdl2: set swap interval explicitly when OpenGL is enabled ui/sdl2: ignore GUI keys in SDL_TEXTINPUT handler ui/sdl2: release all modifiers system: replace assert(0) with g_assert_not_reached() hw/pci-host: remove break after g_assert_not_reached() hw/misc: remove break after g_assert_not_reached() hw/gpio: remove break after g_assert_not_reached() hw/watchdog: replace assert(0) with g_assert_not_reached() hw/core: replace assert(0) with g_assert_not_reached() hw/char: replace assert(0) with g_assert_not_reached() hw/input/adb-mouse: convert to use QemuInputHandler hw/char/escc: convert Sun mouse to use QemuInputHandler hw/sensor/tmp105: Lower 4 bit of limit registers are always 0 hw/sensor/tmp105: OS (one-shot) bit in config register always returns 0 hw/sensor/tmp105: Pass 'oneshot' argument to tmp105_alarm_update() hw/sensor/tmp105: Use registerfields API hw/sensor/tmp105: Coding style fixes tests/unit: Comment FIFO8 tests tests/unit: Expand test_fifo8_peek_buf_wrap() coverage ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v9.1.0 |
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44e4075b |
| 24-Jul-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/cris: Remove the deprecated CRIS target
The CRIS target is deprecated since v9.0 (commit c7bbef40234 "docs: mark CRIS support as deprecated").
Signed-off-by: Philippe Mathieu-Daudé <philmd@l
target/cris: Remove the deprecated CRIS target
The CRIS target is deprecated since v9.0 (commit c7bbef40234 "docs: mark CRIS support as deprecated").
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-ID: <20240904143603.52934-14-philmd@linaro.org>
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#
535ad16c |
| 05-Jun-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-sp-20240605' of https://gitlab.com/rth7680/qemu into staging
target/sparc: Implement FMAF, IMA, VIS3 and VIS4 extensions linux-user: Add ioctl for BLKBSZSET
# -----BEGIN PGP SIGNATU
Merge tag 'pull-sp-20240605' of https://gitlab.com/rth7680/qemu into staging
target/sparc: Implement FMAF, IMA, VIS3 and VIS4 extensions linux-user: Add ioctl for BLKBSZSET
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* tag 'pull-sp-20240605' of https://gitlab.com/rth7680/qemu: (38 commits) target/sparc: Enable VIS4 feature bit target/sparc: Implement monitor ASIs target/sparc: Implement MWAIT target/sparc: Implement SUBXC, SUBXCcc target/sparc: Implement FPMIN, FPMAX target/sparc: Implement VIS4 comparisons target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS target/sparc: Implement FALIGNDATAi target/sparc: Add feature bit for VIS4 target/sparc: Implement IMA extension target/sparc: Enable VIS3 feature bit target/sparc: Implement XMULX target/sparc: Implement UMULXHI target/sparc: Implement PDISTN target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd target/sparc: Implement LZCNT target/sparc: Implement LDXEFSR target/sparc: Implement FSLL, FSRL, FSRA, FSLAS target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8 target/sparc: Implement FPADDS, FPSUBS ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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4fd71d19 |
| 04-Nov-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Implement FMAf extension
Rearrange PDIST so that do_dddd is general purpose and may be re-used for FMADDd etc. Add pickNaN and pickNaNMulAdd.
Signed-off-by: Richard Henderson <richar
target/sparc: Implement FMAf extension
Rearrange PDIST so that do_dddd is general purpose and may be re-used for FMADDd etc. Add pickNaN and pickNaNMulAdd.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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85b59741 |
| 24-Apr-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'housekeeping-20240424' of https://github.com/philmd/qemu into staging
Removal of deprecated code
- Remove the Nios II target and hardware - Remove pvrdma device and rdmacm-mux helper - R
Merge tag 'housekeeping-20240424' of https://github.com/philmd/qemu into staging
Removal of deprecated code
- Remove the Nios II target and hardware - Remove pvrdma device and rdmacm-mux helper - Remove GlusterFS RDMA protocol handling - Update Sriram Yagnaraman mail address
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* tag 'housekeeping-20240424' of https://github.com/philmd/qemu: block/gluster: Remove deprecated RDMA protocol handling hw/rdma: Remove deprecated pvrdma device and rdmacm-mux helper hw/timer: Remove the ALTERA_TIMER model target/nios2: Remove the deprecated Nios II target MAINTAINERS: Update Sriram Yagnaraman mail address
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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6c301485 |
| 27-Mar-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/nios2: Remove the deprecated Nios II target
The Nios II target is deprecated since v8.2 in commit 9997771bc1 ("target/nios2: Deprecate the Nios II architecture").
Remove: - Buildsys / CI inf
target/nios2: Remove the deprecated Nios II target
The Nios II target is deprecated since v8.2 in commit 9997771bc1 ("target/nios2: Deprecate the Nios II architecture").
Remove: - Buildsys / CI infra - User emulation - System emulation (10m50-ghrd & nios2-generic-nommu machines) - Tests
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Marek Vasut <marex@denx.de> Message-Id: <20240327144806.11319-3-philmd@linaro.org>
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