pinctrl-intel.h (e5a4ab6a55e2308aad546b594c0d8e5b71d21be9) pinctrl-intel.h (9bd59157e16c64b45da5315f5b49b659fe51984b)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Core pinctrl/GPIO driver for Intel GPIO controllers
4 *
5 * Copyright (C) 2015, Intel Corporation
6 * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
7 * Mika Westerberg <mika.westerberg@linux.intel.com>
8 */

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65 unsigned int size;
66 int gpio_base;
67 unsigned int padown_num;
68};
69
70/**
71 * enum - Special treatment for GPIO base in pad group
72 *
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Core pinctrl/GPIO driver for Intel GPIO controllers
4 *
5 * Copyright (C) 2015, Intel Corporation
6 * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
7 * Mika Westerberg <mika.westerberg@linux.intel.com>
8 */

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65 unsigned int size;
66 int gpio_base;
67 unsigned int padown_num;
68};
69
70/**
71 * enum - Special treatment for GPIO base in pad group
72 *
73 * @INTEL_GPIO_BASE_ZERO: force GPIO base to be 0
73 * @INTEL_GPIO_BASE_NOMAP: no GPIO mapping should be created
74 * @INTEL_GPIO_BASE_MATCH: matches with starting pin number
75 */
76enum {
74 * @INTEL_GPIO_BASE_NOMAP: no GPIO mapping should be created
75 * @INTEL_GPIO_BASE_MATCH: matches with starting pin number
76 */
77enum {
78 INTEL_GPIO_BASE_ZERO = -2,
77 INTEL_GPIO_BASE_NOMAP = -1,
78 INTEL_GPIO_BASE_MATCH = 0,
79};
80
81/**
82 * struct intel_community - Intel pin community description
83 * @barno: MMIO BAR number where registers for this community reside
84 * @padown_offset: Register offset of PAD_OWN register from @regs. If %0

--- 161 unchanged lines hidden --- 		79 INTEL_GPIO_BASE_NOMAP = -1,
80 INTEL_GPIO_BASE_MATCH = 0,
81};
82
83/**
84 * struct intel_community - Intel pin community description
85 * @barno: MMIO BAR number where registers for this community reside
86 * @padown_offset: Register offset of PAD_OWN register from @regs. If %0

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