sky2.c (98014be39bda8277a5ad130bb274ed6eb18b74df) sky2.c (ec2a5466b3ce680c92e8e05617b020fd825854b9)
1/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *

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1105
1106static void tx_init(struct sky2_port *sky2)
1107{
1108 struct sky2_tx_le *le;
1109
1110 sky2->tx_prod = sky2->tx_cons = 0;
1111 sky2->tx_tcpsum = 0;
1112 sky2->tx_last_mss = 0;
1/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *

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1105
1106static void tx_init(struct sky2_port *sky2)
1107{
1108 struct sky2_tx_le *le;
1109
1110 sky2->tx_prod = sky2->tx_cons = 0;
1111 sky2->tx_tcpsum = 0;
1112 sky2->tx_last_mss = 0;
1113 netdev_reset_queue(sky2->netdev);
1113
1114 le = get_tx_le(sky2, &sky2->tx_prod);
1115 le->addr = 0;
1116 le->opcode = OP_ADDR64 | HW_OWNER;
1117 sky2->tx_last_upper = 0;
1118}
1119
1120/* Update chip's next pointer */

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1279 * Fixed initial key as seed to RSS.
1280 */
1281static const uint32_t rss_init_key[10] = {
1282 0x7c3351da, 0x51c5cf4e, 0x44adbdd1, 0xe8d38d18, 0x48897c43,
1283 0xb1d60e7e, 0x6a3dd760, 0x01a2e453, 0x16f46f13, 0x1a0e7b30
1284};
1285
1286/* Enable/disable receive hash calculation (RSS) */
1114
1115 le = get_tx_le(sky2, &sky2->tx_prod);
1116 le->addr = 0;
1117 le->opcode = OP_ADDR64 | HW_OWNER;
1118 sky2->tx_last_upper = 0;
1119}
1120
1121/* Update chip's next pointer */

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1280 * Fixed initial key as seed to RSS.
1281 */
1282static const uint32_t rss_init_key[10] = {
1283 0x7c3351da, 0x51c5cf4e, 0x44adbdd1, 0xe8d38d18, 0x48897c43,
1284 0xb1d60e7e, 0x6a3dd760, 0x01a2e453, 0x16f46f13, 0x1a0e7b30
1285};
1286
1287/* Enable/disable receive hash calculation (RSS) */
1287static void rx_set_rss(struct net_device *dev, u32 features)
1288static void rx_set_rss(struct net_device *dev, netdev_features_t features)
1288{
1289 struct sky2_port *sky2 = netdev_priv(dev);
1290 struct sky2_hw *hw = sky2->hw;
1291 int i, nkeys = 4;
1292
1293 /* Supports IPv6 and other modes */
1294 if (hw->flags & SKY2_HW_NEW_LE) {
1295 nkeys = 10;

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1397 spin_unlock_bh(&sky2->phy_lock);
1398 break;
1399 }
1400 return err;
1401}
1402
1403#define SKY2_VLAN_OFFLOADS (NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO)
1404
1289{
1290 struct sky2_port *sky2 = netdev_priv(dev);
1291 struct sky2_hw *hw = sky2->hw;
1292 int i, nkeys = 4;
1293
1294 /* Supports IPv6 and other modes */
1295 if (hw->flags & SKY2_HW_NEW_LE) {
1296 nkeys = 10;

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1398 spin_unlock_bh(&sky2->phy_lock);
1399 break;
1400 }
1401 return err;
1402}
1403
1404#define SKY2_VLAN_OFFLOADS (NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO)
1405
1405static void sky2_vlan_mode(struct net_device *dev, u32 features)
1406static void sky2_vlan_mode(struct net_device *dev, netdev_features_t features)
1406{
1407 struct sky2_port *sky2 = netdev_priv(dev);
1408 struct sky2_hw *hw = sky2->hw;
1409 u16 port = sky2->port;
1410
1411 if (features & NETIF_F_HW_VLAN_RX)
1412 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1413 RX_VLAN_STRIP_ON);

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1966 re->skb = skb;
1967 le->ctrl |= EOP;
1968
1969 sky2->tx_prod = slot;
1970
1971 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1972 netif_stop_queue(dev);
1973
1407{
1408 struct sky2_port *sky2 = netdev_priv(dev);
1409 struct sky2_hw *hw = sky2->hw;
1410 u16 port = sky2->port;
1411
1412 if (features & NETIF_F_HW_VLAN_RX)
1413 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1414 RX_VLAN_STRIP_ON);

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1967 re->skb = skb;
1968 le->ctrl |= EOP;
1969
1970 sky2->tx_prod = slot;
1971
1972 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1973 netif_stop_queue(dev);
1974
1975 netdev_sent_queue(dev, skb->len);
1974 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
1975
1976 return NETDEV_TX_OK;
1977
1978mapping_unwind:
1979 for (i = sky2->tx_prod; i != slot; i = RING_NEXT(i, sky2->tx_ring_size)) {
1980 re = sky2->tx_ring + i;
1981

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1997 * buffers so make sure not to free skb to early.
1998 * 2. This may run in parallel start_xmit because the it only
1999 * looks at the tail of the queue of FIFO (tx_cons), not
2000 * the head (tx_prod)
2001 */
2002static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
2003{
2004 struct net_device *dev = sky2->netdev;
1976 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
1977
1978 return NETDEV_TX_OK;
1979
1980mapping_unwind:
1981 for (i = sky2->tx_prod; i != slot; i = RING_NEXT(i, sky2->tx_ring_size)) {
1982 re = sky2->tx_ring + i;
1983

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1999 * buffers so make sure not to free skb to early.
2000 * 2. This may run in parallel start_xmit because the it only
2001 * looks at the tail of the queue of FIFO (tx_cons), not
2002 * the head (tx_prod)
2003 */
2004static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
2005{
2006 struct net_device *dev = sky2->netdev;
2005 unsigned idx;
2007 u16 idx;
2008 unsigned int bytes_compl = 0, pkts_compl = 0;
2006
2007 BUG_ON(done >= sky2->tx_ring_size);
2008
2009 for (idx = sky2->tx_cons; idx != done;
2010 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
2011 struct tx_ring_info *re = sky2->tx_ring + idx;
2012 struct sk_buff *skb = re->skb;
2013
2014 sky2_tx_unmap(sky2->hw->pdev, re);
2015
2016 if (skb) {
2017 netif_printk(sky2, tx_done, KERN_DEBUG, dev,
2018 "tx done %u\n", idx);
2019
2009
2010 BUG_ON(done >= sky2->tx_ring_size);
2011
2012 for (idx = sky2->tx_cons; idx != done;
2013 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
2014 struct tx_ring_info *re = sky2->tx_ring + idx;
2015 struct sk_buff *skb = re->skb;
2016
2017 sky2_tx_unmap(sky2->hw->pdev, re);
2018
2019 if (skb) {
2020 netif_printk(sky2, tx_done, KERN_DEBUG, dev,
2021 "tx done %u\n", idx);
2022
2020 u64_stats_update_begin(&sky2->tx_stats.syncp);
2021 ++sky2->tx_stats.packets;
2022 sky2->tx_stats.bytes += skb->len;
2023 u64_stats_update_end(&sky2->tx_stats.syncp);
2023 pkts_compl++;
2024 bytes_compl += skb->len;
2024
2025 re->skb = NULL;
2026 dev_kfree_skb_any(skb);
2027
2028 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size);
2029 }
2030 }
2031
2032 sky2->tx_cons = idx;
2033 smp_mb();
2025
2026 re->skb = NULL;
2027 dev_kfree_skb_any(skb);
2028
2029 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size);
2030 }
2031 }
2032
2033 sky2->tx_cons = idx;
2034 smp_mb();
2035
2036 netdev_completed_queue(dev, pkts_compl, bytes_compl);
2037
2038 u64_stats_update_begin(&sky2->tx_stats.syncp);
2039 sky2->tx_stats.packets += pkts_compl;
2040 sky2->tx_stats.bytes += bytes_compl;
2041 u64_stats_update_end(&sky2->tx_stats.syncp);
2034}
2035
2036static void sky2_tx_reset(struct sky2_hw *hw, unsigned port)
2037{
2038 /* Disable Force Sync bit and Enable Alloc bit */
2039 sky2_write8(hw, SK_REG(port, TXA_CTRL),
2040 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
2041

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3638 return 0;
3639}
3640
3641static void sky2_get_drvinfo(struct net_device *dev,
3642 struct ethtool_drvinfo *info)
3643{
3644 struct sky2_port *sky2 = netdev_priv(dev);
3645
2042}
2043
2044static void sky2_tx_reset(struct sky2_hw *hw, unsigned port)
2045{
2046 /* Disable Force Sync bit and Enable Alloc bit */
2047 sky2_write8(hw, SK_REG(port, TXA_CTRL),
2048 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
2049

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3646 return 0;
3647}
3648
3649static void sky2_get_drvinfo(struct net_device *dev,
3650 struct ethtool_drvinfo *info)
3651{
3652 struct sky2_port *sky2 = netdev_priv(dev);
3653
3646 strcpy(info->driver, DRV_NAME);
3647 strcpy(info->version, DRV_VERSION);
3648 strcpy(info->fw_version, "N/A");
3649 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3654 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
3655 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
3656 strlcpy(info->bus_info, pci_name(sky2->hw->pdev),
3657 sizeof(info->bus_info));
3650}
3651
3652static const struct sky2_stat {
3653 char name[ETH_GSTRING_LEN];
3654 u16 offset;
3655} sky2_stats[] = {
3656 { "tx_bytes", GM_TXO_OK_HI },
3657 { "rx_bytes", GM_RXO_OK_HI },

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4306
4307 /* Partial writes not supported */
4308 if ((eeprom->offset & 3) || (eeprom->len & 3))
4309 return -EINVAL;
4310
4311 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len);
4312}
4313
3658}
3659
3660static const struct sky2_stat {
3661 char name[ETH_GSTRING_LEN];
3662 u16 offset;
3663} sky2_stats[] = {
3664 { "tx_bytes", GM_TXO_OK_HI },
3665 { "rx_bytes", GM_RXO_OK_HI },

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4314
4315 /* Partial writes not supported */
4316 if ((eeprom->offset & 3) || (eeprom->len & 3))
4317 return -EINVAL;
4318
4319 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len);
4320}
4321
4314static u32 sky2_fix_features(struct net_device *dev, u32 features)
4322static netdev_features_t sky2_fix_features(struct net_device *dev,
4323 netdev_features_t features)
4315{
4316 const struct sky2_port *sky2 = netdev_priv(dev);
4317 const struct sky2_hw *hw = sky2->hw;
4318
4319 /* In order to do Jumbo packets on these chips, need to turn off the
4320 * transmit store/forward. Therefore checksum offload won't work.
4321 */
4322 if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U) {

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4330 (sky2->hw->flags & SKY2_HW_RSS_CHKSUM)) {
4331 netdev_info(dev, "receive hashing forces receive checksum\n");
4332 features |= NETIF_F_RXCSUM;
4333 }
4334
4335 return features;
4336}
4337
4324{
4325 const struct sky2_port *sky2 = netdev_priv(dev);
4326 const struct sky2_hw *hw = sky2->hw;
4327
4328 /* In order to do Jumbo packets on these chips, need to turn off the
4329 * transmit store/forward. Therefore checksum offload won't work.
4330 */
4331 if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U) {

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4339 (sky2->hw->flags & SKY2_HW_RSS_CHKSUM)) {
4340 netdev_info(dev, "receive hashing forces receive checksum\n");
4341 features |= NETIF_F_RXCSUM;
4342 }
4343
4344 return features;
4345}
4346
4338static int sky2_set_features(struct net_device *dev, u32 features)
4347static int sky2_set_features(struct net_device *dev, netdev_features_t features)
4339{
4340 struct sky2_port *sky2 = netdev_priv(dev);
4348{
4349 struct sky2_port *sky2 = netdev_priv(dev);
4341 u32 changed = dev->features ^ features;
4350 netdev_features_t changed = dev->features ^ features;
4342
4343 if (changed & NETIF_F_RXCSUM) {
4351
4352 if (changed & NETIF_F_RXCSUM) {
4344 u32 on = features & NETIF_F_RXCSUM;
4353 bool on = features & NETIF_F_RXCSUM;
4345 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
4346 on ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
4347 }
4348
4349 if (changed & NETIF_F_RXHASH)
4350 rx_set_rss(dev, features);
4351
4352 if (changed & (NETIF_F_HW_VLAN_TX|NETIF_F_HW_VLAN_RX))

--- 825 unchanged lines hidden --- 		4354 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
4355 on ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
4356 }
4357
4358 if (changed & NETIF_F_RXHASH)
4359 rx_set_rss(dev, features);
4360
4361 if (changed & (NETIF_F_HW_VLAN_TX|NETIF_F_HW_VLAN_RX))

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