init.c (1ab5a15334529d3980a85abb2e06498c8e5ac8cc) | init.c (56fb79514c52947107001ff9313870d76c4c8008) |
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1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. 4 * Author: Joerg Roedel <jroedel@suse.de> 5 * Leo Duran <leo.duran@amd.com> 6 */ 7 8#define pr_fmt(fmt) "AMD-Vi: " fmt --- 975 unchanged lines hidden (view full) --- 984{ 985 if (!iommu_feature(iommu, FEATURE_GT)) 986 return; 987 988 iommu_feature_enable(iommu, CONTROL_GT_EN); 989} 990 991/* sets a specific bit in the device table entry. */ | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. 4 * Author: Joerg Roedel <jroedel@suse.de> 5 * Leo Duran <leo.duran@amd.com> 6 */ 7 8#define pr_fmt(fmt) "AMD-Vi: " fmt --- 975 unchanged lines hidden (view full) --- 984{ 985 if (!iommu_feature(iommu, FEATURE_GT)) 986 return; 987 988 iommu_feature_enable(iommu, CONTROL_GT_EN); 989} 990 991/* sets a specific bit in the device table entry. */ |
992static void set_dev_entry_bit(u16 devid, u8 bit) | 992static void __set_dev_entry_bit(struct dev_table_entry *dev_table, 993 u16 devid, u8 bit) |
993{ 994 int i = (bit >> 6) & 0x03; 995 int _bit = bit & 0x3f; 996 | 994{ 995 int i = (bit >> 6) & 0x03; 996 int _bit = bit & 0x3f; 997 |
997 amd_iommu_dev_table[devid].data[i] |= (1UL << _bit); | 998 dev_table[devid].data[i] |= (1UL << _bit); |
998} 999 | 999} 1000 |
1000static int get_dev_entry_bit(u16 devid, u8 bit) | 1001static void set_dev_entry_bit(struct amd_iommu *iommu, u16 devid, u8 bit) |
1001{ | 1002{ |
1003 struct dev_table_entry *dev_table = get_dev_table(iommu); 1004 1005 return __set_dev_entry_bit(dev_table, devid, bit); 1006} 1007 1008static int __get_dev_entry_bit(struct dev_table_entry *dev_table, 1009 u16 devid, u8 bit) 1010{ |
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1002 int i = (bit >> 6) & 0x03; 1003 int _bit = bit & 0x3f; 1004 | 1011 int i = (bit >> 6) & 0x03; 1012 int _bit = bit & 0x3f; 1013 |
1005 return (amd_iommu_dev_table[devid].data[i] & (1UL << _bit)) >> _bit; | 1014 return (dev_table[devid].data[i] & (1UL << _bit)) >> _bit; |
1006} 1007 | 1015} 1016 |
1017static int get_dev_entry_bit(struct amd_iommu *iommu, u16 devid, u8 bit) 1018{ 1019 struct dev_table_entry *dev_table = get_dev_table(iommu); |
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1008 | 1020 |
1021 return __get_dev_entry_bit(dev_table, devid, bit); 1022} 1023 |
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1009static bool __copy_device_table(struct amd_iommu *iommu) 1010{ 1011 u64 int_ctl, int_tab_len, entry = 0; 1012 struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg; 1013 struct dev_table_entry *old_devtb = NULL; 1014 u32 lo, hi, devid, old_devtb_size; 1015 phys_addr_t old_devtb_phys; 1016 u16 dom_id, dte_v, irq_v; --- 101 unchanged lines hidden (view full) --- 1118 return false; 1119 break; 1120 } 1121 } 1122 1123 return true; 1124} 1125 | 1024static bool __copy_device_table(struct amd_iommu *iommu) 1025{ 1026 u64 int_ctl, int_tab_len, entry = 0; 1027 struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg; 1028 struct dev_table_entry *old_devtb = NULL; 1029 u32 lo, hi, devid, old_devtb_size; 1030 phys_addr_t old_devtb_phys; 1031 u16 dom_id, dte_v, irq_v; --- 101 unchanged lines hidden (view full) --- 1133 return false; 1134 break; 1135 } 1136 } 1137 1138 return true; 1139} 1140 |
1126void amd_iommu_apply_erratum_63(u16 devid) | 1141void amd_iommu_apply_erratum_63(struct amd_iommu *iommu, u16 devid) |
1127{ 1128 int sysmgt; 1129 | 1142{ 1143 int sysmgt; 1144 |
1130 sysmgt = get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1) | 1131 (get_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2) << 1); | 1145 sysmgt = get_dev_entry_bit(iommu, devid, DEV_ENTRY_SYSMGT1) | 1146 (get_dev_entry_bit(iommu, devid, DEV_ENTRY_SYSMGT2) << 1); |
1132 1133 if (sysmgt == 0x01) | 1147 1148 if (sysmgt == 0x01) |
1134 set_dev_entry_bit(devid, DEV_ENTRY_IW); | 1149 set_dev_entry_bit(iommu, devid, DEV_ENTRY_IW); |
1135} 1136 1137/* Writes the specific IOMMU for a device into the rlookup table */ 1138static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) 1139{ 1140 iommu->pci_seg->rlookup_table[devid] = iommu; 1141} 1142 1143/* 1144 * This function takes the device specific flags read from the ACPI 1145 * table and sets up the device table entry with that information 1146 */ 1147static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu, 1148 u16 devid, u32 flags, u32 ext_flags) 1149{ 1150 if (flags & ACPI_DEVFLAG_INITPASS) | 1150} 1151 1152/* Writes the specific IOMMU for a device into the rlookup table */ 1153static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) 1154{ 1155 iommu->pci_seg->rlookup_table[devid] = iommu; 1156} 1157 1158/* 1159 * This function takes the device specific flags read from the ACPI 1160 * table and sets up the device table entry with that information 1161 */ 1162static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu, 1163 u16 devid, u32 flags, u32 ext_flags) 1164{ 1165 if (flags & ACPI_DEVFLAG_INITPASS) |
1151 set_dev_entry_bit(devid, DEV_ENTRY_INIT_PASS); | 1166 set_dev_entry_bit(iommu, devid, DEV_ENTRY_INIT_PASS); |
1152 if (flags & ACPI_DEVFLAG_EXTINT) | 1167 if (flags & ACPI_DEVFLAG_EXTINT) |
1153 set_dev_entry_bit(devid, DEV_ENTRY_EINT_PASS); | 1168 set_dev_entry_bit(iommu, devid, DEV_ENTRY_EINT_PASS); |
1154 if (flags & ACPI_DEVFLAG_NMI) | 1169 if (flags & ACPI_DEVFLAG_NMI) |
1155 set_dev_entry_bit(devid, DEV_ENTRY_NMI_PASS); | 1170 set_dev_entry_bit(iommu, devid, DEV_ENTRY_NMI_PASS); |
1156 if (flags & ACPI_DEVFLAG_SYSMGT1) | 1171 if (flags & ACPI_DEVFLAG_SYSMGT1) |
1157 set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1); | 1172 set_dev_entry_bit(iommu, devid, DEV_ENTRY_SYSMGT1); |
1158 if (flags & ACPI_DEVFLAG_SYSMGT2) | 1173 if (flags & ACPI_DEVFLAG_SYSMGT2) |
1159 set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2); | 1174 set_dev_entry_bit(iommu, devid, DEV_ENTRY_SYSMGT2); |
1160 if (flags & ACPI_DEVFLAG_LINT0) | 1175 if (flags & ACPI_DEVFLAG_LINT0) |
1161 set_dev_entry_bit(devid, DEV_ENTRY_LINT0_PASS); | 1176 set_dev_entry_bit(iommu, devid, DEV_ENTRY_LINT0_PASS); |
1162 if (flags & ACPI_DEVFLAG_LINT1) | 1177 if (flags & ACPI_DEVFLAG_LINT1) |
1163 set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); | 1178 set_dev_entry_bit(iommu, devid, DEV_ENTRY_LINT1_PASS); |
1164 | 1179 |
1165 amd_iommu_apply_erratum_63(devid); | 1180 amd_iommu_apply_erratum_63(iommu, devid); |
1166 1167 set_iommu_for_device(iommu, devid); 1168} 1169 1170int __init add_special_device(u8 type, u8 id, u16 *devid, bool cmd_line) 1171{ 1172 struct devid_map *entry; 1173 struct list_head *list; --- 1343 unchanged lines hidden (view full) --- 2517{ 2518 u32 devid; 2519 struct dev_table_entry *dev_table = pci_seg->dev_table; 2520 2521 if (dev_table == NULL) 2522 return; 2523 2524 for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) { | 1181 1182 set_iommu_for_device(iommu, devid); 1183} 1184 1185int __init add_special_device(u8 type, u8 id, u16 *devid, bool cmd_line) 1186{ 1187 struct devid_map *entry; 1188 struct list_head *list; --- 1343 unchanged lines hidden (view full) --- 2532{ 2533 u32 devid; 2534 struct dev_table_entry *dev_table = pci_seg->dev_table; 2535 2536 if (dev_table == NULL) 2537 return; 2538 2539 for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) { |
2525 set_dev_entry_bit(devid, DEV_ENTRY_VALID); 2526 set_dev_entry_bit(devid, DEV_ENTRY_TRANSLATION); | 2540 __set_dev_entry_bit(dev_table, devid, DEV_ENTRY_VALID); 2541 __set_dev_entry_bit(dev_table, devid, DEV_ENTRY_TRANSLATION); |
2527 } 2528} 2529 2530static void __init uninit_device_table_dma(struct amd_iommu_pci_seg *pci_seg) 2531{ 2532 u32 devid; 2533 struct dev_table_entry *dev_table = pci_seg->dev_table; 2534 2535 if (dev_table == NULL) 2536 return; 2537 2538 for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) { 2539 dev_table[devid].data[0] = 0ULL; 2540 dev_table[devid].data[1] = 0ULL; 2541 } 2542} 2543 2544static void init_device_table(void) 2545{ | 2542 } 2543} 2544 2545static void __init uninit_device_table_dma(struct amd_iommu_pci_seg *pci_seg) 2546{ 2547 u32 devid; 2548 struct dev_table_entry *dev_table = pci_seg->dev_table; 2549 2550 if (dev_table == NULL) 2551 return; 2552 2553 for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) { 2554 dev_table[devid].data[0] = 0ULL; 2555 dev_table[devid].data[1] = 0ULL; 2556 } 2557} 2558 2559static void init_device_table(void) 2560{ |
2561 struct amd_iommu_pci_seg *pci_seg; |
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2546 u32 devid; 2547 2548 if (!amd_iommu_irq_remap) 2549 return; 2550 | 2562 u32 devid; 2563 2564 if (!amd_iommu_irq_remap) 2565 return; 2566 |
2551 for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) 2552 set_dev_entry_bit(devid, DEV_ENTRY_IRQ_TBL_EN); | 2567 for_each_pci_segment(pci_seg) { 2568 for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) 2569 __set_dev_entry_bit(pci_seg->dev_table, 2570 devid, DEV_ENTRY_IRQ_TBL_EN); 2571 } |
2553} 2554 2555static void iommu_init_flags(struct amd_iommu *iommu) 2556{ 2557 iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ? 2558 iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) : 2559 iommu_feature_disable(iommu, CONTROL_HT_TUN_EN); 2560 --- 971 unchanged lines hidden --- | 2572} 2573 2574static void iommu_init_flags(struct amd_iommu *iommu) 2575{ 2576 iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ? 2577 iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) : 2578 iommu_feature_disable(iommu, CONTROL_HT_TUN_EN); 2579 --- 971 unchanged lines hidden --- |