pci.c (bcf39352eb9e9026f7a1028d4bce3707b65f104b) pci.c (ef407beefbd9928792ccc93857e408e0057bc17b)
1/*
2 * New-style PCI core.
3 *
4 * Copyright (c) 2004 - 2009 Paul Mundt
5 * Copyright (c) 2002 M. R. Brown
6 *
7 * Modelled after arch/mips/pci/pci.c:
8 * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)

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74 * Do not panic here but later - this might hapen before console init.
75 */
76 if (!hose->io_map_base) {
77 printk(KERN_WARNING
78 "registering PCI controller with io_map_base unset\n");
79 }
80
81 /*
1/*
2 * New-style PCI core.
3 *
4 * Copyright (c) 2004 - 2009 Paul Mundt
5 * Copyright (c) 2002 M. R. Brown
6 *
7 * Modelled after arch/mips/pci/pci.c:
8 * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)

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74 * Do not panic here but later - this might hapen before console init.
75 */
76 if (!hose->io_map_base) {
77 printk(KERN_WARNING
78 "registering PCI controller with io_map_base unset\n");
79 }
80
81 /*
82 * Setup the ERR/PERR and SERR timers, if available.
83 */
84 pcibios_enable_timers(hose);
85
86 /*
82 * Scan the bus if it is register after the PCI subsystem
83 * initialization.
84 */
85 if (pci_initialized) {
86 mutex_lock(&pci_scan_mutex);
87 pcibios_scanbus(hose);
88 mutex_unlock(&pci_scan_mutex);
89 }

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284 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
285}
286
287char * __devinit pcibios_setup(char *str)
288{
289 return str;
290}
291
87 * Scan the bus if it is register after the PCI subsystem
88 * initialization.
89 */
90 if (pci_initialized) {
91 mutex_lock(&pci_scan_mutex);
92 pcibios_scanbus(hose);
93 mutex_unlock(&pci_scan_mutex);
94 }

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289 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
290}
291
292char * __devinit pcibios_setup(char *str)
293{
294 return str;
295}
296
297/*
298 * We can't use pci_find_device() here since we are
299 * called from interrupt context.
300 */
301static void pcibios_bus_report_status(struct pci_bus *bus,
302 unsigned int status_mask, int warn)
303{
304 struct pci_dev *dev;
305
306 list_for_each_entry(dev, &bus->devices, bus_list) {
307 u16 status;
308
309 /*
310 * ignore host bridge - we handle
311 * that separately
312 */
313 if (dev->bus->number == 0 && dev->devfn == 0)
314 continue;
315
316 pci_read_config_word(dev, PCI_STATUS, &status);
317 if (status == 0xffff)
318 continue;
319
320 if ((status & status_mask) == 0)
321 continue;
322
323 /* clear the status errors */
324 pci_write_config_word(dev, PCI_STATUS, status & status_mask);
325
326 if (warn)
327 printk("(%s: %04X) ", pci_name(dev), status);
328 }
329
330 list_for_each_entry(dev, &bus->devices, bus_list)
331 if (dev->subordinate)
332 pcibios_bus_report_status(dev->subordinate, status_mask, warn);
333}
334
335void pcibios_report_status(unsigned int status_mask, int warn)
336{
337 struct pci_channel *hose;
338
339 for (hose = hose_head; hose; hose = hose->next)
340 pcibios_bus_report_status(hose->bus, status_mask, warn);
341}
342
292int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
293 enum pci_mmap_state mmap_state, int write_combine)
294{
295 /*
296 * I/O space can be accessed via normal processor loads and stores on
297 * this platform but for now we elect not to do this and portable
298 * drivers should not do this anyway.
299 */

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343int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
344 enum pci_mmap_state mmap_state, int write_combine)
345{
346 /*
347 * I/O space can be accessed via normal processor loads and stores on
348 * this platform but for now we elect not to do this and portable
349 * drivers should not do this anyway.
350 */

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