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Searched refs:rsr (Results 1 – 25 of 95) sorted by relevance

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/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_timer.S9 rsr \delta, ccount
10 rsr \target, ccount
21 rsr a3, ccount
22 rsr a4, ccount
27 rsr a3, ccount
28 rsr a4, ccount
33 rsr a3, ccount
66 rsr a2, interrupt
77 rsr a3, interrupt
83 rsr a2, interrupt
[all …]
H A Dtest_phys_mem.S33 rsr a3, excvaddr
35 rsr a3, epc1
37 rsr a3, exccause
51 rsr a3, excvaddr
54 rsr a3, epc1
56 rsr a3, exccause
70 rsr a3, excvaddr
73 rsr a3, epc1
75 rsr a3, exccause
89 rsr a3, excvaddr
[all …]
H A Dtest_mmu.S91 rsr a2, excvaddr
93 rsr a2, exccause
105 rsr a2, excvaddr
107 rsr a2, exccause
122 rsr a2, exccause
139 rsr a2, exccause
156 rsr a2, excvaddr
157 rsr a3, epc1
163 rsr a2, exccause
166 rsr a2, ps
[all …]
H A Dtest_windowed.S36 rsr a2, epc1
42 rsr a2, windowbase
45 rsr a2, ps
51 rsr a2, windowbase
53 rsr a2, windowstart
56 rsr a2, ps
100 rsr a2, epc1
106 rsr a2, ps
109 rsr a2, windowbase
112 rsr a2, windowstart
[all …]
H A Dtest_interrupt.S58 rsr a2, interrupt
62 rsr a2, interrupt
67 rsr a2, ps
71 rsr a2, exccause
78 rsr a2, ps
80 rsr a4, ps
99 rsr a3, interrupt
105 rsr a3, interrupt
121 rsr a3, interrupt
140 rsr a3, interrupt
[all …]
H A Dtest_break.S22 rsr a2, ps
27 rsr a2, EPC_DEBUG
30 rsr a2, debugcause
46 rsr a2, ps
51 rsr a2, EPC_DEBUG
54 rsr a2, debugcause
85 rsr a2, ps
90 rsr a2, EPC_DEBUG
93 rsr a2, debugcause
112 rsr a2, ps
[all …]
H A Dtest_boolean.S11 rsr a3, br
14 rsr a3, br
17 rsr a3, br
20 rsr a3, br
H A Dtest_sar.S28 rsr a3, sar
43 rsr a3, sar
58 rsr a3, sar
73 rsr a3, sar
88 rsr a3, sar
102 rsr a3, sar
H A Dtest_mac16.S11 rsr a4, ACCLO
14 rsr a4, ACCHI
130 rsr a3, m0
136 rsr a3, m1
150 rsr a3, m2
156 rsr a3, m3
193 rsr a2, m1
207 rsr a2, m2
221 rsr a2, m1
236 rsr a2, m2
H A Dtest_load_store.S48 rsr a6, exccause
51 rsr a6, epc1
54 rsr a6, excvaddr
128 rsr a6, exccause
131 rsr a6, epc1
134 rsr a6, excvaddr
/openbmc/linux/arch/xtensa/kernel/
H A Dentry.S73 rsr \flags, ps
80 rsr \flags, ps
126 rsr a0, depc
139 rsr a3, sar
153 rsr a2, windowbase
154 rsr a3, windowstart
232 rsr a2, sar # original WINDOWBASE
280 rsr a0, depc # get a2
292 rsr a3, sar
301 rsr a2, windowbase # don't need to save these, we only
[all …]
H A Dvectors.S78 rsr a0, exccause # retrieve exception cause
105 rsr a0, exccause # retrieve exception cause
217 rsr a2, ps
262 rsr a0, ps
272 rsr a0, exccause
293 rsr a3, exccause
312 rsr a3, excsave1
345 rsr a0, exccause
432 rsr a0, ps
434 rsr a2, windowbase
[all …]
H A Dalign.S352 rsr a3, excsave1
366 rsr a0, ps
444 rsr a4, lend # check if we reached LEND
446 rsr a4, lcount # and LCOUNT != 0
449 rsr a7, lbeg # set PC to LBEGIN
456 rsr a4, icountlevel
459 rsr a4, icount
464 rsr a3, excsave1
496 rsr a4, depc
499 rsr a5, sar
[all …]
H A Dcoprocessor.S145 rsr a0, ps
155 rsr a3, sar
159 rsr a2, depc
174 rsr a3, exccause
181 rsr a0, cpenable
195 rsr a0, excsave1 # exc_table
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dtie-asm.h91 rsr.ACCLO \at1 // MAC16 option
93 rsr.ACCHI \at1 // MAC16 option
103 rsr.BR \at1 // boolean option
105 rsr.SCOMPARE1 \at1 // conditional store option
107 rsr.M0 \at1 // MAC16 option
109 rsr.M1 \at1 // MAC16 option
111 rsr.M2 \at1 // MAC16 option
113 rsr.M3 \at1 // MAC16 option
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dtie-asm.h81 rsr.ACCLO \at1 // MAC16 option
83 rsr.ACCHI \at1 // MAC16 option
93 rsr.SCOMPARE1 \at1 // conditional store option
95 rsr.M0 \at1 // MAC16 option
97 rsr.M1 \at1 // MAC16 option
99 rsr.M2 \at1 // MAC16 option
101 rsr.M3 \at1 // MAC16 option
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dtie-asm.h41 rsr \at1, ACCLO // MAC16 accumulator
42 rsr \at2, ACCHI
49 rsr \at1, M0 // MAC16 registers
50 rsr \at2, M1
53 rsr \at1, M2
54 rsr \at2, M3
61 rsr \at1, SCOMPARE1 // conditional store option
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dtie-asm.h60 rsr.ACCLO \at1 // MAC16 option
62 rsr.ACCHI \at1 // MAC16 option
72 rsr.SCOMPARE1 \at1 // conditional store option
74 rsr.M0 \at1 // MAC16 option
76 rsr.M1 \at1 // MAC16 option
78 rsr.M2 \at1 // MAC16 option
80 rsr.M3 \at1 // MAC16 option
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dtie-asm.h39 rsr \at1, ACCLO // MAC16 accumulator
40 rsr \at2, ACCHI
47 rsr \at1, M0 // MAC16 registers
48 rsr \at2, M1
51 rsr \at1, M2
52 rsr \at2, M3
59 rsr \at1, SCOMPARE1 // conditional store option
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dtie-asm.h71 rsr \at1, ACCLO // MAC16 option
73 rsr \at1, ACCHI // MAC16 option
83 rsr \at1, M0 // MAC16 option
85 rsr \at1, M1 // MAC16 option
87 rsr \at1, M2 // MAC16 option
89 rsr \at1, M3 // MAC16 option
91 rsr \at1, SCOMPARE1 // conditional store option
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dtie-asm.h92 rsr \at1, ACCLO // MAC16 option
94 rsr \at1, ACCHI // MAC16 option
104 rsr \at1, M0 // MAC16 option
106 rsr \at1, M1 // MAC16 option
108 rsr \at1, M2 // MAC16 option
110 rsr \at1, M3 // MAC16 option
112 rsr \at1, SCOMPARE1 // conditional store option
/openbmc/linux/drivers/tty/serial/
H A Dapbuart.c70 unsigned int status, rsr; in apbuart_rx_chars() local
83 rsr = UART_GET_STATUS(port) | UART_DUMMY_RSR_RX; in apbuart_rx_chars()
85 if (rsr & UART_STATUS_ERR) { in apbuart_rx_chars()
87 if (rsr & UART_STATUS_BR) { in apbuart_rx_chars()
88 rsr &= ~(UART_STATUS_FE | UART_STATUS_PE); in apbuart_rx_chars()
92 } else if (rsr & UART_STATUS_PE) { in apbuart_rx_chars()
94 } else if (rsr & UART_STATUS_FE) { in apbuart_rx_chars()
97 if (rsr & UART_STATUS_OE) in apbuart_rx_chars()
100 rsr &= port->read_status_mask; in apbuart_rx_chars()
102 if (rsr & UART_STATUS_PE) in apbuart_rx_chars()
[all …]
H A Damba-pl010.c115 unsigned int status, rsr, max_count = 256; in pl010_rx_chars() local
129 rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX; in pl010_rx_chars()
130 if (unlikely(rsr & UART01x_RSR_ANY)) { in pl010_rx_chars()
133 if (rsr & UART01x_RSR_BE) { in pl010_rx_chars()
134 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); in pl010_rx_chars()
138 } else if (rsr & UART01x_RSR_PE) in pl010_rx_chars()
140 else if (rsr & UART01x_RSR_FE) in pl010_rx_chars()
142 if (rsr & UART01x_RSR_OE) in pl010_rx_chars()
145 rsr &= port->read_status_mask; in pl010_rx_chars()
147 if (rsr & UART01x_RSR_BE) in pl010_rx_chars()
[all …]
/openbmc/u-boot/arch/xtensa/cpu/
H A Dstart.S302 rsr a0, windowbase
375 rsr a2, EXCCAUSE # find handler
395 rsr a3, EXCSAVE1
417 rsr a2, WINDOWSTART
421 rsr a2, SAR
422 rsr a3, EPC1
423 rsr a4, EXCVADDR
430 rsr a3, LBEG
433 rsr a3, LEND
441 rsr a2, EXCCAUSE
[all …]
/openbmc/linux/drivers/watchdog/
H A Dmpc8xxx_wdt.c161 u32 __iomem *rsr = ioremap(res->start, resource_size(res)); in mpc8xxx_wdt_probe() local
163 if (!rsr) in mpc8xxx_wdt_probe()
166 status = in_be32(rsr) & wdt_type->rsr_mask; in mpc8xxx_wdt_probe()
169 out_be32(rsr, wdt_type->rsr_mask); in mpc8xxx_wdt_probe()
170 iounmap(rsr); in mpc8xxx_wdt_probe()

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