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Searched refs:reg0_base_lo (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/hw/cxl/
H A Dswitch-mailbox-cci.c51 .reg0_base_lo = RBI_CXL_DEVICE_REG | 0, in cswbcci_realize()
/openbmc/qemu/include/hw/cxl/
H A Dcxl_pci.h171 uint32_t reg0_base_lo; member
/openbmc/qemu/hw/pci-bridge/
H A Dcxl_downstream.c129 .reg0_base_lo = RBI_COMPONENT_REG | CXL_COMPONENT_REG_BAR_IDX, in build_dvsecs()
H A Dcxl_root_port.c139 .reg0_base_lo = RBI_COMPONENT_REG | CXL_COMPONENT_REG_BAR_IDX, in build_dvsecs()
H A Dcxl_upstream.c132 .reg0_base_lo = RBI_COMPONENT_REG | CXL_COMPONENT_REG_BAR_IDX, in build_dvsecs()
/openbmc/qemu/hw/mem/
H A Dcxl_type3.c374 .reg0_base_lo = RBI_COMPONENT_REG | CXL_COMPONENT_REG_BAR_IDX, in build_dvsecs()