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Searched refs:rD (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/arch/microblaze/kernel/
H A Dhw_exception_handler.S144 srl rD, rD; /* << 2 */
147 BSRLI2(rD, rD)
150 srl rD, rD; /* << 2 */ \
151 srl rD, rD; /* << 3 */ \
158 srl rD, rD /* << 10 */
161 BSRLI10(rD, rD)
170 BSRLI10(\rD, \rD)
173 BSRLI10(\rD, \rD)
178 BSRLI20(\rD, \rD)
181 BSRLI4(\rD, \rD)
[all …]
/openbmc/qemu/target/ppc/translate/
H A Dspe-impl.c.inc27 /* rD := rA */
442 gen_store_gpr64(rD(ctx->opcode), t0); /* rD := t0 */
458 /* acc := rD */
478 /* tmp := rD */
490 /* rD := acc */
514 gen_store_gpr64(rD(ctx->opcode), t0); /* rD := t0 */
530 /* acc := rD */
550 /* tmp := rD */
562 /* rD := acc */
638 tcg_gen_or_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rD(ctx->opcode)], t0);
[all …]
H A Dfp-impl.c.inc333 set_fpr(rD(ctx->opcode), t1);
350 set_fpr(rD(ctx->opcode), t0);
370 set_fpr(rD(ctx->opcode), t1);
390 set_fpr(rD(ctx->opcode), t1);
413 set_fpr(rD(ctx->opcode), t2);
435 set_fpr(rD(ctx->opcode), t1);
453 set_fpr(rD(ctx->opcode), t2);
751 set_fpr(rD(ctx->opcode), t0);
835 set_fpr(rD(ctx->opcode), t1);
852 set_fpr(rD(ctx->opcode), t0);
[all …]
H A Dvmx-impl.c.inc118 set_avr64(rD(ctx->opcode), avr, true);
122 set_avr64(rD(ctx->opcode), avr, false);
362 int VT = rD(ctx->opcode);
383 int VT = rD(ctx->opcode);
484 int VT = rD(ctx->opcode);
526 int VT = rD(ctx->opcode);
586 int VT = rD(ctx->opcode);
635 int VT = rD(ctx->opcode);
659 int VT = rD(ctx->opcode);
1892 rd = gen_avr_ptr(rD(ctx->opcode));
[all …]
H A Dvsx-impl.c.inc636 int xt = rD(ctx->opcode) + 32; \
921 xt = gen_vsr_ptr(rD(ctx->opcode) + 32); \
937 xt = gen_vsr_ptr(rD(ctx->opcode) + 32); \
1864 TCGv rt = cpu_gpr[rD(ctx->opcode)];
1891 set_cpu_vsr(rD(ctx->opcode) + 32, xth, true);
1893 set_cpu_vsr(rD(ctx->opcode) + 32, xtl, false);
1944 set_cpu_vsr(rD(ctx->opcode) + 32, xth, true);
1946 set_cpu_vsr(rD(ctx->opcode) + 32, xtl, false);
1951 TCGv rt = cpu_gpr[rD(ctx->opcode)];
2001 set_cpu_vsr(rD(ctx->opcode) + 32, xth, true);
[all …]
/openbmc/linux/tools/testing/selftests/powerpc/stringloops/
H A Dmemcmp_64.S17 #define rD r27 macro
271 LD rD,off8,r4
287 cmpld cr1,rC,rD
290 LD rD,off8,r4
312 cmpld cr1,rC,rD
316 LD rD,off8,r4
336 cmpld cr1,rC,rD
361 cmpld cr1,rC,rD
/openbmc/linux/arch/powerpc/lib/
H A Dmemcmp_64.S17 #define rD r27 macro
271 LD rD,off8,r4
287 cmpld cr1,rC,rD
290 LD rD,off8,r4
312 cmpld cr1,rC,rD
316 LD rD,off8,r4
336 cmpld cr1,rC,rD
361 cmpld cr1,rC,rD
/openbmc/qemu/target/ppc/
H A Dtranslate.c2769 t1 = tcg_constant_i32(rD(ctx->opcode)); in gen_lmw()
2805 int start = rD(ctx->opcode); in gen_lswi()
2842 t1 = tcg_constant_i32(rD(ctx->opcode)); in gen_lswx()
2937 TCGv gpr = cpu_gpr[rD(ctx->opcode)]; in gen_load_locked()
2985 int rt = rD(ctx->opcode); in gen_ld_atomic()
3097 src = cpu_gpr[rD(ctx->opcode)]; in gen_st_atomic()
3215 int rd = rD(ctx->opcode); in STCX()
4052 tcg_gen_shli_tl(cpu_gpr[rD(ctx->opcode)], in gen_mfcr()
4102 (*read_cb)(ctx, rD(ctx->opcode), sprn); in gen_op_mfspr()
4335 tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); in gen_setb()
[all …]
H A Dinternal.h110 EXTRACT_HELPER(rD, 21, 5);