target/ppc/translate.c

1582     tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[rD(ctx->opcode)], t0, zr,
1704     gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)],                           \
1715     gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)],                           \
1742     gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
1799     gen_op_arith_divw(ctx, cpu_gpr[rD(ctx->opcode)],                          \
1815     gen_helper_##hlpr(cpu_gpr[rD(ctx->opcode)], tcg_env,                      \
1818         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);                           \
1869     gen_op_arith_divd(ctx, cpu_gpr[rD(ctx->opcode)],                          \
1918     gen_op_arith_modw(ctx, cpu_gpr[rD(ctx->opcode)],                        \
1957   gen_op_arith_modd(ctx, cpu_gpr[rD(ctx->opcode)],                        \
1975     tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t1);
1977         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
1990     tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t1);
1992         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
2005     tcg_gen_mul_i64(cpu_gpr[rD(ctx->opcode)], t0, t1);
2007     tcg_gen_mul_i32(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
2011         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
2025     tcg_gen_concat_i32_i64(cpu_gpr[rD(ctx->opcode)], t0, t1);
2027     tcg_gen_mov_i32(cpu_gpr[rD(ctx->opcode)], t0);
2039         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
2046     tcg_gen_muli_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
2055     tcg_gen_muls2_tl(lo, cpu_gpr[rD(ctx->opcode)],
2058         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
2066     tcg_gen_mulu2_tl(lo, cpu_gpr[rD(ctx->opcode)],
2069         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
2076     tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
2079         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
2091     tcg_gen_mov_i64(cpu_gpr[rD(ctx->opcode)], t0);
2101         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
2179     gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)],                          \
2189     gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)],                          \
2213     gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
2221     gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
2227     tcg_gen_neg_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
2229         gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
2570         tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], -1);
2574             gen_helper_darn32(cpu_gpr[rD(ctx->opcode)]);
2577             gen_helper_darn64(cpu_gpr[rD(ctx->opcode)]);
3250     gen_qemu_##ldop(ctx, cpu_gpr[rD(ctx->opcode)], EA);                       \
3267     tcg_gen_qemu_ld_tl(cpu_gpr[rD(ctx->opcode)], EA, PPC_TLB_EPID_LOAD, ldop);\
3311         cpu_gpr[rD(ctx->opcode)], EA, PPC_TLB_EPID_STORE, stop);              \
3361     t1 = tcg_constant_i32(rD(ctx->opcode));
3397     int start = rD(ctx->opcode);
3434     t1 = tcg_constant_i32(rD(ctx->opcode));
3577     TCGv gpr = cpu_gpr[rD(ctx->opcode)];
3618     tcg_gen_movcond_tl(cond, cpu_gpr[rD(ctx->opcode)], t, t2, t, u);
3625     int rt = rD(ctx->opcode);
3737     src = cpu_gpr[rD(ctx->opcode)];
3855     int rd = rD(ctx->opcode);
4689             tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], cpu_crf[7 - crn]);
4690             tcg_gen_shli_tl(cpu_gpr[rD(ctx->opcode)],
4691                             cpu_gpr[rD(ctx->opcode)], crn * 4);
4710         tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0);
4718     tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_msr);
4740             (*read_cb)(ctx, rD(ctx->opcode), sprn);
4973     tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0);
5198     gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], tcg_env, t0);
5213     gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], tcg_env, t0);
5242     gen_helper_store_sr(tcg_env, t0, cpu_gpr[rD(ctx->opcode)]);
5259     gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], tcg_env, t0);
5274     gen_helper_load_sr(cpu_gpr[rD(ctx->opcode)], tcg_env, t0);
5355     tcg_gen_qemu_ld_tl(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx,
5367     tcg_gen_qemu_st_tl(cpu_gpr[rD(ctx->opcode)], t0, ctx->mem_idx,
5543                          rD(ctx->opcode), Rc(ctx->opcode));                   \
5642     gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], tcg_env, dcrn);
5668     gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], tcg_env,
5709     tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], EA);
5801         gen_helper_4xx_tlbre_hi(cpu_gpr[rD(ctx->opcode)], tcg_env,
5805         gen_helper_4xx_tlbre_lo(cpu_gpr[rD(ctx->opcode)], tcg_env,
5826     gen_helper_4xx_tlbsx(cpu_gpr[rD(ctx->opcode)], tcg_env, t0);
5830         tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rD(ctx->opcode)], -1, l1);
5877             gen_helper_440_tlbre(cpu_gpr[rD(ctx->opcode)], tcg_env,
5899     gen_helper_440_tlbsx(cpu_gpr[rD(ctx->opcode)], tcg_env, t0);
5903         tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rD(ctx->opcode)], -1, l1);
6029     tcg_gen_andi_tl(t0, cpu_gpr[rD(ctx->opcode)], (1 << MSR_EE));
6102     tcg_gen_add_i64(cpu_gpr[rD(ctx->opcode)], t1, cpu_gpr[rC(ctx->opcode)]);
6121     tcg_gen_add2_i64(t1, cpu_gpr[rD(ctx->opcode)], lo, hi,