| /openbmc/qemu/include/hw/ |
| H A D | irq.h | 19 void qemu_set_irq(qemu_irq irq, int level);
21 static inline void qemu_irq_raise(qemu_irq irq) in qemu_irq_raise()
26 static inline void qemu_irq_lower(qemu_irq irq) in qemu_irq_lower()
31 static inline void qemu_irq_pulse(qemu_irq irq) in qemu_irq_pulse()
47 qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n);
53 qemu_irq qemu_allocate_irq(qemu_irq_handler handler, void *opaque, int n);
58 qemu_irq *qemu_extend_irqs(qemu_irq *old, int n_old, qemu_irq_handler handler,
61 void qemu_free_irqs(qemu_irq *s, int n);
62 void qemu_free_irq(qemu_irq irq);
65 qemu_irq qemu_irq_invert(qemu_irq irq);
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| H A D | sysbus.h | 51 void (*connect_irq_notifier)(SysBusDevice *dev, qemu_irq irq);
72 void sysbus_init_irq(SysBusDevice *dev, qemu_irq *p);
79 void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq);
81 qemu_irq sysbus_get_connected_irq(SysBusDevice *dev, int n);
98 qemu_irq irq) in sysbus_create_simple()
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| H A D | qdev-core.h | 188 qemu_irq *in;
625 qemu_irq qdev_get_gpio_in(DeviceState *dev, int n);
645 qemu_irq qdev_get_gpio_in_named(DeviceState *dev, const char *name, int n);
676 void qdev_connect_gpio_out(DeviceState *dev, int n, qemu_irq pin);
705 qemu_irq input_pin);
725 qemu_irq qdev_get_gpio_out_connector(DeviceState *dev, const char *name, int n);
746 qemu_irq qdev_intercept_gpio_out(DeviceState *dev, qemu_irq icpt,
799 void qdev_init_gpio_out(DeviceState *dev, qemu_irq *pins, int n);
812 void qdev_init_gpio_out_named(DeviceState *dev, qemu_irq *pins,
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| /openbmc/qemu/hw/core/ |
| H A D | irq.c | 29 void qemu_set_irq(qemu_irq irq, int level) in qemu_set_irq()
52 qemu_irq *qemu_extend_irqs(qemu_irq *old, int n_old, qemu_irq_handler handler, in qemu_extend_irqs()
55 qemu_irq *s; in qemu_extend_irqs()
61 s = old ? g_renew(qemu_irq, old, n + n_old) : g_new(qemu_irq, n); in qemu_extend_irqs()
68 qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n) in qemu_allocate_irqs()
73 qemu_irq qemu_allocate_irq(qemu_irq_handler handler, void *opaque, int n) in qemu_allocate_irq()
80 void qemu_free_irqs(qemu_irq *s, int n) in qemu_free_irqs()
89 void qemu_free_irq(qemu_irq irq) in qemu_free_irq()
101 qemu_irq qemu_irq_invert(qemu_irq irq) in qemu_irq_invert()
108 void qemu_irq_intercept_in(qemu_irq *gpio_in, qemu_irq_handler handler, int n) in qemu_irq_intercept_in()
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| H A D | gpio.c | 74 void qdev_init_gpio_out_named(DeviceState *dev, qemu_irq *pins, in qdev_init_gpio_out_named()
99 void qdev_init_gpio_out(DeviceState *dev, qemu_irq *pins, int n) in qdev_init_gpio_out()
104 qemu_irq qdev_get_gpio_in_named(DeviceState *dev, const char *name, int n) in qdev_get_gpio_in_named()
112 qemu_irq qdev_get_gpio_in(DeviceState *dev, int n) in qdev_get_gpio_in()
118 qemu_irq input_pin) in qdev_connect_gpio_out_named()
133 qemu_irq qdev_get_gpio_out_connector(DeviceState *dev, const char *name, int n) in qdev_get_gpio_out_connector()
138 qemu_irq ret = (qemu_irq)object_property_get_link(OBJECT(dev), propname, in qdev_get_gpio_out_connector()
146 static qemu_irq qdev_disconnect_gpio_out_named(DeviceState *dev, in qdev_disconnect_gpio_out_named()
152 qemu_irq ret = (qemu_irq)object_property_get_link(OBJECT(dev), propname, in qdev_disconnect_gpio_out_named()
161 qemu_irq qdev_intercept_gpio_out(DeviceState *dev, qemu_irq icpt, in qdev_intercept_gpio_out()
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| /openbmc/qemu/include/hw/misc/ |
| H A D | iotkit-secctl.h | 79 qemu_irq nonsec[IOTS_PPC_NUM_PORTS];
80 qemu_irq ap[IOTS_PPC_NUM_PORTS];
81 qemu_irq irq_enable;
82 qemu_irq irq_clear;
100 qemu_irq sec_resp_cfg;
101 qemu_irq nsc_cfg_irq;
116 qemu_irq mscexp_clear[IOTS_NUM_EXP_MSC];
117 qemu_irq mscexp_ns[IOTS_NUM_EXP_MSC];
118 qemu_irq msc_irq;
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| H A D | xlnx-versal-pmc-iou-slcr.h | 69 qemu_irq irq_parity_imr;
70 qemu_irq irq_imr;
71 qemu_irq sd_emmc_sel[2];
72 qemu_irq qspi_ospi_mux_sel;
73 qemu_irq ospi_mux_sel;
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| /openbmc/qemu/include/hw/arm/ |
| H A D | armsse.h | 207 qemu_irq *exp_irqs[SSE_MAX_CPUS];
208 qemu_irq ppc0_irq;
209 qemu_irq ppc1_irq;
210 qemu_irq sec_resp_cfg;
211 qemu_irq sec_resp_cfg_in;
212 qemu_irq nsc_cfg_in;
214 qemu_irq irq_status_in[NUM_EXTERNAL_PPCS];
215 qemu_irq mpcexp_status_in[IOTS_NUM_EXP_MPC];
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| H A D | omap.h | 52 void omap_clk_adduser(struct clk *clk, qemu_irq user);
337 struct soc_dma_s *omap_dma_init(hwaddr base, qemu_irq *irqs,
339 qemu_irq lcd_irq, struct omap_mpu_state_s *mpu, omap_clk clk,
341 struct soc_dma_s *omap_dma4_init(hwaddr base, qemu_irq *irqs,
413 qemu_irq irq;
483 qemu_irq irq, omap_clk fclk, omap_clk iclk,
484 qemu_irq txdma, qemu_irq rxdma,
489 qemu_irq *omap_mpuio_in_get(struct omap_mpuio_s *s);
490 void omap_mpuio_out_set(struct omap_mpuio_s *s, int line, qemu_irq handler);
504 qemu_irq rx_swallow;
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| /openbmc/qemu/include/hw/char/ |
| H A D | cmsdk-apb-uart.h | 29 qemu_irq txint;
30 qemu_irq rxint;
31 qemu_irq txovrint;
32 qemu_irq rxovrint;
33 qemu_irq uartint;
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| H A D | ibex_uart.h | 68 qemu_irq tx_watermark;
69 qemu_irq rx_watermark;
70 qemu_irq tx_empty;
71 qemu_irq rx_overflow;
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| H A D | avr_usart.h | 85 qemu_irq rxc_irq;
87 qemu_irq txc_irq;
89 qemu_irq dre_irq;
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| /openbmc/qemu/include/hw/intc/ |
| H A D | arm_gic_common.h | 70 qemu_irq parent_irq[GIC_NCPU];
71 qemu_irq parent_fiq[GIC_NCPU];
72 qemu_irq parent_virq[GIC_NCPU];
73 qemu_irq parent_vfiq[GIC_NCPU];
74 qemu_irq parent_nmi[GIC_NCPU];
75 qemu_irq parent_vnmi[GIC_NCPU];
76 qemu_irq maintenance_irq[GIC_NCPU];
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| H A D | arm_gicv3_common.h | 129 qemu_irq parent_irq;
130 qemu_irq parent_fiq;
131 qemu_irq parent_virq;
132 qemu_irq parent_vfiq;
133 qemu_irq parent_nmi;
134 qemu_irq parent_vnmi;
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| H A D | i8259.h | 17 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq_in);
18 qemu_irq *kvm_i8259_init(ISABus *bus);
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| H A D | xlnx-zynqmp-ipi.h | 47 qemu_irq irq;
49 qemu_irq irq_trig_out[NUM_IPIS];
50 qemu_irq irq_obs_out[NUM_IPIS];
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| /openbmc/qemu/include/hw/timer/ |
| H A D | avr_timer16.h | 55 qemu_irq capt_irq;
56 qemu_irq compa_irq;
57 qemu_irq compb_irq;
58 qemu_irq compc_irq;
59 qemu_irq ovf_irq;
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| H A D | tmu012.h | 20 qemu_irq ch0_irq, qemu_irq ch1_irq,
21 qemu_irq ch2_irq0, qemu_irq ch2_irq1);
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| /openbmc/qemu/hw/char/ |
| H A D | omap_uart.c | 32 qemu_irq irq;
51 qemu_irq irq, omap_clk fclk, omap_clk iclk, in omap_uart_init()
52 qemu_irq txdma, qemu_irq rxdma, in omap_uart_init()
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| /openbmc/qemu/include/hw/i386/ |
| H A D | x86.h | 52 qemu_irq *gsi;
146 qemu_irq i8259_irq[ISA_NUM_IRQS];
147 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
148 qemu_irq ioapic2_irq[IOAPIC_NUM_PINS];
151 qemu_irq x86_allocate_cpu_irq(void);
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| /openbmc/qemu/include/hw/xtensa/ |
| H A D | mx_pic.h | 39 qemu_irq *irq,
40 qemu_irq runstall);
41 qemu_irq *xtensa_mx_pic_get_extints(XtensaMxPic *mx);
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| /openbmc/qemu/include/hw/m68k/ |
| H A D | mcf.h | 13 DeviceState *mcf_uart_create(qemu_irq irq, Chardev *chr);
14 DeviceState *mcf_uart_create_mmap(hwaddr base, qemu_irq irq, Chardev *chr);
17 qemu_irq *mcf_intc_init(struct MemoryRegion *sysmem,
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| /openbmc/qemu/include/hw/block/ |
| H A D | fdc.h | 13 void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, DriveInfo **fds);
14 void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base,
15 DriveInfo **fds, qemu_irq *fdc_tc);
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| /openbmc/qemu/include/hw/gpio/ |
| H A D | nrf51_gpio.h | 55 qemu_irq irq;
66 qemu_irq output[NRF51_GPIO_PINS];
67 qemu_irq detect;
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| /openbmc/qemu/include/hw/dma/ |
| H A D | pl080.h | 65 qemu_irq irq;
66 qemu_irq interr;
67 qemu_irq inttc;
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