Home
last modified time | relevance | path

Searched refs:mmUVD_DPG_LMA_CTL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vcn.h83 WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_CTL, \
95 WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_CTL, \
137 WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_LMA_CTL, \
151 mmUVD_DPG_LMA_CTL, \
H A Dvcn_v4_0_3.c40 #define mmUVD_DPG_LMA_CTL regUVD_DPG_LMA_CTL macro
H A Dvcn_v4_0.c42 #define mmUVD_DPG_LMA_CTL regUVD_DPG_LMA_CTL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h36 #define mmUVD_DPG_LMA_CTL … macro
H A Dvcn_2_5_offset.h409 #define mmUVD_DPG_LMA_CTL … macro
H A Dvcn_2_0_0_offset.h394 #define mmUVD_DPG_LMA_CTL … macro
H A Dvcn_3_0_0_offset.h685 #define mmUVD_DPG_LMA_CTL … macro