| /openbmc/linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_packet_manager_v9.c | 75 packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area); in pm_map_process_v9()
79 lower_32_bits(vm_page_table_base_addr); in pm_map_process_v9()
129 packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area); in pm_map_process_aldebaran()
133 lower_32_bits(vm_page_table_base_addr); in pm_map_process_aldebaran()
172 packet->ordinal2 = lower_32_bits(ib); in pm_runlist_v9()
197 packet->gws_mask_lo = lower_32_bits(res->gws_mask); in pm_set_resources_v9()
200 packet->queue_mask_lo = lower_32_bits(res->queue_mask); in pm_set_resources_v9()
275 lower_32_bits(q->gart_mqd_addr); in pm_map_queues_v9()
281 lower_32_bits((uint64_t)q->properties.write_ptr); in pm_map_queues_v9()
394 packet->addr_lo = lower_32_bits((uint64_t)fence_address); in pm_query_status_v9()
[all …]
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| H A D | kfd_packet_manager_vi.c | 69 packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area); in pm_map_process_vi()
108 packet->ordinal2 = lower_32_bits(ib); in pm_runlist_vi()
133 packet->gws_mask_lo = lower_32_bits(res->gws_mask); in pm_set_resources_vi()
136 packet->queue_mask_lo = lower_32_bits(res->queue_mask); in pm_set_resources_vi()
186 lower_32_bits(q->gart_mqd_addr); in pm_map_queues_vi()
192 lower_32_bits((uint64_t)q->properties.write_ptr); in pm_map_queues_vi()
264 packet->addr_lo = lower_32_bits((uint64_t)fence_address); in pm_query_status_vi()
266 packet->data_lo = lower_32_bits((uint64_t)fence_value); in pm_query_status_vi()
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| H A D | kfd_mqd_manager_vi.c | 116 m->cp_mqd_base_addr_lo = lower_32_bits(addr); in init_mqd()
130 m->compute_tba_lo = lower_32_bits(q->tba_addr >> 8); in init_mqd()
132 m->compute_tma_lo = lower_32_bits(q->tma_addr >> 8); in init_mqd()
142 lower_32_bits(q->ctx_save_restore_area_address); in init_mqd()
184 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); in __update_mqd()
187 m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); in __update_mqd()
189 m->cp_hqd_pq_wptr_poll_addr_lo = lower_32_bits((uint64_t)q->write_ptr); in __update_mqd()
215 lower_32_bits(q->eop_ring_buffer_address >> 8); in __update_mqd()
370 m->sdmax_rlcx_rb_base = lower_32_bits(q->queue_address >> 8); in update_mqd_sdma()
372 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr); in update_mqd_sdma()
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| H A D | kfd_mqd_manager_v11.c | 159 m->cp_mqd_base_addr_lo = lower_32_bits(addr); in init_mqd()
187 lower_32_bits(q->ctx_save_restore_area_address); in init_mqd()
230 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); in update_mqd()
233 m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); in update_mqd()
235 m->cp_hqd_pq_wptr_poll_addr_lo = lower_32_bits((uint64_t)q->write_ptr); in update_mqd()
256 lower_32_bits(q->eop_ring_buffer_address >> 8); in update_mqd()
434 m->sdmax_rlcx_rb_base = lower_32_bits(q->queue_address >> 8); in update_mqd_sdma()
436 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr); in update_mqd_sdma()
438 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits((uint64_t)q->write_ptr); in update_mqd_sdma()
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| /openbmc/linux/drivers/firmware/smccc/ |
| H A D | kvm_guest.c | 33 val[0] = lower_32_bits(res.a0); in kvm_init_hyp_services()
34 val[1] = lower_32_bits(res.a1); in kvm_init_hyp_services()
35 val[2] = lower_32_bits(res.a2); in kvm_init_hyp_services()
36 val[3] = lower_32_bits(res.a3); in kvm_init_hyp_services()
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| /openbmc/linux/drivers/pci/controller/mobiveil/ |
| H A D | pcie-mobiveil.c | 151 (lower_32_bits(size64) & WIN_SIZE_MASK); in program_ib_windows()
157 mobiveil_csr_writel(pcie, lower_32_bits(cpu_addr), in program_ib_windows()
162 mobiveil_csr_writel(pcie, lower_32_bits(pci_addr), in program_ib_windows()
192 (lower_32_bits(size64) & WIN_SIZE_MASK); in program_ob_windows()
203 lower_32_bits(cpu_addr) & (~AXI_WINDOW_ALIGN_MASK), in program_ob_windows()
208 mobiveil_csr_writel(pcie, lower_32_bits(pci_addr), in program_ob_windows()
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_v2_0.c | 349 lower_32_bits(adev->vcn.inst->gpu_addr)); in vcn_v2_0_mc_resume()
910 lower_32_bits(ring->gpu_addr)); in vcn_v2_0_start_dpg_mode()
921 lower_32_bits(ring->wptr)); in vcn_v2_0_start_dpg_mode()
1070 lower_32_bits(ring->gpu_addr)); in vcn_v2_0_start()
1079 lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1361 lower_32_bits(ring->wptr) | 0x80000000); in vcn_v2_0_dec_ring_set_wptr()
1521 data1 = lower_32_bits(pd_addr); in vcn_v2_0_dec_ring_emit_vm_flush()
1681 lower_32_bits(pd_addr), 0xffffffff); in vcn_v2_0_enc_ring_emit_vm_flush()
1902 lower_32_bits(adev->vcn.inst->gpu_addr)); in vcn_v2_0_start_sriov()
1954 lower_32_bits(ring->gpu_addr)); in vcn_v2_0_start_sriov()
[all …]
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| H A D | sdma_v6_0.c | 198 lower_32_bits(ring->wptr << 2), in sdma_v6_0_ring_set_wptr()
211 lower_32_bits(ring->wptr << 2), in sdma_v6_0_ring_set_wptr()
216 lower_32_bits(ring->wptr << 2)); in sdma_v6_0_ring_set_wptr()
347 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v6_0_ring_emit_fence()
349 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v6_0_ring_emit_fence()
358 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v6_0_ring_emit_fence()
505 lower_32_bits(wptr_gpu_addr)); in sdma_v6_0_gfx_resume()
993 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v6_0_ring_test_ib()
1058 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v6_0_vm_copy_pte()
1082 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v6_0_vm_write_pte()
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| H A D | sdma_v5_2.c | 183 lower_32_bits(ring->wptr << 2), in sdma_v5_2_ring_set_wptr()
196 lower_32_bits(ring->wptr << 2)); in sdma_v5_2_ring_set_wptr()
204 lower_32_bits(ring->wptr << 2), in sdma_v5_2_ring_set_wptr()
208 lower_32_bits(ring->wptr << 2)); in sdma_v5_2_ring_set_wptr()
341 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v5_2_ring_emit_fence()
343 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v5_2_ring_emit_fence()
352 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v5_2_ring_emit_fence()
533 lower_32_bits(wptr_gpu_addr)); in sdma_v5_2_gfx_resume()
954 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v5_2_ring_test_ib()
1019 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v5_2_vm_copy_pte()
[all …]
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| H A D | vcn_v2_5.c | 433 lower_32_bits(adev->vcn.inst[i].gpu_addr)); in vcn_v2_5_mc_resume()
942 lower_32_bits(ring->gpu_addr)); in vcn_v2_5_start_dpg_mode()
953 lower_32_bits(ring->wptr)); in vcn_v2_5_start_dpg_mode()
1122 lower_32_bits(ring->gpu_addr)); in vcn_v2_5_start()
1131 lower_32_bits(ring->wptr)); in vcn_v2_5_start()
1260 lower_32_bits(adev->vcn.inst[i].gpu_addr)); in vcn_v2_5_sriov_start()
1310 lower_32_bits(ring->gpu_addr)); in vcn_v2_5_sriov_start()
1323 lower_32_bits(ring->gpu_addr)); in vcn_v2_5_sriov_start()
1566 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v2_5_dec_ring_set_wptr()
1657 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v2_5_enc_ring_set_wptr()
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| H A D | vcn_v3_0.c | 463 lower_32_bits(adev->vcn.inst[inst].gpu_addr)); in vcn_v3_0_mc_resume()
1067 lower_32_bits(ring->gpu_addr)); in vcn_v3_0_start_dpg_mode()
1078 lower_32_bits(ring->wptr)); in vcn_v3_0_start_dpg_mode()
1244 lower_32_bits(ring->gpu_addr)); in vcn_v3_0_start()
1254 lower_32_bits(ring->wptr)); in vcn_v3_0_start()
1348 lower_32_bits(adev->vcn.inst[i].gpu_addr)); in vcn_v3_0_start_sriov()
1365 lower_32_bits(cache_addr)); in vcn_v3_0_start_sriov()
1380 lower_32_bits(cache_addr)); in vcn_v3_0_start_sriov()
1397 lower_32_bits(rb_addr)); in vcn_v3_0_start_sriov()
1411 lower_32_bits(rb_addr)); in vcn_v3_0_start_sriov()
[all …]
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| H A D | si_dma.c | 71 while ((lower_32_bits(ring->wptr) & 7) != 5) in si_dma_ring_emit_ib()
219 amdgpu_ring_write(ring, lower_32_bits(gpu_addr)); in si_dma_ring_test_ring()
272 ib.ptr[1] = lower_32_bits(gpu_addr); in si_dma_ring_test_ib()
319 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_copy_pte()
320 ib->ptr[ib->length_dw++] = lower_32_bits(src); in si_dma_vm_copy_pte()
343 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_write_pte()
346 ib->ptr[ib->length_dw++] = lower_32_bits(value); in si_dma_vm_write_pte()
426 amdgpu_ring_write(ring, lower_32_bits(addr)); in si_dma_ring_emit_pipeline_sync()
783 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in si_dma_emit_copy_buffer()
784 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in si_dma_emit_copy_buffer()
[all …]
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| H A D | sdma_v5_0.c | 373 lower_32_bits(ring->wptr << 2), in sdma_v5_0_ring_set_wptr()
386 lower_32_bits(ring->wptr << 2), in sdma_v5_0_ring_set_wptr()
391 lower_32_bits(ring->wptr << 2)); in sdma_v5_0_ring_set_wptr()
524 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v5_0_ring_emit_fence()
526 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v5_0_ring_emit_fence()
535 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v5_0_ring_emit_fence()
718 lower_32_bits(wptr_gpu_addr)); in sdma_v5_0_gfx_resume()
749 lower_32_bits(ring->wptr << 2)); in sdma_v5_0_gfx_resume()
1107 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v5_0_ring_test_ib()
1172 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v5_0_vm_copy_pte()
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| H A D | sdma_v2_4.c | 312 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v2_4_ring_emit_fence()
314 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v2_4_ring_emit_fence()
320 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v2_4_ring_emit_fence()
558 amdgpu_ring_write(ring, lower_32_bits(gpu_addr)); in sdma_v2_4_ring_test_ring()
613 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v2_4_ring_test_ib()
667 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v2_4_vm_copy_pte()
669 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v2_4_vm_copy_pte()
696 ib->ptr[ib->length_dw++] = lower_32_bits(value); in sdma_v2_4_vm_write_pte()
1203 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in sdma_v2_4_emit_copy_buffer()
1205 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v2_4_emit_copy_buffer()
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| /openbmc/linux/drivers/iio/test/ |
| H A D | iio-test-format.c | 211 values[0] = lower_32_bits(value); in iio_test_iio_format_value_integer_64()
217 values[0] = lower_32_bits(value); in iio_test_iio_format_value_integer_64()
223 values[0] = lower_32_bits(value); in iio_test_iio_format_value_integer_64()
229 values[0] = lower_32_bits(value); in iio_test_iio_format_value_integer_64()
235 values[0] = lower_32_bits(value); in iio_test_iio_format_value_integer_64()
241 values[0] = lower_32_bits(value); in iio_test_iio_format_value_integer_64()
247 values[0] = lower_32_bits(value); in iio_test_iio_format_value_integer_64()
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | gv100.c | 47 nvkm_wo32(chan->inst, 0x008, lower_32_bits(userd)); in gv100_chan_ramfc_write()
51 nvkm_wo32(chan->inst, 0x048, lower_32_bits(offset)); in gv100_chan_ramfc_write()
102 nvkm_wo32(chan->inst, 0x210, lower_32_bits(addr)); in gv100_ectx_bind()
122 nvkm_wo32(chan->inst, 0x220, lower_32_bits(bar2)); in gv100_ectx_ce_bind()
188 nvkm_wo32(memory, offset + 0x0, lower_32_bits(user) | chan->runq << 1); in gv100_runl_insert_chan()
190 nvkm_wo32(memory, offset + 0x8, lower_32_bits(inst) | chan->id); in gv100_runl_insert_chan()
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
| H A D | gm20b.c | 73 hdr.code_dma_base = lower_32_bits((addr + adjust) >> 8); in gm20b_pmu_acr_bld_patch()
76 hdr.data_dma_base = lower_32_bits((addr + adjust) >> 8); in gm20b_pmu_acr_bld_patch()
79 hdr.overlay_dma_base = lower_32_bits((addr + adjust) << 8); in gm20b_pmu_acr_bld_patch()
95 .code_dma_base = lower_32_bits(code), in gm20b_pmu_acr_bld_write()
99 .data_dma_base = lower_32_bits(data), in gm20b_pmu_acr_bld_write()
101 .overlay_dma_base = lower_32_bits(code), in gm20b_pmu_acr_bld_write()
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| /openbmc/linux/include/linux/ |
| H A D | goldfish.h | 23 gf_iowrite32(lower_32_bits(addr), portl); in gf_write_ptr()
33 gf_iowrite32(lower_32_bits(addr), portl); in gf_write_dma_addr()
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| /openbmc/linux/drivers/pci/controller/ |
| H A D | pci-xgene.c | 290 val = (val32 & 0x0000ffff) | (lower_32_bits(mask) << 16); in xgene_pcie_set_ib_mask()
294 val = (val32 & 0xffff0000) | (lower_32_bits(mask) >> 16); in xgene_pcie_set_ib_mask()
387 xgene_pcie_writel(port, offset, lower_32_bits(cpu_addr)); in xgene_pcie_setup_ob_reg()
389 xgene_pcie_writel(port, offset + 0x08, lower_32_bits(mask)); in xgene_pcie_setup_ob_reg()
391 xgene_pcie_writel(port, offset + 0x10, lower_32_bits(pci_addr)); in xgene_pcie_setup_ob_reg()
399 xgene_pcie_writel(port, CFGBARL, lower_32_bits(addr)); in xgene_pcie_setup_cfg_reg()
448 xgene_pcie_writel(port, pim_reg, lower_32_bits(pim)); in xgene_pcie_setup_pims()
451 xgene_pcie_writel(port, pim_reg + 0x10, lower_32_bits(size)); in xgene_pcie_setup_pims()
514 xgene_pcie_writel(port, IR2MSK, lower_32_bits(mask)); in xgene_pcie_setup_ib_reg()
520 xgene_pcie_writel(port, IR3MSKL, lower_32_bits(mask)); in xgene_pcie_setup_ib_reg()
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| H A D | pcie-rcar.c | 91 rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F, in rcar_pcie_set_outbound()
110 rcar_pci_write_reg(pcie, lower_32_bits(pci_addr), in rcar_pcie_set_inbound()
112 rcar_pci_write_reg(pcie, lower_32_bits(cpu_addr), PCIELAR(idx)); in rcar_pcie_set_inbound()
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| H A D | gm20b.c | 41 hdr.code_dma_base = lower_32_bits((addr + adjust) >> 8); in gm20b_gr_acr_bld_patch()
44 hdr.data_dma_base = lower_32_bits((addr + adjust) >> 8); in gm20b_gr_acr_bld_patch()
60 .code_dma_base = lower_32_bits(code), in gm20b_gr_acr_bld_write()
64 .data_dma_base = lower_32_bits(data), in gm20b_gr_acr_bld_write()
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| /openbmc/linux/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_bo74c1.c | 49 0x030c, lower_32_bits(mem->vma[0].addr), in nv84_bo_move_exec()
51 0x0314, lower_32_bits(mem->vma[1].addr), in nv84_bo_move_exec()
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| /openbmc/linux/drivers/media/pci/pt3/ |
| H A D | pt3_dma.c | 52 iowrite32(lower_32_bits(adap->desc_buf[0].b_addr), in pt3_start_dma()
184 d->next_l = lower_32_bits(desc_addr); in pt3_alloc_dmabuf()
190 d->addr_l = lower_32_bits(data_addr); in pt3_alloc_dmabuf()
195 d->next_l = lower_32_bits(desc_addr); in pt3_alloc_dmabuf()
204 d->next_l = lower_32_bits(desc_addr); in pt3_alloc_dmabuf()
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| /openbmc/linux/drivers/accel/habanalabs/common/ |
| H A D | memory_mgr.c | 25 buf = idr_find(&mmg->handles, lower_32_bits(handle >> PAGE_SHIFT)); in hl_mmap_mem_buf_get()
67 idr_remove(&buf->mmg->handles, lower_32_bits(buf->handle >> PAGE_SHIFT)); in hl_mmap_mem_buf_release()
86 idr_remove(&buf->mmg->handles, lower_32_bits(buf->handle >> PAGE_SHIFT)); in hl_mmap_mem_buf_remove_idr_locked()
118 buf = idr_find(&mmg->handles, lower_32_bits(handle >> PAGE_SHIFT)); in hl_mmap_mem_buf_put_handle()
185 idr_remove(&mmg->handles, lower_32_bits(buf->handle >> PAGE_SHIFT)); in hl_mmap_mem_buf_alloc()
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| /openbmc/linux/drivers/pci/controller/dwc/ |
| H A D | pcie-tegra194-acpi.c | 52 atu_reg_write(pcie_ecam, index, lower_32_bits(cpu_addr), in program_outbound_atu()
56 atu_reg_write(pcie_ecam, index, lower_32_bits(pci_addr), in program_outbound_atu()
58 atu_reg_write(pcie_ecam, index, lower_32_bits(cpu_addr + size - 1), in program_outbound_atu()
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