/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | smu_helper.h | 155 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ 159 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ 168 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \ 173 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
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H A D | vega10_powertune.c | 758 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset); in vega10_program_didt_config_registers() 764 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset); in vega10_program_didt_config_registers() 770 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_SE_CAC, config_regs->offset); in vega10_program_didt_config_registers() 841 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_SQ_EDC_CTRL); in vega10_didt_set_mask() 848 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DB_EDC_CTRL); in vega10_didt_set_mask() 855 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TD_EDC_CTRL); in vega10_didt_set_mask() 862 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TCP_EDC_CTRL); in vega10_didt_set_mask() 869 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DBR_EDC_CTRL); in vega10_didt_set_mask()
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H A D | smu8_hwmgr.c | 1578 now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, in smu8_print_clock_levels() 1590 now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, in smu8_print_clock_levels() 1713 uint32_t val = cgs_read_ind_register(hwmgr->device, in smu8_thermal_get_temperature() 1739 …uint32_t sclk_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixTARGE… in smu8_read_sensor() 1741 …uint32_t uvd_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixTARGET… in smu8_read_sensor() 1743 …uint32_t vce_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixTARGET… in smu8_read_sensor() 1764 tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMUSVI_NB_CURRENTVID) & in smu8_read_sensor() 1770 tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMUSVI_GFX_CURRENTVID) & in smu8_read_sensor()
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H A D | smu7_hwmgr.c | 217 speedCntl = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__PCIE, in smu7_get_current_pcie_speed() 454 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in smu7_enable_display_gap() 581 tmp = (cgs_read_ind_register(hwmgr->device, in smu7_force_switch_to_arbf0() 1172 soft_register_value = cgs_read_ind_register(hwmgr->device, in smu7_disable_sclk_vce_handshake() 1188 soft_register_value = cgs_read_ind_register(hwmgr->device, in smu7_disable_handshake_uvd() 3986 tmp = cgs_read_ind_register(hwmgr->device, in smu7_get_gpu_power() 4028 activity_percent = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset); in smu7_read_sensor() 4793 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_SPLL_FUNC_CNTL); in smu7_read_clock_registers() 4795 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_SPLL_FUNC_CNTL_2); in smu7_read_clock_registers() 4797 cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_SPLL_FUNC_CNTL_3); in smu7_read_clock_registers() [all …]
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H A D | smu7_powertune.c | 912 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, config_regs->offset); in smu7_program_pt_config_registers() 916 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset); in smu7_program_pt_config_registers() 920 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset); in smu7_program_pt_config_registers()
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/openbmc/linux/drivers/gpu/drm/amd/include/ |
H A D | cgs_common.h | 134 …cgs_write_ind_register(device, space, ix##reg, (cgs_read_ind_register(device, space, ix##reg) & ~C… 169 #define cgs_read_ind_register(dev,space,index) \ macro
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 1678 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table() 1680 efuse2 = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table() 1737 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table() 1810 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); in fiji_populate_clock_stretcher_data_table() 2380 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_uvd_smc_table() 2416 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_vce_smc_table() 2583 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings() 2597 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings() 2618 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings() 2632 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings()
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H A D | tonga_smumgr.c | 1597 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table() 1599 efuse2 = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table() 1666 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table() 1737 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_populate_clock_stretcher_data_table() 2691 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in tonga_update_uvd_smc_table() 2726 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in tonga_update_vce_smc_table() 3182 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in tonga_update_dpm_settings() 3196 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in tonga_update_dpm_settings() 3217 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in tonga_update_dpm_settings() 3231 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in tonga_update_dpm_settings()
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H A D | polaris10_smumgr.c | 327 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_EFUSE_0 + (49*4)); in polaris10_is_hw_avfs_present() 1704 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); in polaris10_populate_clock_stretcher_data_table() 2296 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in polaris10_update_uvd_smc_table() 2332 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in polaris10_update_vce_smc_table() 2621 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings() 2635 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings() 2656 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings() 2670 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in polaris10_update_dpm_settings()
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H A D | vegam_smumgr.c | 345 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_uvd_smc_table() 381 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_vce_smc_table() 1540 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); in vegam_populate_clock_stretcher_data_table() 1551 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in vegam_is_hw_avfs_present()
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H A D | ci_smumgr.c | 190 && (0x20100 <= cgs_read_ind_register(hwmgr->device, in ci_is_smc_ram_running() 2794 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in ci_update_dpm_settings() 2808 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in ci_update_dpm_settings() 2829 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in ci_update_dpm_settings() 2843 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in ci_update_dpm_settings()
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H A D | smu7_smumgr.c | 163 && (0x20100 <= cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMC_PC_C))); in smu7_is_smc_ram_running()
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H A D | iceland_smumgr.c | 211 val = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in iceland_smu_upload_firmware_image()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/ |
H A D | dm_services.h | 76 return cgs_read_ind_register(ctx->cgs_device, addr_space, index); in dm_read_index_reg()
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