Searched refs:RVC (Results 1 – 13 of 13) sorted by relevance
/openbmc/u-boot/doc/ |
H A D | README.AX25 | 17 - RVC for 16-bit compressed instructions
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/openbmc/qemu/target/riscv/ |
H A D | cpu.c | 45 RVC, RVS, RVU, RVH, RVJ, RVG, RVB, 0}; 445 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVD | RVC | RVU); in riscv_any_cpu_init() 500 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv64_sifive_u_cpu_init() 518 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVC | RVU); in rv64_sifive_e_cpu_init() 535 riscv_cpu_set_misa_ext(env, RVG | RVC | RVS | RVU); in rv64_thead_c906_cpu_init() 567 riscv_cpu_set_misa_ext(env, RVG | RVC | RVS | RVU | RVH); in rv64_veyron_v1_cpu_init() 677 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVC | RVU); in rv32_sifive_e_cpu_init() 694 riscv_cpu_set_misa_ext(env, RVI | RVM | RVC | RVU); in rv32_ibex_cpu_init() 711 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVC | RVU); in rv32_imafcu_nommu_cpu_init() 1400 MISA_EXT_INFO(RVC, "c", "Compressed instructions"), [all …]
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H A D | op_helper.c | 272 if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) { in helper_sret() 322 if (!riscv_has_ext(env, RVC) && (retpc & 0x3)) { in helper_mret()
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H A D | translate.c | 563 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { in gen_jal() 1185 if ((has_ext(ctx, RVC) || ctx->cfg_ptr->ext_zca) && in decode_opc()
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H A D | cpu.h | 65 #define RVC RV('C') macro
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H A D | csr.c | 1691 if ((val & RVC) && (GETPC() & ~3) != 0) { in write_misa() 1692 val &= ~RVC; in write_misa()
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/openbmc/qemu/target/riscv/tcg/ |
H A D | tcg-cpu.c | 834 if (riscv_has_ext(env, RVC) && env->priv_ver >= PRIV_VERSION_1_12_0) { in cpu_enable_zc_implied_rules() 1044 MISA_CFG(RVC, true),
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/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvi.c.inc | 66 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { 184 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca &&
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H A D | trans_rvf.c.inc | 36 if (!has_ext(ctx, RVF) || !has_ext(ctx, RVC)) { \
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H A D | trans_rvd.c.inc | 36 if (!has_ext(ctx, RVD) || !has_ext(ctx, RVC)) { \
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/openbmc/qemu/target/riscv/kvm/ |
H A D | kvm-cpu.c | 180 KVM_MISA_CFG(RVC, KVM_RISCV_ISA_EXT_C),
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/openbmc/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 277 * RISC-V immediate and instruction encoders (excludes 16-bit RVC)
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/openbmc/qemu/linux-user/ |
H A D | syscall.c | 8909 value |= riscv_has_ext(env, RVC) ? in risc_hwprobe_fill_pairs()
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