Lines Matching refs:RVC
45 RVC, RVS, RVU, RVH, RVJ, RVG, RVB, 0};
445 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVD | RVC | RVU); in riscv_any_cpu_init()
500 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv64_sifive_u_cpu_init()
518 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVC | RVU); in rv64_sifive_e_cpu_init()
535 riscv_cpu_set_misa_ext(env, RVG | RVC | RVS | RVU); in rv64_thead_c906_cpu_init()
567 riscv_cpu_set_misa_ext(env, RVG | RVC | RVS | RVU | RVH); in rv64_veyron_v1_cpu_init()
659 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv32_sifive_u_cpu_init()
677 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVC | RVU); in rv32_sifive_e_cpu_init()
694 riscv_cpu_set_misa_ext(env, RVI | RVM | RVC | RVU); in rv32_ibex_cpu_init()
711 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVC | RVU); in rv32_imafcu_nommu_cpu_init()
1400 MISA_EXT_INFO(RVC, "c", "Compressed instructions"),
2213 .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVU,