Searched refs:PCI_BRIDGE_CTL_BUS_RESET (Results 1 – 14 of 14) sorted by relevance
56 bridge_ctl |= PCI_BRIDGE_CTL_BUS_RESET; in adf_reset_sbr()59 bridge_ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; in adf_reset_sbr()
184 ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; in ls_g4_pcie_reset()
607 val |= PCI_BRIDGE_CTL_BUS_RESET << 16; in mvebu_pci_bridge_emul_base_conf_read()609 val &= ~(PCI_BRIDGE_CTL_BUS_RESET << 16); in mvebu_pci_bridge_emul_base_conf_read()778 if (mask & (PCI_BRIDGE_CTL_BUS_RESET << 16)) { in mvebu_pci_bridge_emul_base_conf_write()780 if (new & (PCI_BRIDGE_CTL_BUS_RESET << 16)) in mvebu_pci_bridge_emul_base_conf_write()
803 val |= PCI_BRIDGE_CTL_BUS_RESET << 16; in advk_pci_bridge_emul_base_conf_read()805 val &= ~(PCI_BRIDGE_CTL_BUS_RESET << 16); in advk_pci_bridge_emul_base_conf_read()840 if (mask & (PCI_BRIDGE_CTL_BUS_RESET << 16)) { in advk_pci_bridge_emul_base_conf_write()842 if (new & (PCI_BRIDGE_CTL_BUS_RESET << 16)) in advk_pci_bridge_emul_base_conf_write()
301 status &= ~(PCI_BRIDGE_CTL_BUS_RESET|PCI_BRIDGE_CTL_FAST_BACK); in pcibios_fixup_bus()
163 PCI_BRIDGE_CTL_BUS_RESET |
5237 ctrl |= PCI_BRIDGE_CTL_BUS_RESET; in pci_reset_secondary_bus()5246 ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; in pci_reset_secondary_bus()
276 if (~oldctl & newctl & PCI_BRIDGE_CTL_BUS_RESET) { in pci_bridge_write_config()
931 PCI_BRIDGE_CTL_BUS_RESET | in pci_init_mask_bridge()1934 PCI_BRIDGE_CTL_BUS_RESET) /* Don't walk the bus if it's reset. */ && in pci_secondary_bus_in_range()
826 ctrl |= PCI_BRIDGE_CTL_BUS_RESET; in __pnv_eeh_bridge_reset()833 ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; in __pnv_eeh_bridge_reset()
166 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ macro
167 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ macro
1324 pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET; in stex_hard_reset()1332 pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET; in stex_hard_reset()
272 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ macro