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Searched refs:OMAP34XX_SDRC_CS0 (Results 1 – 25 of 38) sorted by relevance

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/openbmc/u-boot/include/configs/
H A Dcm_t35.h152 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
154 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
157 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
171 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Dmcx.h192 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
193 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
196 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
211 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Dam3517_crane.h158 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
159 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
162 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
176 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Dnokia_rx51.h304 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
305 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
308 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
321 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Dtricorder.h182 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000)
186 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
197 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Dtam3517-common.h85 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
86 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
89 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
103 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Domap3_pandora.h53 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
54 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
H A Domap3_logic.h178 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
179 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
H A Domap3_overo.h146 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
147 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
H A Dam3517_evm.h164 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
165 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
H A Dcm_t3517.h158 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
172 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Dtao3530.h140 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
154 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Dti_omap3_common.h45 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Dsniper.h39 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
H A Ddevkit8000.h143 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000)
/openbmc/u-boot/board/8dtech/eco5pk/
H A Deco5pk.c32 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
/openbmc/u-boot/board/ti/am3517crane/
H A Dam3517crane.c34 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
/openbmc/u-boot/board/isee/igep00x0/
H A Dcommon.c52 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
/openbmc/u-boot/board/quipos/cairo/
H A Dcairo.c37 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
/openbmc/u-boot/board/logicpd/zoom1/
H A Dzoom1.c72 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
/openbmc/u-boot/board/htkw/mcx/
H A Dmcx.c62 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
/openbmc/u-boot/board/pandora/
H A Dpandora.c60 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
/openbmc/u-boot/board/technexion/twister/
H A Dtwister.c70 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
/openbmc/u-boot/board/logicpd/am3517evm/
H A Dam3517evm.c51 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
/openbmc/u-boot/board/timll/devkit8000/
H A Ddevkit8000.c70 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()

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