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Searched refs:MCTL_CR_INTERLEAVED (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sunxi_dw.h55 #define MCTL_CR_INTERLEAVED (0x0 << 15) macro
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sunxi_dw.c339 writel(MCTL_CR_BL8 | MCTL_CR_INTERLEAVED | in mctl_set_cr()