#
e8f80a5a |
| 09-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sunxi
|
#
83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borro
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
show more ...
|
#
b55c89ce |
| 19-Dec-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-spi
|
#
76cc3728 |
| 19-Dec-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sunxi
|
#
b06c46de |
| 29-Nov-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2018.1 Zynq: - Add support for Syzygy and cc108 boards - Add support for mini
Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2018.1 Zynq: - Add support for Syzygy and cc108 boards - Add support for mini u-boot configurations (cse) - dts updates - config/defconfig updates in connection to Kconfig changes - Fix psu_init handling ZynqMP: - SPL fixes - Remove slcr.c - Fixing r5 startup sequence - Add support for external pmufw - Add support for new ZynqMP chips - dts updates - Add support for zcu102 rev1.0 board Drivers: - nand: Support external timing setting and board init - ahci: Fix wording - axi_emac: Wait for bit, non processor mode, readl/write conversion - zynq_gem: Fix SGMII/PCS support
show more ...
|
#
fcc8250c |
| 28-Nov-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-mips
|
#
74a48184 |
| 28-Nov-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-uniphier
|
#
ed3986ca |
| 21-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
bitops: collect BIT macros to include/linux/bitops.h Same macros are defined in various places. Collect them into include/linux/bitops.h like Linux. Signed-off-by: Masahiro Yam
bitops: collect BIT macros to include/linux/bitops.h Same macros are defined in various places. Collect them into include/linux/bitops.h like Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
show more ...
|
#
821560fd |
| 27-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://www.denx.de/git/u-boot-imx Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/imx6qdl_icore_rqs.h include/configs/imx6ul_gea
Merge git://www.denx.de/git/u-boot-imx Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/imx6qdl_icore_rqs.h include/configs/imx6ul_geam.h include/configs/imx6ul_isiot.h
show more ...
|
#
235c5b83 |
| 21-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-samsung
|
#
784667d7 |
| 21-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2017.07 ZynqMP: - config cleanup - SD LS mode support - psu_init* cleanup
Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2017.07 ZynqMP: - config cleanup - SD LS mode support - psu_init* cleanup - unmap OCM - Support for SMC Zynq: - add ddrc to Kconfig - add topic-miamilite board support
show more ...
|
#
eab76dfd |
| 19-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-usb
|
#
ebba9d1d |
| 19-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
|
#
f6457ce5 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: Add selective DRAM type and timing DRAM chip varies, and one code cannot satisfy all DRAMs. Add options to select a timing set. Currently only DDR3-1333 (the origina
sunxi: Add selective DRAM type and timing DRAM chip varies, and one code cannot satisfy all DRAMs. Add options to select a timing set. Currently only DDR3-1333 (the original set) is added into it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
show more ...
|
#
f43a0099 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: Rename bus-width related macros in H3 DRAM code The DesignWare DRAM controller used by H3 and newer SoCs use a bit to identify whether the DRAM is half-width. As H3 itsel
sunxi: Rename bus-width related macros in H3 DRAM code The DesignWare DRAM controller used by H3 and newer SoCs use a bit to identify whether the DRAM is half-width. As H3 itself come with 32-bit DRAM, the two modes of the bit used to be named "MCTL_CR_32BIT" and "MCTL_CR_16BIT", but for SoCs with 16-bit DRAM they're really 8-bit and 16-bit. Rename the bit's macro, and also rename the variable name in dram_sun8i_h3.c. This commit do not add 16-bit DRAM controller support, but the support will be introduced in next commit. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
show more ...
|
#
9934aba4 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: makes an invisible option for H3-like DRAM controllers Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like DesignWare DRAM controller, which do not have official free
sunxi: makes an invisible option for H3-like DRAM controllers Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like DesignWare DRAM controller, which do not have official free DRAM initialization code, but can use modified dram_sun8i_h3.c. Add a invisible option for easier DRAM initialization code reuse. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
show more ...
|