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Searched refs:Engine (Results 1 – 25 of 210) sorted by relevance

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/openbmc/linux/drivers/crypto/aspeed/
H A DKconfig6 Hash and Crypto Engine (HACE) is designed to accelerate the
22 bool "Enable Aspeed Hash & Crypto Engine (HACE) hash"
29 Select here to enable Aspeed Hash & Crypto Engine (HACE)
35 bool "Enable Aspeed Hash & Crypto Engine (HACE) crypto"
45 Select here to enable Aspeed Hash & Crypto Engine (HACE)
51 bool "Enable Aspeed ACRY RSA Engine"
56 Select here to enable Aspeed ECC/RSA Engine (ACRY)
/openbmc/linux/Documentation/devicetree/bindings/mips/cavium/
H A Ddma-engine.txt1 * DMA Engine.
3 The Octeon DMA Engine transfers between the Boot Bus and main memory.
4 The DMA Engine will be referred to by phandle by any device that is
12 - reg: The base address of the DMA Engine's register bank.
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnvidia,tegra-vde.yaml7 title: NVIDIA Tegra Video Decoder Engine
97 reg = <0x6001a000 0x1000>, /* Syntax Engine */
98 <0x6001b000 0x1000>, /* Video Bitstream Engine */
99 <0x6001c000 0x100>, /* Macroblock Engine */
100 <0x6001c200 0x100>, /* Post-processing Engine */
101 <0x6001c400 0x100>, /* Motion Compensation Engine */
102 <0x6001c600 0x100>, /* Transform Engine */
H A Dnuvoton,npcm-vcd.yaml7 title: Nuvoton NPCM Video Capture/Differentiation Engine
14 Video Capture/Differentiation Engine (VCD) present on Nuvoton NPCM SoCs.
41 description: phandle to access ECE (Encoding Compression Engine) registers.
H A Dnuvoton,npcm-ece.yaml7 title: Nuvoton NPCM Encoding Compression Engine
14 Video Encoding Compression Engine (ECE) present on Nuvoton NPCM SoCs.
H A Daspeed-video.txt1 * Device tree bindings for Aspeed Video Engine
3 The Video Engine (VE) embedded in the Aspeed AST2400/2500/2600 SOCs can
/openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Draideng.txt1 * Freescale 85xx RAID Engine nodes
3 RAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID
4 Engine should have a separate node.
12 This identifies RAID Engine block. 1 in 1.0 represents
30 There must be a sub-node for each job queue present in RAID Engine
31 This node must be a sub-node of the main RAID Engine node
48 There must be a sub-node for each job ring present in RAID Engine
/openbmc/linux/drivers/gpu/drm/sun4i/
H A DKconfig3 tristate "DRM Support for Allwinner A10 Display Engine"
13 Display Engine. If M is selected the module will be called
36 tristate "Support for Allwinner A10 Display Engine Backend"
41 original Allwinner Display Engine, which has a backend to
65 have a Display Engine 2.0 contain this controller. If M is
69 tristate "Support for Allwinner Display Engine 2.0 Mixer"
73 Allwinner Display Engine 2.0, which has a mixer to do some
/openbmc/u-boot/drivers/qe/
H A DKconfig2 # QUICC Engine Drivers
5 bool "Enable support for U QUICC Engine"
12 Choose this option to add support for U QUICC Engine.
/openbmc/linux/drivers/media/platform/nuvoton/
H A DKconfig6 tristate "Nuvoton NPCM Video Capture/Encode Engine driver"
11 Support for the Video Capture/Differentiation Engine (VCD) and
12 Encoding Compression Engine (ECE) present on Nuvoton NPCM SoCs.
/openbmc/linux/drivers/crypto/allwinner/
H A DKconfig45 tristate "Support for Allwinner Crypto Engine cryptographic offloader"
55 Select y here to have support for the crypto Engine available on
57 The Crypto Engine handle AES/3DES ciphers in ECB/CBC mode.
82 bool "Support for Allwinner Crypto Engine PRNG"
87 the Pseudo-Random Number Generator found in the Crypto Engine.
90 bool "Support for Allwinner Crypto Engine TRNG"
95 the True Random Number Generator found in the Crypto Engine.
/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Daspeed,ast2500-hace.yaml13 The Hash and Crypto Engine (HACE) is designed to accelerate the throughput
15 divided into two independently engines - Hash Engine and Crypto Engine.
H A Daspeed,ast2600-acry.yaml15 divided into two independent engines - ECC Engine and RSA Engine.
/openbmc/linux/Documentation/leds/
H A Dleds-lp5562.rst35 Red ... Engine 1 (fixed)
36 Green ... Engine 2 (fixed)
37 Blue ... Engine 3 (fixed)
38 White ... Engine 1 or 2 or 3 (selective)
46 Engine mux has two different mode, RGB and W.
/openbmc/linux/drivers/media/platform/aspeed/
H A DKconfig6 tristate "Aspeed AST2400 and AST2500 Video Engine driver"
12 Support for the Aspeed Video Engine (VE) embedded in the Aspeed
/openbmc/u-boot/doc/imx/habv4/csf_examples/mx6_mx7/
H A Dcsf_uboot_fast_authentication.txt4 Engine Configuration = 0
7 Engine = CAAM
H A Dcsf_uboot.txt4 Engine Configuration = 0
7 Engine = CAAM
/openbmc/linux/drivers/gpu/drm/mcde/
H A DKconfig2 tristate "DRM Support for ST-Ericsson MCDE (Multichannel Display Engine)"
17 Multi-Channel Display Engine.
/openbmc/u-boot/drivers/crypto/
H A DKconfig4 bool "ASPEED Hash and Crypto Engine (V1)"
23 bool "ASPEED Hash and Crypto Engine"
36 bool "ASPEED ECC/RSA Engine"
/openbmc/openbmc/poky/meta/files/common-licenses/
H A DZend-2.01 The Zend Engine License, version 2.00
10 …3. The names "Zend" and "Zend Engine" must not be used to endorse or promote products derived from…
14 …ust retain the following acknowledgment: "This product includes the Zend Engine, freely available …
16 …se of this software must display the following acknowledgment: "The Zend Engine is freely availabl…
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dmediatek,gce-mailbox.yaml7 title: Mediatek Global Command Engine Mailbox
13 The Global Command Engine (GCE) is used to help read/write registers with
46 - description: Global Command Engine clock
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Darm,malidp.yaml32 The interrupt used by the Display Engine (DE). Can be shared with
33 the interrupt for the Scaling Engine (SE), but it will have to be
36 The interrupt used by the Scaling Engine (SE). Can be shared with
37 the interrupt for the Display Engine (DE), but it will have to be
/openbmc/u-boot/doc/imx/habv4/csf_examples/additional_images/
H A Dcsf_additional_images.txt4 Engine Configuration = 0
7 Engine = CAAM
/openbmc/linux/drivers/crypto/hisilicon/
H A DKconfig12 Support for Hisilicon SEC Engine in Hip06 and Hip07
35 Support for HiSilicon SEC Engine of version 2 in crypto subsystem.
75 Support for HiSilicon HPRE(High Performance RSA Engine)
/openbmc/linux/Documentation/ABI/testing/
H A Ddebugfs-driver-qat6 received from the FW for each Acceleration Engine
9 <N>: Number of requests sent from Acceleration Engine N to FW and responses
10 Acceleration Engine N received from FW

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