Searched refs:EMAC1_RESET (Results 1 – 13 of 13) sorted by relevance
/openbmc/linux/include/dt-bindings/reset/ |
H A D | altr,rst-mgr.h | 18 #define EMAC1_RESET 33 macro
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H A D | altr,rst-mgr-s10.h | 20 #define EMAC1_RESET 33 macro
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H A D | altr,rst-mgr-a10.h | 17 #define EMAC1_RESET 33 macro
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/openbmc/u-boot/include/dt-bindings/reset/ |
H A D | altr,rst-mgr.h | 18 #define EMAC1_RESET 33 macro
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H A D | altr,rst-mgr-s10.h | 19 #define EMAC1_RESET 33 macro
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H A D | altr,rst-mgr-a10.h | 25 #define EMAC1_RESET 33 macro
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/openbmc/u-boot/arch/arm/dts/ |
H A D | socfpga_stratix10.dtsi | 108 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
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H A D | socfpga_arria10.dtsi | 468 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
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H A D | socfpga.dtsi | 573 resets = <&rst EMAC1_RESET>;
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/openbmc/linux/arch/arm64/boot/dts/altera/ |
H A D | socfpga_stratix10.dtsi | 173 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
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/openbmc/linux/arch/arm64/boot/dts/intel/ |
H A D | socfpga_agilex.dtsi | 178 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
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/openbmc/linux/arch/arm/boot/dts/intel/socfpga/ |
H A D | socfpga.dtsi | 597 resets = <&rst EMAC1_RESET>;
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H A D | socfpga_arria10.dtsi | 462 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
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