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Searched refs:CLK_PERI_UART2_SEL (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8135-clk.h182 #define CLK_PERI_UART2_SEL 44 macro
H A Dmediatek,mt6795-clk.h207 #define CLK_PERI_UART2_SEL 32 macro
H A Dmt8173-clk.h231 #define CLK_PERI_UART2_SEL 38 macro
H A Dmt2701-clk.h270 #define CLK_PERI_UART2_SEL 47 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-pericfg.c44 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
H A Dclk-mt6795-pericfg.c35 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
H A Dclk-mt8135.c502 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
H A Dclk-mt2701.c881 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents,
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt8135.dtsi244 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
H A Dmt2701.dtsi279 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
H A Dmt7623.dtsi402 clocks = <&pericfg CLK_PERI_UART2_SEL>,
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi541 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
H A Dmt8173.dtsi692 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;