Searched refs:CLK_PERI_UART2_SEL (Results 1 – 13 of 13) sorted by relevance
/openbmc/linux/include/dt-bindings/clock/ |
H A D | mt8135-clk.h | 182 #define CLK_PERI_UART2_SEL 44 macro
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H A D | mediatek,mt6795-clk.h | 207 #define CLK_PERI_UART2_SEL 32 macro
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H A D | mt8173-clk.h | 231 #define CLK_PERI_UART2_SEL 38 macro
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H A D | mt2701-clk.h | 270 #define CLK_PERI_UART2_SEL 47 macro
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | clk-mt8173-pericfg.c | 44 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
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H A D | clk-mt6795-pericfg.c | 35 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
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H A D | clk-mt8135.c | 502 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
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H A D | clk-mt2701.c | 881 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents,
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/openbmc/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt8135.dtsi | 244 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
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H A D | mt2701.dtsi | 279 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
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H A D | mt7623.dtsi | 402 clocks = <&pericfg CLK_PERI_UART2_SEL>,
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt6795.dtsi | 541 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
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H A D | mt8173.dtsi | 692 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
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