Searched refs:RGMII (Results 151 – 175 of 176) sorted by relevance
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254 - description: Reference clock for RGMII
39 RMII/RGMII Interfaces support
159 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
29 - eTSEC1, RGMII: one 10/100/1000 port using Vitesse VSC8641XKO
47 Ethernet Two RGMII interfaces
109 (port 1) with selectable RGMII and RMII interfaces and an internal
442 if (fec->xcv_type == RGMII) in fec_reg_setup()1396 priv->xcv_type = RGMII; in fecmxc_probe()
730 pinctrl_eqos_rgmii: dhcom-eqos-rgmii-grp { /* RGMII */789 pinctrl_fec_rgmii: dhcom-fec-rgmii-grp { /* RGMII */
43 * typespecific RGMII signals and Apalis UART2_RTS UART2_CTS.
47 Support two on-board RGMII 10/100/1G ethernet ports.
27 6..17 - RGMII
441 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0 /* RGMII Phy Reset */
249 /* Reduce EMI emission by reducing RGMII drive strength */
275 * data lines in RGMII mode use DDR mode
658 * data lines in RGMII mode use DDR mode
738 * data lines in RGMII mode use DDR mode
612 * data lines in RGMII mode use DDR mode
562 /* Verdin ETH_1 RGMII (On-module PHY) */580 /* Verdin ETH_2 RGMII */
325 mdio@10 { /* RGMII */
985 * data lines in RGMII mode use DDR mode
743 * data lines in RGMII mode use DDR mode
588 * data lines in RGMII mode use DDR mode
656 * data lines in RGMII mode use DDR mode
881 * data lines in RGMII mode use DDR mode
2477 movne r2, #0x02 @ if RGMII, set MHCLK = HPLL/6