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/openbmc/linux/drivers/usb/host/
H A Dxhci.c3 * xHCI host controller driver
23 #include "xhci.h"
24 #include "xhci-trace.h"
25 #include "xhci-debugfs.h"
26 #include "xhci-dbgcap.h"
86 * Disable interrupts and begin the xHCI halting process.
88 void xhci_quiesce(struct xhci_hcd *xhci) in xhci_quiesce() argument
95 halted = readl(&xhci->op_regs->status) & STS_HALT; in xhci_quiesce()
99 cmd = readl(&xhci->op_regs->command); in xhci_quiesce()
101 writel(cmd, &xhci->op_regs->command); in xhci_quiesce()
[all …]
H A Dxhci-mem.c3 * xHCI host controller driver
18 #include "xhci.h"
19 #include "xhci-trace.h"
20 #include "xhci-debugfs.h"
29 static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, in xhci_segment_alloc() argument
37 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_segment_alloc()
43 seg->trbs = dma_pool_zalloc(xhci->segment_pool, flags, &dma); in xhci_segment_alloc()
53 dma_pool_free(xhci->segment_pool, seg->trbs, dma); in xhci_segment_alloc()
69 static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg) in xhci_segment_free() argument
72 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); in xhci_segment_free()
[all …]
H A Dxhci-pci.c3 * xHCI host controller driver PCI Bus Glue.
18 #include "xhci.h"
19 #include "xhci-trace.h"
20 #include "xhci-pci.h"
97 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci) in xhci_msix_sync_irqs() argument
99 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_msix_sync_irqs()
105 for (i = 0; i < xhci->msix_count; i++) in xhci_msix_sync_irqs()
111 static void xhci_cleanup_msix(struct xhci_hcd *xhci) in xhci_cleanup_msix() argument
113 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_cleanup_msix()
123 for (i = 0; i < xhci->msix_count; i++) in xhci_cleanup_msix()
[all …]
H A Dxhci-plat.c3 * xhci-plat.c - xHCI host controller driver platform Bus Glue.
8 * A lot of code borrowed from the Linux xHCI driver.
24 #include "xhci.h"
25 #include "xhci-plat.h"
26 #include "xhci-mvebu.h"
77 static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) in xhci_plat_quirks() argument
79 struct xhci_plat_priv *priv = xhci_to_priv(xhci); in xhci_plat_quirks()
81 xhci->quirks |= priv->quirks; in xhci_plat_quirks()
118 .compatible = "generic-xhci",
120 .compatible = "xhci-platform",
[all …]
H A Dxhci-ring.c3 * xHCI host controller driver
59 #include "xhci.h"
60 #include "xhci-trace.h"
62 static int queue_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
143 static void next_trb(struct xhci_hcd *xhci, in next_trb() argument
159 void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring) in inc_deq() argument
179 xhci_warn(xhci, "Missing link TRB at end of segment\n"); in inc_deq()
189 xhci_warn(xhci, "Ring is an endless link TRB loop\n"); in inc_deq()
210 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
215 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, in inc_enq() argument
[all …]
H A DMakefile6 # tell define_trace.h where to find the xhci trace header
14 xhci-hcd-y := xhci.o xhci-mem.o xhci-ext-caps.o
15 xhci-hcd-y += xhci-ring.o xhci-hub.o xhci-dbg.o
16 xhci-hcd-y += xhci-trace.o
19 xhci-hcd-y += xhci-dbgcap.o xhci-dbgtty.o
22 xhci-mtk-hcd-y := xhci-mtk.o xhci-mtk-sch.o
24 xhci-plat-hcd-y := xhci-plat.o
26 xhci-plat-hcd-y += xhci-mvebu.o
29 xhci-hcd-y += xhci-debugfs.o
32 xhci-rcar-hcd-y += xhci-rcar.o
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H A Dxhci-hub.c3 * xHCI host controller driver
16 #include "xhci.h"
17 #include "xhci-trace.h"
35 static int xhci_create_usb3x_bos_desc(struct xhci_hcd *xhci, char *buf, in xhci_create_usb3x_bos_desc() argument
60 for (i = 0; i < xhci->num_port_caps; i++) { in xhci_create_usb3x_bos_desc()
61 u8 major = xhci->port_caps[i].maj_rev; in xhci_create_usb3x_bos_desc()
62 u8 minor = xhci->port_caps[i].min_rev; in xhci_create_usb3x_bos_desc()
67 port_cap = &xhci->port_caps[i]; in xhci_create_usb3x_bos_desc()
111 reg = readl(&xhci->cap_regs->hcc_params); in xhci_create_usb3x_bos_desc()
115 if ((xhci->quirks & XHCI_LPM_SUPPORT)) { in xhci_create_usb3x_bos_desc()
[all …]
H A Dxhci-debugfs.c3 * xhci-debugfs.c - xHCI debugfs interface
13 #include "xhci.h"
14 #include "xhci-debugfs.h"
86 static struct xhci_regset *xhci_debugfs_alloc_regset(struct xhci_hcd *xhci) in xhci_debugfs_alloc_regset() argument
99 list_add_tail(&regset->list, &xhci->regset_list); in xhci_debugfs_alloc_regset()
114 static void xhci_debugfs_regset(struct xhci_hcd *xhci, u32 base, in xhci_debugfs_regset() argument
122 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_debugfs_regset()
124 rgs = xhci_debugfs_alloc_regset(xhci); in xhci_debugfs_regset()
141 static void xhci_debugfs_extcap_regset(struct xhci_hcd *xhci, int cap_id, in xhci_debugfs_extcap_regset() argument
148 void __iomem *base = &xhci->cap_regs->hc_capbase; in xhci_debugfs_extcap_regset()
[all …]
H A Dxhci-histb.c3 * xHCI host controller driver for HiSilicon STB SoCs
19 #include "xhci.h"
69 * refer to xHCI spec in xhci_histb_config()
193 struct xhci_hcd *xhci; in xhci_histb_probe() local
252 xhci = hcd_to_xhci(hcd); in xhci_histb_probe()
256 xhci->main_hcd = hcd; in xhci_histb_probe()
257 xhci->shared_hcd = usb_create_shared_hcd(driver, dev, dev_name(dev), in xhci_histb_probe()
259 if (!xhci->shared_hcd) { in xhci_histb_probe()
265 xhci->quirks |= XHCI_HW_LPM_DISABLE; in xhci_histb_probe()
268 xhci->quirks |= XHCI_LPM_SUPPORT; in xhci_histb_probe()
[all …]
H A Dxhci-debugfs.h3 * xhci-debugfs.h - xHCI debugfs interface
107 void xhci_debugfs_init(struct xhci_hcd *xhci);
108 void xhci_debugfs_exit(struct xhci_hcd *xhci);
111 void xhci_debugfs_create_slot(struct xhci_hcd *xhci, int slot_id);
112 void xhci_debugfs_remove_slot(struct xhci_hcd *xhci, int slot_id);
113 void xhci_debugfs_create_endpoint(struct xhci_hcd *xhci,
116 void xhci_debugfs_remove_endpoint(struct xhci_hcd *xhci,
119 void xhci_debugfs_create_stream_files(struct xhci_hcd *xhci,
123 static inline void xhci_debugfs_init(struct xhci_hcd *xhci) { } in xhci_debugfs_init() argument
124 static inline void xhci_debugfs_exit(struct xhci_hcd *xhci) { } in xhci_debugfs_exit() argument
[all …]
H A Dxhci-mtk.c3 * MediaTek xHCI Host Controller Driver
24 #include "xhci.h"
25 #include "xhci-mtk.h"
61 /* xHCI CSR */
145 if (!of_device_is_compatible(dev->of_node, "mediatek,mt8195-xhci")) in xhci_mtk_set_frame_interval()
451 static void xhci_mtk_quirks(struct device *dev, struct xhci_hcd *xhci) in xhci_mtk_quirks() argument
453 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_mtk_quirks()
456 xhci->quirks |= XHCI_MTK_HOST; in xhci_mtk_quirks()
461 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; in xhci_mtk_quirks()
463 xhci->quirks |= XHCI_LPM_SUPPORT; in xhci_mtk_quirks()
[all …]
H A Dxhci.h4 * xHCI host controller driver
22 /* Code sharing between pci-quirks and xhci hcd */
23 #include "xhci-ext-caps.h"
26 #include "xhci-port.h"
27 #include "xhci-caps.h"
32 /* xHCI PCI Configuration Registers */
41 * xHCI register interface.
42 * This corresponds to the eXtensible Host Controller Interface (xHCI)
47 * struct xhci_cap_regs - xHCI Host Controller Capability Registers.
55 * @hcc_params2: HCCPARAMS2 Capability Parameters 2, xhci 1.1 only
[all …]
H A Dxhci-rcar.c3 * xHCI host controller driver for R-Car SoCs
15 #include "xhci.h"
16 #include "xhci-plat.h"
17 #include "xhci-rzv2m.h"
93 return of_device_is_compatible(node, "renesas,xhci-r8a7790") || in xhci_rcar_is_gen2()
94 of_device_is_compatible(node, "renesas,xhci-r8a7791") || in xhci_rcar_is_gen2()
95 of_device_is_compatible(node, "renesas,xhci-r8a7793") || in xhci_rcar_is_gen2()
96 of_device_is_compatible(node, "renesas,rcar-gen2-xhci"); in xhci_rcar_is_gen2()
206 * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
238 .compatible = "renesas,xhci-r8a7790",
[all …]
/openbmc/qemu/hw/usb/
H A Dhcd-xhci.c2 * USB xHCI controller emulation
32 #include "hcd-xhci.h"
272 XHCIState *xhci; member
305 static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
308 static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid,
311 static void xhci_event(XHCIState *xhci, XHCIEvent *event, int v);
312 static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v);
425 bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) in xhci_get_flag() argument
427 return xhci->flags & (1 << bit); in xhci_get_flag()
430 void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) in xhci_set_flag() argument
[all …]
H A Dhcd-xhci-sysbus.c2 * USB xHCI controller for system-bus interface
15 #include "hcd-xhci-sysbus.h"
19 static bool xhci_sysbus_intr_raise(XHCIState *xhci, int n, bool level) in xhci_sysbus_intr_raise() argument
21 XHCISysbusState *s = container_of(xhci, XHCISysbusState, xhci); in xhci_sysbus_intr_raise()
32 device_cold_reset(DEVICE(&s->xhci)); in xhci_sysbus_reset()
39 object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL); in xhci_sysbus_realize()
40 if (!qdev_realize(DEVICE(&s->xhci), NULL, errp)) { in xhci_sysbus_realize()
43 s->irq = g_new0(qemu_irq, s->xhci.numintrs); in xhci_sysbus_realize()
45 s->xhci.numintrs); in xhci_sysbus_realize()
46 if (s->xhci.dma_mr) { in xhci_sysbus_realize()
[all …]
H A Dhcd-xhci-pci.c2 * USB xHCI controller with PCI bus emulation
9 * SPDX-sourceInfo: Moved the pci specific content for hcd-xhci.c to
10 * hcd-xhci-pci.c
31 #include "hcd-xhci-pci.h"
38 static void xhci_pci_intr_update(XHCIState *xhci, int n, bool enable) in xhci_pci_intr_update() argument
40 XHCIPciState *s = container_of(xhci, XHCIPciState, xhci); in xhci_pci_intr_update()
46 if (enable == !!xhci->intr[n].msix_used) { in xhci_pci_intr_update()
52 xhci->intr[n].msix_used = true; in xhci_pci_intr_update()
56 xhci->intr[n].msix_used = false; in xhci_pci_intr_update()
60 static bool xhci_pci_intr_raise(XHCIState *xhci, int n, bool level) in xhci_pci_intr_raise() argument
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Drenesas,usb-xhci.yaml4 $id: http://devicetree.org/schemas/usb/renesas,usb-xhci.yaml#
7 title: Renesas USB xHCI controllers
18 - renesas,xhci-r8a7742 # RZ/G1H
19 - renesas,xhci-r8a7743 # RZ/G1M
20 - renesas,xhci-r8a7744 # RZ/G1N
21 - renesas,xhci-r8a7790 # R-Car H2
22 - renesas,xhci-r8a7791 # R-Car M2-W
23 - renesas,xhci-r8a7793 # R-Car M2-N
24 - const: renesas,rcar-gen2-xhci # R-Car Gen2 and RZ/G1
27 - renesas,xhci-r8a774a1 # RZ/G2M
[all …]
H A Dgeneric-xhci.yaml4 $id: http://devicetree.org/schemas/usb/generic-xhci.yaml#
7 title: USB xHCI Controller
13 - $ref: usb-xhci.yaml#
18 - description: Generic xHCI device
19 const: generic-xhci
23 - marvell,armada3700-xhci
24 - marvell,armada-375-xhci
25 - marvell,armada-380-xhci
26 - marvell,armada-8k-xhci
27 - const: generic-xhci
[all …]
H A Dmediatek,mtk-xhci.yaml5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
8 title: MediaTek USB3 xHCI
14 - $ref: usb-xhci.yaml
18 case 1: only supports xHCI driver;
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
28 - mediatek,mt7622-xhci
29 - mediatek,mt7623-xhci
30 - mediatek,mt7629-xhci
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Drealtek,usb2phy.yaml15 The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs
16 support multiple XHCI controllers. One PHY device node maps to one XHCI
20 The USB architecture includes three XHCI controllers.
21 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
23 XHCI controller#0 -- usb2phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
30 The USB architecture includes two XHCI controllers.
33 XHCI controller#0 -- usb2phy -- phy#0
34 XHCI controller#1 -- usb2phy -- phy#0
[all …]
H A Drealtek,usb3phy.yaml15 The USB 3.0 PHY driver is designed to support the XHCI controller. The SoCs
16 support multiple XHCI controllers. One PHY device node maps to one XHCI
20 The USB architecture includes three XHCI controllers.
21 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
23 XHCI controller#0 -- usb2phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
30 The USB architecture includes three XHCI controllers.
31 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
32 XHCI controller#0 -- usb2phy -- phy#0
[all …]
/openbmc/linux/drivers/usb/dwc3/
H A Dhost.c16 #include "../host/xhci-plat.h"
86 struct platform_device *xhci; in dwc3_host_init() local
94 xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO); in dwc3_host_init()
95 if (!xhci) { in dwc3_host_init()
96 dev_err(dwc->dev, "couldn't allocate xHCI device\n"); in dwc3_host_init()
100 xhci->dev.parent = dwc->dev; in dwc3_host_init()
102 dwc->xhci = xhci; in dwc3_host_init()
104 ret = platform_device_add_resources(xhci, dwc->xhci_resources, in dwc3_host_init()
107 dev_err(dwc->dev, "couldn't add resources to xHCI device\n"); in dwc3_host_init()
113 props[prop_idx++] = PROPERTY_ENTRY_BOOL("xhci-sg-trb-cache-size-quirk"); in dwc3_host_init()
[all …]
/openbmc/linux/drivers/usb/cdns3/
H A Dhost.c18 #include "../host/xhci.h"
19 #include "../host/xhci-plat.h"
34 struct xhci_hcd *xhci = hcd_to_xhci(hcd); in xhci_cdns3_plat_start() local
38 value = readl(&xhci->op_regs->command); in xhci_cdns3_plat_start()
40 writel(value, &xhci->op_regs->command); in xhci_cdns3_plat_start()
71 struct platform_device *xhci; in __cdns_host_init() local
77 xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO); in __cdns_host_init()
78 if (!xhci) { in __cdns_host_init()
79 dev_err(cdns->dev, "couldn't allocate xHCI device\n"); in __cdns_host_init()
83 xhci->dev.parent = cdns->dev; in __cdns_host_init()
[all …]
/openbmc/u-boot/drivers/usb/host/
H A DMakefile46 # xhci
47 obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
48 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
50 obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
51 obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o
52 obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
53 obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
54 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
55 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
56 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
[all …]
/openbmc/u-boot/doc/device-tree-bindings/usb/
H A Dmarvell.xhci-usb.txt4 It uses the same properties as a generic XHCI host controller
8 - "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs
9 - "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs
10 - reg: should contain address and length of the standard XHCI
12 - interrupts: one XHCI interrupt should be described here.
21 compatible = "marvell,armada-8k-xhci",
22 "generic-xhci";

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