Lines Matching full:xhci
2 * USB xHCI controller emulation
32 #include "hcd-xhci.h"
272 XHCIState *xhci; member
305 static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
308 static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid,
311 static void xhci_event(XHCIState *xhci, XHCIEvent *event, int v);
312 static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v);
425 bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) in xhci_get_flag() argument
427 return xhci->flags & (1 << bit); in xhci_get_flag()
430 void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) in xhci_set_flag() argument
432 xhci->flags |= (1 << bit); in xhci_set_flag()
435 static uint64_t xhci_mfindex_get(XHCIState *xhci) in xhci_mfindex_get() argument
438 return (now - xhci->mfindex_start) / 125000; in xhci_mfindex_get()
441 static void xhci_mfwrap_update(XHCIState *xhci) in xhci_mfwrap_update() argument
447 if ((xhci->usbcmd & bits) == bits) { in xhci_mfwrap_update()
449 mfindex = ((now - xhci->mfindex_start) / 125000) & 0x3fff; in xhci_mfwrap_update()
451 timer_mod(xhci->mfwrap_timer, now + left * 125000); in xhci_mfwrap_update()
453 timer_del(xhci->mfwrap_timer); in xhci_mfwrap_update()
459 XHCIState *xhci = opaque; in xhci_mfwrap_timer() local
462 xhci_event(xhci, &wrap, 0); in xhci_mfwrap_timer()
463 xhci_mfwrap_update(xhci); in xhci_mfwrap_timer()
466 static void xhci_die(XHCIState *xhci) in xhci_die() argument
468 xhci->usbsts |= USBSTS_HCE; in xhci_die()
469 DPRINTF("xhci: asserted controller error\n"); in xhci_die()
490 static inline void xhci_dma_read_u32s(XHCIState *xhci, dma_addr_t addr, in xhci_dma_read_u32s() argument
497 if (dma_memory_read(xhci->as, addr, buf, len, in xhci_dma_read_u32s()
502 xhci_die(xhci); in xhci_dma_read_u32s()
511 static inline void xhci_dma_write_u32s(XHCIState *xhci, dma_addr_t addr, in xhci_dma_write_u32s() argument
524 if (dma_memory_write(xhci->as, addr, tmp, len, in xhci_dma_write_u32s()
528 xhci_die(xhci); in xhci_dma_write_u32s()
533 static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) in xhci_lookup_port() argument
544 index = uport->index + xhci->numports_3; in xhci_lookup_port()
552 return &xhci->ports[index]; in xhci_lookup_port()
555 static void xhci_intr_update(XHCIState *xhci, int v) in xhci_intr_update() argument
560 if (xhci->intr[0].iman & IMAN_IP && in xhci_intr_update()
561 xhci->intr[0].iman & IMAN_IE && in xhci_intr_update()
562 xhci->usbcmd & USBCMD_INTE) { in xhci_intr_update()
565 if (xhci->intr_raise) { in xhci_intr_update()
566 if (xhci->intr_raise(xhci, 0, level)) { in xhci_intr_update()
567 xhci->intr[0].iman &= ~IMAN_IP; in xhci_intr_update()
571 if (xhci->intr_update) { in xhci_intr_update()
572 xhci->intr_update(xhci, v, in xhci_intr_update()
573 xhci->intr[v].iman & IMAN_IE); in xhci_intr_update()
577 static void xhci_intr_raise(XHCIState *xhci, int v) in xhci_intr_raise() argument
579 bool pending = (xhci->intr[v].erdp_low & ERDP_EHB); in xhci_intr_raise()
581 xhci->intr[v].erdp_low |= ERDP_EHB; in xhci_intr_raise()
582 xhci->intr[v].iman |= IMAN_IP; in xhci_intr_raise()
583 xhci->usbsts |= USBSTS_EINT; in xhci_intr_raise()
588 if (!(xhci->intr[v].iman & IMAN_IE)) { in xhci_intr_raise()
592 if (!(xhci->usbcmd & USBCMD_INTE)) { in xhci_intr_raise()
595 if (xhci->intr_raise) { in xhci_intr_raise()
596 if (xhci->intr_raise(xhci, v, true)) { in xhci_intr_raise()
597 xhci->intr[v].iman &= ~IMAN_IP; in xhci_intr_raise()
602 static inline int xhci_running(XHCIState *xhci) in xhci_running() argument
604 return !(xhci->usbsts & USBSTS_HCH); in xhci_running()
607 static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v) in xhci_write_event() argument
609 XHCIInterrupter *intr = &xhci->intr[v]; in xhci_write_event()
627 if (dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE, in xhci_write_event()
631 xhci_die(xhci); in xhci_write_event()
641 static void xhci_event(XHCIState *xhci, XHCIEvent *event, int v) in xhci_event() argument
647 if (v >= xhci->numintrs) { in xhci_event()
648 DPRINTF("intr nr out of range (%d >= %d)\n", v, xhci->numintrs); in xhci_event()
651 intr = &xhci->intr[v]; in xhci_event()
656 DPRINTF("xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); in xhci_event()
657 DPRINTF("xhci: ER[%d] at "DMA_ADDR_FMT" len %d\n", in xhci_event()
659 xhci_die(xhci); in xhci_event()
667 DPRINTF("xhci: ER %d full, send ring full error\n", v); in xhci_event()
669 xhci_write_event(xhci, &full, v); in xhci_event()
671 DPRINTF("xhci: ER %d full, drop event\n", v); in xhci_event()
673 xhci_write_event(xhci, event, v); in xhci_event()
676 xhci_intr_raise(xhci, v); in xhci_event()
679 static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring, in xhci_ring_init() argument
686 static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb, in xhci_ring_fetch() argument
693 if (dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE, in xhci_ring_fetch()
733 static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) in xhci_ring_chain_length() argument
745 if (dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE, in xhci_ring_chain_length()
786 * According to the xHCI spec, Transfer Ring segments should have in xhci_ring_chain_length()
797 static void xhci_er_reset(XHCIState *xhci, int v) in xhci_er_reset() argument
799 XHCIInterrupter *intr = &xhci->intr[v]; in xhci_er_reset()
811 DPRINTF("xhci: invalid value for ERSTSZ: %d\n", intr->erstsz); in xhci_er_reset()
812 xhci_die(xhci); in xhci_er_reset()
815 if (dma_memory_read(xhci->as, erstba, &seg, sizeof(seg), in xhci_er_reset()
819 xhci_die(xhci); in xhci_er_reset()
827 DPRINTF("xhci: invalid value for segment size: %d\n", seg.size); in xhci_er_reset()
828 xhci_die(xhci); in xhci_er_reset()
837 DPRINTF("xhci: event ring[%d]:" DMA_ADDR_FMT " [%d]\n", in xhci_er_reset()
841 static void xhci_run(XHCIState *xhci) in xhci_run() argument
844 xhci->usbsts &= ~USBSTS_HCH; in xhci_run()
845 xhci->mfindex_start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); in xhci_run()
848 static void xhci_stop(XHCIState *xhci) in xhci_stop() argument
851 xhci->usbsts |= USBSTS_HCH; in xhci_stop()
852 xhci->crcr_low &= ~CRCR_CRR; in xhci_stop()
894 static int xhci_epmask_to_eps_with_streams(XHCIState *xhci, in xhci_epmask_to_eps_with_streams() argument
905 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_epmask_to_eps_with_streams()
907 slot = &xhci->slots[slotid - 1]; in xhci_epmask_to_eps_with_streams()
928 static void xhci_free_device_streams(XHCIState *xhci, unsigned int slotid, in xhci_free_device_streams() argument
934 nr_eps = xhci_epmask_to_eps_with_streams(xhci, slotid, epmask, NULL, eps); in xhci_free_device_streams()
940 static TRBCCode xhci_alloc_device_streams(XHCIState *xhci, unsigned int slotid, in xhci_alloc_device_streams() argument
947 nr_eps = xhci_epmask_to_eps_with_streams(xhci, slotid, epmask, epctxs, in xhci_alloc_device_streams()
979 * the real xhci controller to alloc streams, and the host driver for the in xhci_alloc_device_streams()
980 * real xhci controller will likely disallow allocating more streams then in xhci_alloc_device_streams()
992 DPRINTF("xhci: alloc streams failed\n"); in xhci_alloc_device_streams()
1015 fprintf(stderr, "xhci: FIXME: secondary streams not implemented yet"); in xhci_find_stream()
1021 xhci_dma_read_u32s(epctx->xhci, sctx->pctx, ctx, sizeof(ctx)); in xhci_find_stream()
1029 xhci_ring_init(epctx->xhci, &sctx->ring, base); in xhci_find_stream()
1034 static void xhci_set_ep_state(XHCIState *xhci, XHCIEPContext *epctx, in xhci_set_ep_state() argument
1041 xhci_dma_read_u32s(xhci, epctx->pctx, ctx, sizeof(ctx)); in xhci_set_ep_state()
1049 xhci_dma_read_u32s(xhci, sctx->pctx, ctx2, sizeof(ctx2)); in xhci_set_ep_state()
1053 xhci_dma_write_u32s(xhci, sctx->pctx, ctx2, sizeof(ctx2)); in xhci_set_ep_state()
1062 DPRINTF("xhci: set epctx: " DMA_ADDR_FMT " state=%d dequeue=%08x%08x\n", in xhci_set_ep_state()
1066 xhci_dma_write_u32s(xhci, epctx->pctx, ctx, sizeof(ctx)); in xhci_set_ep_state()
1081 static XHCIEPContext *xhci_alloc_epctx(XHCIState *xhci, in xhci_alloc_epctx() argument
1088 epctx->xhci = xhci; in xhci_alloc_epctx()
1109 epctx->max_pstreams = (ctx[0] >> 10) & epctx->xhci->max_pstreams_mask; in xhci_init_epctx()
1114 xhci_ring_init(epctx->xhci, &epctx->ring, dequeue); in xhci_init_epctx()
1121 static TRBCCode xhci_enable_ep(XHCIState *xhci, unsigned int slotid, in xhci_enable_ep() argument
1129 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_enable_ep()
1132 slot = &xhci->slots[slotid-1]; in xhci_enable_ep()
1134 xhci_disable_ep(xhci, slotid, epid); in xhci_enable_ep()
1137 epctx = xhci_alloc_epctx(xhci, slotid, epid); in xhci_enable_ep()
1141 DPRINTF("xhci: endpoint %d.%d type is %d, max transaction (burst) " in xhci_enable_ep()
1215 static int xhci_ep_nuke_xfers(XHCIState *xhci, unsigned int slotid, in xhci_ep_nuke_xfers() argument
1223 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_ep_nuke_xfers()
1228 slot = &xhci->slots[slotid-1]; in xhci_ep_nuke_xfers()
1255 static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid, in xhci_disable_ep() argument
1262 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_disable_ep()
1265 slot = &xhci->slots[slotid-1]; in xhci_disable_ep()
1268 DPRINTF("xhci: slot %d ep %d already disabled\n", slotid, epid); in xhci_disable_ep()
1272 xhci_ep_nuke_xfers(xhci, slotid, epid, 0); in xhci_disable_ep()
1281 if (xhci->dcbaap_low || xhci->dcbaap_high) { in xhci_disable_ep()
1282 xhci_set_ep_state(xhci, epctx, NULL, EP_DISABLED); in xhci_disable_ep()
1292 static TRBCCode xhci_stop_ep(XHCIState *xhci, unsigned int slotid, in xhci_stop_ep() argument
1299 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_stop_ep()
1302 DPRINTF("xhci: bad ep %d\n", epid); in xhci_stop_ep()
1306 slot = &xhci->slots[slotid-1]; in xhci_stop_ep()
1309 DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); in xhci_stop_ep()
1313 if (xhci_ep_nuke_xfers(xhci, slotid, epid, CC_STOPPED) > 0) { in xhci_stop_ep()
1314 DPRINTF("xhci: FIXME: endpoint stopped w/ xfers running, " in xhci_stop_ep()
1320 xhci_set_ep_state(xhci, epctx, NULL, EP_STOPPED); in xhci_stop_ep()
1329 static TRBCCode xhci_reset_ep(XHCIState *xhci, unsigned int slotid, in xhci_reset_ep() argument
1336 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_reset_ep()
1339 DPRINTF("xhci: bad ep %d\n", epid); in xhci_reset_ep()
1343 slot = &xhci->slots[slotid-1]; in xhci_reset_ep()
1346 DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); in xhci_reset_ep()
1353 DPRINTF("xhci: reset EP while EP %d not halted (%d)\n", in xhci_reset_ep()
1358 if (xhci_ep_nuke_xfers(xhci, slotid, epid, 0) > 0) { in xhci_reset_ep()
1359 DPRINTF("xhci: FIXME: endpoint reset w/ xfers running, " in xhci_reset_ep()
1363 if (!xhci->slots[slotid-1].uport || in xhci_reset_ep()
1364 !xhci->slots[slotid-1].uport->dev || in xhci_reset_ep()
1365 !xhci->slots[slotid-1].uport->dev->attached) { in xhci_reset_ep()
1369 xhci_set_ep_state(xhci, epctx, NULL, EP_STOPPED); in xhci_reset_ep()
1378 static TRBCCode xhci_set_ep_dequeue(XHCIState *xhci, unsigned int slotid, in xhci_set_ep_dequeue() argument
1387 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_set_ep_dequeue()
1390 DPRINTF("xhci: bad ep %d\n", epid); in xhci_set_ep_dequeue()
1397 slot = &xhci->slots[slotid-1]; in xhci_set_ep_dequeue()
1400 DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); in xhci_set_ep_dequeue()
1407 DPRINTF("xhci: set EP dequeue pointer while EP %d not stopped\n", epid); in xhci_set_ep_dequeue()
1417 xhci_ring_init(xhci, &sctx->ring, dequeue & ~0xf); in xhci_set_ep_dequeue()
1421 xhci_ring_init(xhci, &epctx->ring, dequeue & ~0xF); in xhci_set_ep_dequeue()
1425 xhci_set_ep_state(xhci, epctx, sctx, EP_STOPPED); in xhci_set_ep_dequeue()
1432 XHCIState *xhci = xfer->epctx->xhci; in xhci_xfer_create_sgl() local
1436 qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, xhci->as); in xhci_xfer_create_sgl()
1449 DPRINTF("xhci: data direction mismatch for TR_DATA\n"); in xhci_xfer_create_sgl()
1459 DPRINTF("xhci: invalid immediate data TRB\n"); in xhci_xfer_create_sgl()
1474 xhci_die(xhci); in xhci_xfer_create_sgl()
1491 XHCIState *xhci = xfer->epctx->xhci; in xhci_xfer_report() local
1546 xhci_event(xhci, &event, TRB_INTR(*trb)); in xhci_xfer_report()
1566 XHCIState *xhci = epctx->xhci; in xhci_stall_ep() local
1582 xhci_set_ep_state(xhci, epctx, sctx, EP_HALTED); in xhci_stall_ep()
1586 xhci_set_ep_state(xhci, epctx, NULL, EP_HALTED); in xhci_stall_ep()
1602 DPRINTF("xhci: slot %d has no device\n", in xhci_setup_packet()
1615 DPRINTF("xhci: setup packet pid 0x%x addr %d ep %d\n", in xhci_setup_packet()
1675 static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer) in xhci_fire_ctl_transfer() argument
1693 DPRINTF("xhci: ep0 first TD not SETUP: %d\n", in xhci_fire_ctl_transfer()
1698 DPRINTF("xhci: ep0 last TD not STATUS: %d\n", in xhci_fire_ctl_transfer()
1703 DPRINTF("xhci: Setup TRB doesn't have IDT set\n"); in xhci_fire_ctl_transfer()
1707 DPRINTF("xhci: Setup TRB has bad length (%d)\n", in xhci_fire_ctl_transfer()
1728 static void xhci_calc_intr_kick(XHCIState *xhci, XHCITransfer *xfer, in xhci_calc_intr_kick() argument
1739 static void xhci_calc_iso_kick(XHCIState *xhci, XHCITransfer *xfer, in xhci_calc_iso_kick() argument
1761 static void xhci_check_intr_iso_kick(XHCIState *xhci, XHCITransfer *xfer, in xhci_check_intr_iso_kick() argument
1776 static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) in xhci_submit() argument
1790 mfindex = xhci_mfindex_get(xhci); in xhci_submit()
1791 xhci_calc_intr_kick(xhci, xfer, epctx, mfindex); in xhci_submit()
1792 xhci_check_intr_iso_kick(xhci, xfer, epctx, mfindex); in xhci_submit()
1808 mfindex = xhci_mfindex_get(xhci); in xhci_submit()
1809 xhci_calc_iso_kick(xhci, xfer, epctx, mfindex); in xhci_submit()
1810 xhci_check_intr_iso_kick(xhci, xfer, epctx, mfindex); in xhci_submit()
1828 static int xhci_fire_transfer(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) in xhci_fire_transfer() argument
1832 return xhci_submit(xhci, xfer, epctx); in xhci_fire_transfer()
1835 static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, in xhci_kick_ep() argument
1840 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_kick_ep()
1843 if (!xhci->slots[slotid-1].enabled) { in xhci_kick_ep()
1844 DPRINTF("xhci: xhci_kick_ep for disabled slot %d\n", slotid); in xhci_kick_ep()
1847 epctx = xhci->slots[slotid-1].eps[epid-1]; in xhci_kick_ep()
1849 DPRINTF("xhci: xhci_kick_ep for disabled endpoint %d,%d\n", in xhci_kick_ep()
1860 static bool xhci_slot_ok(XHCIState *xhci, int slotid) in xhci_slot_ok() argument
1862 return (xhci->slots[slotid - 1].uport && in xhci_slot_ok()
1863 xhci->slots[slotid - 1].uport->dev && in xhci_slot_ok()
1864 xhci->slots[slotid - 1].uport->dev->attached); in xhci_slot_ok()
1869 XHCIState *xhci = epctx->xhci; in xhci_kick_epctx() local
1884 if (!xhci_slot_ok(xhci, epctx->slotid)) { in xhci_kick_epctx()
1895 mfindex = xhci_mfindex_get(xhci); in xhci_kick_epctx()
1896 xhci_check_intr_iso_kick(xhci, xfer, epctx, mfindex); in xhci_kick_epctx()
1926 xhci_set_ep_state(xhci, epctx, stctx, epctx->state); in xhci_kick_epctx()
1933 DPRINTF("xhci: ep halted, not running schedule\n"); in xhci_kick_epctx()
1945 xhci_set_ep_state(xhci, epctx, stctx, EP_RUNNING); in xhci_kick_epctx()
1949 xhci_set_ep_state(xhci, epctx, NULL, EP_RUNNING); in xhci_kick_epctx()
1957 length = xhci_ring_chain_length(xhci, ring); in xhci_kick_epctx()
1967 xhci_event(xhci, &ev, xhci->slots[epctx->slotid-1].intr); in xhci_kick_epctx()
1978 type = xhci_ring_fetch(xhci, ring, &xfer->trbs[i], NULL); in xhci_kick_epctx()
1980 xhci_die(xhci); in xhci_kick_epctx()
1989 xhci_fire_ctl_transfer(xhci, xfer); in xhci_kick_epctx()
1991 xhci_fire_transfer(xhci, xfer, epctx); in xhci_kick_epctx()
1993 if (!xhci_slot_ok(xhci, epctx->slotid)) { in xhci_kick_epctx()
1999 xhci_set_ep_state(xhci, epctx, stctx, epctx->state); in xhci_kick_epctx()
2008 DPRINTF("xhci: xfer nacked, stopping schedule\n"); in xhci_kick_epctx()
2026 static TRBCCode xhci_enable_slot(XHCIState *xhci, unsigned int slotid) in xhci_enable_slot() argument
2029 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_enable_slot()
2030 xhci->slots[slotid-1].enabled = 1; in xhci_enable_slot()
2031 xhci->slots[slotid-1].uport = NULL; in xhci_enable_slot()
2032 memset(xhci->slots[slotid-1].eps, 0, sizeof(XHCIEPContext*)*31); in xhci_enable_slot()
2037 static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid) in xhci_disable_slot() argument
2042 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_disable_slot()
2045 if (xhci->slots[slotid-1].eps[i-1]) { in xhci_disable_slot()
2046 xhci_disable_ep(xhci, slotid, i); in xhci_disable_slot()
2050 xhci->slots[slotid-1].enabled = 0; in xhci_disable_slot()
2051 xhci->slots[slotid-1].addressed = 0; in xhci_disable_slot()
2052 xhci->slots[slotid-1].uport = NULL; in xhci_disable_slot()
2053 xhci->slots[slotid-1].intr = 0; in xhci_disable_slot()
2057 static USBPort *xhci_lookup_uport(XHCIState *xhci, uint32_t *slot_ctx) in xhci_lookup_uport() argument
2064 if (port < 1 || port > xhci->numports) { in xhci_lookup_uport()
2067 port = xhci->ports[port-1].uport->index+1; in xhci_lookup_uport()
2077 QTAILQ_FOREACH(uport, &xhci->bus.used, next) { in xhci_lookup_uport()
2085 static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid, in xhci_address_slot() argument
2099 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_address_slot()
2101 dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); in xhci_address_slot()
2102 ldq_le_dma(xhci->as, dcbaap + 8 * slotid, &poctx, MEMTXATTRS_UNSPECIFIED); in xhci_address_slot()
2106 DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); in xhci_address_slot()
2107 DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); in xhci_address_slot()
2109 xhci_dma_read_u32s(xhci, ictx, ictl_ctx, sizeof(ictl_ctx)); in xhci_address_slot()
2112 DPRINTF("xhci: invalid input context control %08x %08x\n", in xhci_address_slot()
2117 xhci_dma_read_u32s(xhci, ictx+32, slot_ctx, sizeof(slot_ctx)); in xhci_address_slot()
2118 xhci_dma_read_u32s(xhci, ictx+64, ep0_ctx, sizeof(ep0_ctx)); in xhci_address_slot()
2120 DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", in xhci_address_slot()
2123 DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", in xhci_address_slot()
2126 uport = xhci_lookup_uport(xhci, slot_ctx); in xhci_address_slot()
2128 DPRINTF("xhci: port not found\n"); in xhci_address_slot()
2135 DPRINTF("xhci: port %s not connected\n", uport->path); in xhci_address_slot()
2139 for (i = 0; i < xhci->numslots; i++) { in xhci_address_slot()
2143 if (xhci->slots[i].uport == uport) { in xhci_address_slot()
2144 DPRINTF("xhci: port %s already assigned to slot %d\n", in xhci_address_slot()
2150 slot = &xhci->slots[slotid-1]; in xhci_address_slot()
2176 res = xhci_enable_ep(xhci, slotid, 1, octx+32, ep0_ctx); in xhci_address_slot()
2178 DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", in xhci_address_slot()
2180 DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", in xhci_address_slot()
2183 xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); in xhci_address_slot()
2184 xhci_dma_write_u32s(xhci, octx+32, ep0_ctx, sizeof(ep0_ctx)); in xhci_address_slot()
2186 xhci->slots[slotid-1].addressed = 1; in xhci_address_slot()
2191 static TRBCCode xhci_configure_slot(XHCIState *xhci, unsigned int slotid, in xhci_configure_slot() argument
2203 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_configure_slot()
2206 octx = xhci->slots[slotid-1].ctx; in xhci_configure_slot()
2208 DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); in xhci_configure_slot()
2209 DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); in xhci_configure_slot()
2213 if (xhci->slots[slotid-1].eps[i-1]) { in xhci_configure_slot()
2214 xhci_disable_ep(xhci, slotid, i); in xhci_configure_slot()
2218 xhci_dma_read_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); in xhci_configure_slot()
2221 DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", in xhci_configure_slot()
2223 xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); in xhci_configure_slot()
2228 xhci_dma_read_u32s(xhci, ictx, ictl_ctx, sizeof(ictl_ctx)); in xhci_configure_slot()
2231 DPRINTF("xhci: invalid input context control %08x %08x\n", in xhci_configure_slot()
2236 xhci_dma_read_u32s(xhci, ictx+32, islot_ctx, sizeof(islot_ctx)); in xhci_configure_slot()
2237 xhci_dma_read_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); in xhci_configure_slot()
2240 DPRINTF("xhci: invalid slot state %08x\n", slot_ctx[3]); in xhci_configure_slot()
2244 xhci_free_device_streams(xhci, slotid, ictl_ctx[0] | ictl_ctx[1]); in xhci_configure_slot()
2248 xhci_disable_ep(xhci, slotid, i); in xhci_configure_slot()
2251 xhci_dma_read_u32s(xhci, ictx+32+(32*i), ep_ctx, sizeof(ep_ctx)); in xhci_configure_slot()
2252 DPRINTF("xhci: input ep%d.%d context: %08x %08x %08x %08x %08x\n", in xhci_configure_slot()
2255 xhci_disable_ep(xhci, slotid, i); in xhci_configure_slot()
2256 res = xhci_enable_ep(xhci, slotid, i, octx+(32*i), ep_ctx); in xhci_configure_slot()
2260 DPRINTF("xhci: output ep%d.%d context: %08x %08x %08x %08x %08x\n", in xhci_configure_slot()
2263 xhci_dma_write_u32s(xhci, octx+(32*i), ep_ctx, sizeof(ep_ctx)); in xhci_configure_slot()
2267 res = xhci_alloc_device_streams(xhci, slotid, ictl_ctx[1]); in xhci_configure_slot()
2271 xhci_disable_ep(xhci, slotid, i); in xhci_configure_slot()
2282 DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", in xhci_configure_slot()
2285 xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); in xhci_configure_slot()
2291 static TRBCCode xhci_evaluate_slot(XHCIState *xhci, unsigned int slotid, in xhci_evaluate_slot() argument
2302 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_evaluate_slot()
2305 octx = xhci->slots[slotid-1].ctx; in xhci_evaluate_slot()
2307 DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); in xhci_evaluate_slot()
2308 DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); in xhci_evaluate_slot()
2310 xhci_dma_read_u32s(xhci, ictx, ictl_ctx, sizeof(ictl_ctx)); in xhci_evaluate_slot()
2313 DPRINTF("xhci: invalid input context control %08x %08x\n", in xhci_evaluate_slot()
2319 xhci_dma_read_u32s(xhci, ictx+32, islot_ctx, sizeof(islot_ctx)); in xhci_evaluate_slot()
2321 DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", in xhci_evaluate_slot()
2324 xhci_dma_read_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); in xhci_evaluate_slot()
2329 xhci->slots[slotid-1].intr = get_field(islot_ctx[2], TRB_INTR); in xhci_evaluate_slot()
2330 set_field(&slot_ctx[2], xhci->slots[slotid-1].intr, TRB_INTR); in xhci_evaluate_slot()
2332 DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", in xhci_evaluate_slot()
2335 xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); in xhci_evaluate_slot()
2339 xhci_dma_read_u32s(xhci, ictx+64, iep0_ctx, sizeof(iep0_ctx)); in xhci_evaluate_slot()
2341 DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", in xhci_evaluate_slot()
2345 xhci_dma_read_u32s(xhci, octx+32, ep0_ctx, sizeof(ep0_ctx)); in xhci_evaluate_slot()
2350 DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", in xhci_evaluate_slot()
2353 xhci_dma_write_u32s(xhci, octx+32, ep0_ctx, sizeof(ep0_ctx)); in xhci_evaluate_slot()
2359 static TRBCCode xhci_reset_slot(XHCIState *xhci, unsigned int slotid) in xhci_reset_slot() argument
2366 assert(slotid >= 1 && slotid <= xhci->numslots); in xhci_reset_slot()
2368 octx = xhci->slots[slotid-1].ctx; in xhci_reset_slot()
2370 DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); in xhci_reset_slot()
2373 if (xhci->slots[slotid-1].eps[i-1]) { in xhci_reset_slot()
2374 xhci_disable_ep(xhci, slotid, i); in xhci_reset_slot()
2378 xhci_dma_read_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); in xhci_reset_slot()
2381 DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", in xhci_reset_slot()
2383 xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); in xhci_reset_slot()
2388 static unsigned int xhci_get_slot(XHCIState *xhci, XHCIEvent *event, XHCITRB *trb) in xhci_get_slot() argument
2392 if (slotid < 1 || slotid > xhci->numslots) { in xhci_get_slot()
2393 DPRINTF("xhci: bad slot id %d\n", slotid); in xhci_get_slot()
2396 } else if (!xhci->slots[slotid-1].enabled) { in xhci_get_slot()
2397 DPRINTF("xhci: slot id %d not enabled\n", slotid); in xhci_get_slot()
2405 static void xhci_detach_slot(XHCIState *xhci, USBPort *uport) in xhci_detach_slot() argument
2409 for (slot = 0; slot < xhci->numslots; slot++) { in xhci_detach_slot()
2410 if (xhci->slots[slot].uport == uport) { in xhci_detach_slot()
2414 if (slot == xhci->numslots) { in xhci_detach_slot()
2419 if (xhci->slots[slot].eps[ep]) { in xhci_detach_slot()
2420 xhci_ep_nuke_xfers(xhci, slot + 1, ep + 1, 0); in xhci_detach_slot()
2423 xhci->slots[slot].uport = NULL; in xhci_detach_slot()
2426 static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx) in xhci_get_port_bandwidth() argument
2434 DPRINTF("xhci: bandwidth context at "DMA_ADDR_FMT"\n", ctx); in xhci_get_port_bandwidth()
2437 if (stb_dma(xhci->as, ctx, 0, MEMTXATTRS_UNSPECIFIED) != MEMTX_OK || in xhci_get_port_bandwidth()
2438 dma_memory_set(xhci->as, ctx + 1, 80, xhci->numports, in xhci_get_port_bandwidth()
2464 static void xhci_process_commands(XHCIState *xhci) in xhci_process_commands() argument
2473 if (!xhci_running(xhci)) { in xhci_process_commands()
2478 xhci->crcr_low |= CRCR_CRR; in xhci_process_commands()
2480 while ((type = xhci_ring_fetch(xhci, &xhci->cmd_ring, &trb, &addr))) { in xhci_process_commands()
2484 for (i = 0; i < xhci->numslots; i++) { in xhci_process_commands()
2485 if (!xhci->slots[i].enabled) { in xhci_process_commands()
2489 if (i >= xhci->numslots) { in xhci_process_commands()
2490 DPRINTF("xhci: no device slots available\n"); in xhci_process_commands()
2494 event.ccode = xhci_enable_slot(xhci, slotid); in xhci_process_commands()
2498 slotid = xhci_get_slot(xhci, &event, &trb); in xhci_process_commands()
2500 event.ccode = xhci_disable_slot(xhci, slotid); in xhci_process_commands()
2504 slotid = xhci_get_slot(xhci, &event, &trb); in xhci_process_commands()
2506 event.ccode = xhci_address_slot(xhci, slotid, trb.parameter, in xhci_process_commands()
2511 slotid = xhci_get_slot(xhci, &event, &trb); in xhci_process_commands()
2513 event.ccode = xhci_configure_slot(xhci, slotid, trb.parameter, in xhci_process_commands()
2518 slotid = xhci_get_slot(xhci, &event, &trb); in xhci_process_commands()
2520 event.ccode = xhci_evaluate_slot(xhci, slotid, trb.parameter); in xhci_process_commands()
2524 slotid = xhci_get_slot(xhci, &event, &trb); in xhci_process_commands()
2528 event.ccode = xhci_stop_ep(xhci, slotid, epid); in xhci_process_commands()
2532 slotid = xhci_get_slot(xhci, &event, &trb); in xhci_process_commands()
2536 event.ccode = xhci_reset_ep(xhci, slotid, epid); in xhci_process_commands()
2540 slotid = xhci_get_slot(xhci, &event, &trb); in xhci_process_commands()
2545 event.ccode = xhci_set_ep_dequeue(xhci, slotid, in xhci_process_commands()
2551 slotid = xhci_get_slot(xhci, &event, &trb); in xhci_process_commands()
2553 event.ccode = xhci_reset_slot(xhci, slotid); in xhci_process_commands()
2557 event.ccode = xhci_get_port_bandwidth(xhci, trb.parameter); in xhci_process_commands()
2563 if (xhci->nec_quirks) { in xhci_process_commands()
2571 if (xhci->nec_quirks) { in xhci_process_commands()
2589 xhci_event(xhci, &event, 0); in xhci_process_commands()
2619 if (!xhci_running(port->xhci)) { in xhci_port_notify()
2622 xhci_event(port->xhci, &ev, 0); in xhci_port_notify()
2689 XHCIState *xhci = XHCI(dev); in xhci_reset() local
2693 if (!(xhci->usbsts & USBSTS_HCH)) { in xhci_reset()
2694 DPRINTF("xhci: reset while running!\n"); in xhci_reset()
2697 xhci->usbcmd = 0; in xhci_reset()
2698 xhci->usbsts = USBSTS_HCH; in xhci_reset()
2699 xhci->dnctrl = 0; in xhci_reset()
2700 xhci->crcr_low = 0; in xhci_reset()
2701 xhci->crcr_high = 0; in xhci_reset()
2702 xhci->dcbaap_low = 0; in xhci_reset()
2703 xhci->dcbaap_high = 0; in xhci_reset()
2704 xhci->config = 0; in xhci_reset()
2706 for (i = 0; i < xhci->numslots; i++) { in xhci_reset()
2707 xhci_disable_slot(xhci, i+1); in xhci_reset()
2710 for (i = 0; i < xhci->numports; i++) { in xhci_reset()
2711 xhci_port_update(xhci->ports + i, 0); in xhci_reset()
2714 for (i = 0; i < xhci->numintrs; i++) { in xhci_reset()
2715 xhci->intr[i].iman = 0; in xhci_reset()
2716 xhci->intr[i].imod = 0; in xhci_reset()
2717 xhci->intr[i].erstsz = 0; in xhci_reset()
2718 xhci->intr[i].erstba_low = 0; in xhci_reset()
2719 xhci->intr[i].erstba_high = 0; in xhci_reset()
2720 xhci->intr[i].erdp_low = 0; in xhci_reset()
2721 xhci->intr[i].erdp_high = 0; in xhci_reset()
2723 xhci->intr[i].er_ep_idx = 0; in xhci_reset()
2724 xhci->intr[i].er_pcs = 1; in xhci_reset()
2725 xhci->intr[i].ev_buffer_put = 0; in xhci_reset()
2726 xhci->intr[i].ev_buffer_get = 0; in xhci_reset()
2729 xhci->mfindex_start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); in xhci_reset()
2730 xhci_mfwrap_update(xhci); in xhci_reset()
2735 XHCIState *xhci = ptr; in xhci_cap_read() local
2743 ret = ((xhci->numports_2+xhci->numports_3)<<24) in xhci_cap_read()
2744 | (xhci->numintrs<<8) | xhci->numslots; in xhci_cap_read()
2754 ret = 0x00080000 | (xhci->max_pstreams_mask << 12); in xhci_cap_read()
2756 ret = 0x00080001 | (xhci->max_pstreams_mask << 12); in xhci_cap_read()
2774 ret = (xhci->numports_2 << 8) | (xhci->numports_3 + 1); in xhci_cap_read()
2786 ret = (xhci->numports_3 << 8) | 1; in xhci_cap_read()
2892 XHCIState *xhci = ptr; in xhci_oper_read() local
2897 ret = xhci->usbcmd; in xhci_oper_read()
2900 ret = xhci->usbsts; in xhci_oper_read()
2906 ret = xhci->dnctrl; in xhci_oper_read()
2909 ret = xhci->crcr_low & ~0xe; in xhci_oper_read()
2912 ret = xhci->crcr_high; in xhci_oper_read()
2915 ret = xhci->dcbaap_low; in xhci_oper_read()
2918 ret = xhci->dcbaap_high; in xhci_oper_read()
2921 ret = xhci->config; in xhci_oper_read()
2935 XHCIState *xhci = XHCI(ptr); in xhci_oper_write() local
2941 if ((val & USBCMD_RS) && !(xhci->usbcmd & USBCMD_RS)) { in xhci_oper_write()
2942 xhci_run(xhci); in xhci_oper_write()
2943 } else if (!(val & USBCMD_RS) && (xhci->usbcmd & USBCMD_RS)) { in xhci_oper_write()
2944 xhci_stop(xhci); in xhci_oper_write()
2948 xhci->usbsts &= ~USBSTS_SRE; in xhci_oper_write()
2952 xhci->usbsts |= USBSTS_SRE; in xhci_oper_write()
2954 xhci->usbcmd = val & 0xc0f; in xhci_oper_write()
2955 xhci_mfwrap_update(xhci); in xhci_oper_write()
2957 xhci_reset(DEVICE(xhci)); in xhci_oper_write()
2959 xhci_intr_update(xhci, 0); in xhci_oper_write()
2964 xhci->usbsts &= ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBSTS_SRE)); in xhci_oper_write()
2965 xhci_intr_update(xhci, 0); in xhci_oper_write()
2969 xhci->dnctrl = val & 0xffff; in xhci_oper_write()
2972 xhci->crcr_low = (val & 0xffffffcf) | (xhci->crcr_low & CRCR_CRR); in xhci_oper_write()
2975 xhci->crcr_high = val; in xhci_oper_write()
2976 if (xhci->crcr_low & (CRCR_CA|CRCR_CS) && (xhci->crcr_low & CRCR_CRR)) { in xhci_oper_write()
2978 xhci->crcr_low &= ~CRCR_CRR; in xhci_oper_write()
2979 xhci_event(xhci, &event, 0); in xhci_oper_write()
2980 DPRINTF("xhci: command ring stopped (CRCR=%08x)\n", xhci->crcr_low); in xhci_oper_write()
2982 dma_addr_t base = xhci_addr64(xhci->crcr_low & ~0x3f, val); in xhci_oper_write()
2983 xhci_ring_init(xhci, &xhci->cmd_ring, base); in xhci_oper_write()
2985 xhci->crcr_low &= ~(CRCR_CA | CRCR_CS); in xhci_oper_write()
2988 xhci->dcbaap_low = val & 0xffffffc0; in xhci_oper_write()
2991 xhci->dcbaap_high = val; in xhci_oper_write()
2994 xhci->config = val & 0xff; in xhci_oper_write()
3004 XHCIState *xhci = ptr; in xhci_runtime_read() local
3010 ret = xhci_mfindex_get(xhci) & 0x3fff; in xhci_runtime_read()
3018 XHCIInterrupter *intr = &xhci->intr[v]; in xhci_runtime_read()
3051 XHCIState *xhci = ptr; in xhci_runtime_write() local
3062 intr = &xhci->intr[v]; in xhci_runtime_write()
3071 xhci_intr_update(xhci, v); in xhci_runtime_write()
3080 if (xhci->nec_quirks) { in xhci_runtime_write()
3089 xhci_er_reset(xhci, v); in xhci_runtime_write()
3102 xhci_intr_raise(xhci, v); in xhci_runtime_write()
3125 XHCIState *xhci = ptr; in xhci_doorbell_write() local
3130 if (!xhci_running(xhci)) { in xhci_doorbell_write()
3131 DPRINTF("xhci: wrote doorbell while xHC stopped or paused\n"); in xhci_doorbell_write()
3139 xhci_process_commands(xhci); in xhci_doorbell_write()
3141 DPRINTF("xhci: bad doorbell 0 write: 0x%x\n", in xhci_doorbell_write()
3147 if (reg > xhci->numslots) { in xhci_doorbell_write()
3148 DPRINTF("xhci: bad doorbell %d\n", (int)reg); in xhci_doorbell_write()
3150 DPRINTF("xhci: bad doorbell %d write: 0x%x\n", in xhci_doorbell_write()
3153 xhci_kick_ep(xhci, reg, epid, streamid); in xhci_doorbell_write()
3208 XHCIState *xhci = usbport->opaque; in xhci_attach() local
3209 XHCIPort *port = xhci_lookup_port(xhci, usbport); in xhci_attach()
3216 XHCIState *xhci = usbport->opaque; in xhci_detach() local
3217 XHCIPort *port = xhci_lookup_port(xhci, usbport); in xhci_detach()
3219 xhci_detach_slot(xhci, usbport); in xhci_detach()
3225 XHCIState *xhci = usbport->opaque; in xhci_wakeup() local
3226 XHCIPort *port = xhci_lookup_port(xhci, usbport); in xhci_wakeup()
3254 XHCIState *xhci = container_of(bus, XHCIState, bus); in xhci_child_detach() local
3256 xhci_detach_slot(xhci, child->port); in xhci_child_detach()
3287 uport = epctx->xhci->slots[epctx->slotid - 1].uport; in xhci_epid_to_usbep()
3298 XHCIState *xhci = container_of(bus, XHCIState, bus); in xhci_wakeup_endpoint() local
3303 if (slotid == 0 || slotid > xhci->numslots || in xhci_wakeup_endpoint()
3304 !xhci->slots[slotid - 1].enabled) { in xhci_wakeup_endpoint()
3308 xhci_kick_ep(xhci, slotid, xhci_find_epid(ep), stream); in xhci_wakeup_endpoint()
3315 static void usb_xhci_init(XHCIState *xhci) in usb_xhci_init() argument
3320 xhci->usbsts = USBSTS_HCH; in usb_xhci_init()
3322 if (xhci->numports_2 > XHCI_MAXPORTS_2) { in usb_xhci_init()
3323 xhci->numports_2 = XHCI_MAXPORTS_2; in usb_xhci_init()
3325 if (xhci->numports_3 > XHCI_MAXPORTS_3) { in usb_xhci_init()
3326 xhci->numports_3 = XHCI_MAXPORTS_3; in usb_xhci_init()
3328 usbports = MAX(xhci->numports_2, xhci->numports_3); in usb_xhci_init()
3329 xhci->numports = xhci->numports_2 + xhci->numports_3; in usb_xhci_init()
3331 usb_bus_new(&xhci->bus, sizeof(xhci->bus), &xhci_bus_ops, xhci->hostOpaque); in usb_xhci_init()
3335 if (i < xhci->numports_2) { in usb_xhci_init()
3336 port = &xhci->ports[i + xhci->numports_3]; in usb_xhci_init()
3337 port->portnr = i + 1 + xhci->numports_3; in usb_xhci_init()
3338 port->uport = &xhci->uports[i]; in usb_xhci_init()
3347 if (i < xhci->numports_3) { in usb_xhci_init()
3348 port = &xhci->ports[i]; in usb_xhci_init()
3350 port->uport = &xhci->uports[i]; in usb_xhci_init()
3356 usb_register_port(&xhci->bus, &xhci->uports[i], xhci, i, in usb_xhci_init()
3365 XHCIState *xhci = XHCI(dev); in usb_xhci_realize() local
3367 if (xhci->numintrs > XHCI_MAXINTRS) { in usb_xhci_realize()
3368 xhci->numintrs = XHCI_MAXINTRS; in usb_xhci_realize()
3370 while (xhci->numintrs & (xhci->numintrs - 1)) { /* ! power of 2 */ in usb_xhci_realize()
3371 xhci->numintrs++; in usb_xhci_realize()
3373 if (xhci->numintrs < 1) { in usb_xhci_realize()
3374 xhci->numintrs = 1; in usb_xhci_realize()
3376 if (xhci->numslots > XHCI_MAXSLOTS) { in usb_xhci_realize()
3377 xhci->numslots = XHCI_MAXSLOTS; in usb_xhci_realize()
3379 if (xhci->numslots < 1) { in usb_xhci_realize()
3380 xhci->numslots = 1; in usb_xhci_realize()
3382 if (xhci_get_flag(xhci, XHCI_FLAG_ENABLE_STREAMS)) { in usb_xhci_realize()
3383 xhci->max_pstreams_mask = 7; /* == 256 primary streams */ in usb_xhci_realize()
3385 xhci->max_pstreams_mask = 0; in usb_xhci_realize()
3388 usb_xhci_init(xhci); in usb_xhci_realize()
3389 xhci->mfwrap_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_timer, xhci); in usb_xhci_realize()
3391 memory_region_init(&xhci->mem, OBJECT(dev), "xhci", XHCI_LEN_REGS); in usb_xhci_realize()
3392 memory_region_init_io(&xhci->mem_cap, OBJECT(dev), &xhci_cap_ops, xhci, in usb_xhci_realize()
3394 memory_region_init_io(&xhci->mem_oper, OBJECT(dev), &xhci_oper_ops, xhci, in usb_xhci_realize()
3396 memory_region_init_io(&xhci->mem_runtime, OBJECT(dev), &xhci_runtime_ops, in usb_xhci_realize()
3397 xhci, "runtime", LEN_RUNTIME); in usb_xhci_realize()
3398 memory_region_init_io(&xhci->mem_doorbell, OBJECT(dev), &xhci_doorbell_ops, in usb_xhci_realize()
3399 xhci, "doorbell", LEN_DOORBELL); in usb_xhci_realize()
3401 memory_region_add_subregion(&xhci->mem, 0, &xhci->mem_cap); in usb_xhci_realize()
3402 memory_region_add_subregion(&xhci->mem, OFF_OPER, &xhci->mem_oper); in usb_xhci_realize()
3403 memory_region_add_subregion(&xhci->mem, OFF_RUNTIME, &xhci->mem_runtime); in usb_xhci_realize()
3404 memory_region_add_subregion(&xhci->mem, OFF_DOORBELL, &xhci->mem_doorbell); in usb_xhci_realize()
3406 for (i = 0; i < xhci->numports; i++) { in usb_xhci_realize()
3407 XHCIPort *port = &xhci->ports[i]; in usb_xhci_realize()
3409 port->xhci = xhci; in usb_xhci_realize()
3412 memory_region_add_subregion(&xhci->mem, offset, &port->mem); in usb_xhci_realize()
3419 XHCIState *xhci = XHCI(dev); in usb_xhci_unrealize() local
3423 for (i = 0; i < xhci->numslots; i++) { in usb_xhci_unrealize()
3424 xhci_disable_slot(xhci, i + 1); in usb_xhci_unrealize()
3427 if (xhci->mfwrap_timer) { in usb_xhci_unrealize()
3428 timer_free(xhci->mfwrap_timer); in usb_xhci_unrealize()
3429 xhci->mfwrap_timer = NULL; in usb_xhci_unrealize()
3432 memory_region_del_subregion(&xhci->mem, &xhci->mem_cap); in usb_xhci_unrealize()
3433 memory_region_del_subregion(&xhci->mem, &xhci->mem_oper); in usb_xhci_unrealize()
3434 memory_region_del_subregion(&xhci->mem, &xhci->mem_runtime); in usb_xhci_unrealize()
3435 memory_region_del_subregion(&xhci->mem, &xhci->mem_doorbell); in usb_xhci_unrealize()
3437 for (i = 0; i < xhci->numports; i++) { in usb_xhci_unrealize()
3438 XHCIPort *port = &xhci->ports[i]; in usb_xhci_unrealize()
3439 memory_region_del_subregion(&xhci->mem, &port->mem); in usb_xhci_unrealize()
3442 usb_bus_release(&xhci->bus); in usb_xhci_unrealize()
3447 XHCIState *xhci = opaque; in usb_xhci_post_load() local
3456 dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); in usb_xhci_post_load()
3458 for (slotid = 1; slotid <= xhci->numslots; slotid++) { in usb_xhci_post_load()
3459 slot = &xhci->slots[slotid-1]; in usb_xhci_post_load()
3463 ldq_le_dma(xhci->as, dcbaap + 8 * slotid, &addr, MEMTXATTRS_UNSPECIFIED); in usb_xhci_post_load()
3466 xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx)); in usb_xhci_post_load()
3467 slot->uport = xhci_lookup_uport(xhci, slot_ctx); in usb_xhci_post_load()
3478 xhci_dma_read_u32s(xhci, pctx, ep_ctx, sizeof(ep_ctx)); in usb_xhci_post_load()
3483 epctx = xhci_alloc_epctx(xhci, slotid, epid); in usb_xhci_post_load()
3497 .name = "xhci-ring",
3507 .name = "xhci-port",
3516 .name = "xhci-slot",
3526 .name = "xhci-event",
3546 .name = "xhci-intr",
3578 .name = "xhci-core",